DE3855141D1 - Mehrfachbus-Direktspeicherzugriffssteuerungsgerät - Google Patents

Mehrfachbus-Direktspeicherzugriffssteuerungsgerät

Info

Publication number
DE3855141D1
DE3855141D1 DE3855141T DE3855141T DE3855141D1 DE 3855141 D1 DE3855141 D1 DE 3855141D1 DE 3855141 T DE3855141 T DE 3855141T DE 3855141 T DE3855141 T DE 3855141T DE 3855141 D1 DE3855141 D1 DE 3855141D1
Authority
DE
Germany
Prior art keywords
control device
access control
memory access
direct memory
multiple bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3855141T
Other languages
English (en)
Other versions
DE3855141T2 (de
Inventor
Harrell Hoffman
Scott Murray Smith
John Alvin Voltin
Charles Gordon Wright
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE3855141D1 publication Critical patent/DE3855141D1/de
Application granted granted Critical
Publication of DE3855141T2 publication Critical patent/DE3855141T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
  • Advance Control (AREA)
DE19883855141 1987-02-13 1988-01-19 Mehrfachbus-Direktspeicherzugriffssteuerungsgerät Expired - Fee Related DE3855141T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US1476087A 1987-02-13 1987-02-13

Publications (2)

Publication Number Publication Date
DE3855141D1 true DE3855141D1 (de) 1996-05-02
DE3855141T2 DE3855141T2 (de) 1996-10-24

Family

ID=21767559

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19883855141 Expired - Fee Related DE3855141T2 (de) 1987-02-13 1988-01-19 Mehrfachbus-Direktspeicherzugriffssteuerungsgerät

Country Status (4)

Country Link
EP (1) EP0278263B1 (de)
JP (1) JPS63201822A (de)
BR (1) BR8800293A (de)
DE (1) DE3855141T2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03263128A (ja) * 1990-03-14 1991-11-22 Fujitsu Ltd マイクロプロセッサ
JP2006161645A (ja) 2004-12-06 2006-06-22 Denso Corp パワートレイン制御用センサ信号処理装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6057603B2 (ja) * 1978-01-27 1985-12-16 株式会社日立製作所 演算処理装置
JPS5840214B2 (ja) * 1979-06-26 1983-09-03 株式会社東芝 計算機システム
JPS5922120A (ja) * 1982-07-28 1984-02-04 Fanuc Ltd システム作成方式
JPS59165140A (ja) * 1983-03-10 1984-09-18 Fujitsu Ltd ２次元演算回路
JPS59186020A (ja) * 1983-04-07 1984-10-22 Fanuc Ltd デ−タ転送制御方式
JPS61237135A (ja) * 1985-04-15 1986-10-22 Hitachi Ltd 命令プリフエツチ方式
US4672613A (en) * 1985-11-01 1987-06-09 Cipher Data Products, Inc. System for transferring digital data between a host device and a recording medium

Also Published As

Publication number Publication date
EP0278263A2 (de) 1988-08-17
EP0278263B1 (de) 1996-03-27
EP0278263A3 (de) 1991-05-29
BR8800293A (pt) 1988-09-06
DE3855141T2 (de) 1996-10-24
JPS63201822A (ja) 1988-08-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee