DE3720465C2 - - Google Patents

Info

Publication number
DE3720465C2
DE3720465C2 DE3720465A DE3720465A DE3720465C2 DE 3720465 C2 DE3720465 C2 DE 3720465C2 DE 3720465 A DE3720465 A DE 3720465A DE 3720465 A DE3720465 A DE 3720465A DE 3720465 C2 DE3720465 C2 DE 3720465C2
Authority
DE
Germany
Prior art keywords
adhesion promoter
oxide
promoter solution
metal
adhesion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3720465A
Other languages
German (de)
English (en)
Other versions
DE3720465A1 (de
Inventor
Nguyen Kim Dr. 6842 Buerstadt De Son
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ABB AG Germany
Original Assignee
Asea Brown Boveri AG Germany
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asea Brown Boveri AG Germany filed Critical Asea Brown Boveri AG Germany
Priority to DE19873720465 priority Critical patent/DE3720465A1/de
Publication of DE3720465A1 publication Critical patent/DE3720465A1/de
Application granted granted Critical
Publication of DE3720465C2 publication Critical patent/DE3720465C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/693—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane
    • H10P50/695—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/11—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having cover layers or intermediate layers, e.g. subbing layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/692—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their composition, e.g. multilayer masks or materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • H10P14/6506—Formation of intermediate materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Architecture (AREA)
  • Structural Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Weting (AREA)
DE19873720465 1987-06-20 1987-06-20 Haftvermittler fuer negativresist zum aetzen tiefer graeben in siliciumscheiben mit glatter oberflaeche und verfahren zur herstellung des haftvermittlers Granted DE3720465A1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE19873720465 DE3720465A1 (de) 1987-06-20 1987-06-20 Haftvermittler fuer negativresist zum aetzen tiefer graeben in siliciumscheiben mit glatter oberflaeche und verfahren zur herstellung des haftvermittlers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19873720465 DE3720465A1 (de) 1987-06-20 1987-06-20 Haftvermittler fuer negativresist zum aetzen tiefer graeben in siliciumscheiben mit glatter oberflaeche und verfahren zur herstellung des haftvermittlers

Publications (2)

Publication Number Publication Date
DE3720465A1 DE3720465A1 (de) 1988-12-29
DE3720465C2 true DE3720465C2 (https=) 1992-04-02

Family

ID=6329994

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19873720465 Granted DE3720465A1 (de) 1987-06-20 1987-06-20 Haftvermittler fuer negativresist zum aetzen tiefer graeben in siliciumscheiben mit glatter oberflaeche und verfahren zur herstellung des haftvermittlers

Country Status (1)

Country Link
DE (1) DE3720465A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10206661A1 (de) * 2001-02-20 2002-09-26 Infineon Technologies Ag Elektronisches Bauteil mit einem Halbleiterchip

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT254648B (de) * 1965-06-03 1967-05-26 Vmw Ranshofen Berndorf Ag Verfahren zur chemischen oder elektrolytischen Behandlung von metallischen Oberflächen
JPS494851B1 (https=) * 1968-04-26 1974-02-04
US3644180A (en) * 1970-02-26 1972-02-22 Western Electric Co Methods of using inorganic resists
US3716390A (en) * 1970-05-27 1973-02-13 Bell Telephone Labor Inc Photoresist method and products produced thereby
JPS5421073B2 (https=) * 1974-04-15 1979-07-27
DE3334095A1 (de) * 1983-09-21 1985-04-11 Brown, Boveri & Cie Ag, 6800 Mannheim Verfahren zum aetzen tiefer graeben in siliziumscheiben mit glatter oberflaeche
DE3537626A1 (de) * 1984-10-26 1986-04-30 Merck Patent Gmbh, 6100 Darmstadt Beschichtungsloesungen

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10206661A1 (de) * 2001-02-20 2002-09-26 Infineon Technologies Ag Elektronisches Bauteil mit einem Halbleiterchip
US6891252B2 (en) 2001-02-20 2005-05-10 Infineon Technologies Ag Electronic component with a semiconductor chip and method of producing an electronic component

Also Published As

Publication number Publication date
DE3720465A1 (de) 1988-12-29

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Legal Events

Date Code Title Description
OM8 Search report available as to paragraph 43 lit. 1 sentence 1 patent law
8181 Inventor (new situation)

Free format text: NGUYEN KIM, SON, DR., 6842 BUERSTADT, DE

8110 Request for examination paragraph 44
8120 Willingness to grant licences paragraph 23
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee