DE3576016D1 - Verfahren zum herstellen eines polysilicium-widerstandes in einer "polyzid"-leitung. - Google Patents

Verfahren zum herstellen eines polysilicium-widerstandes in einer "polyzid"-leitung.

Info

Publication number
DE3576016D1
DE3576016D1 DE8585305819T DE3576016T DE3576016D1 DE 3576016 D1 DE3576016 D1 DE 3576016D1 DE 8585305819 T DE8585305819 T DE 8585305819T DE 3576016 T DE3576016 T DE 3576016T DE 3576016 D1 DE3576016 D1 DE 3576016D1
Authority
DE
Germany
Prior art keywords
polysilicium
polycide
resistor
producing
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585305819T
Other languages
English (en)
Inventor
Ronald R Bourassa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thorn EMI North America Inc
Original Assignee
Thorn EMI North America Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=24799056&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE3576016(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Thorn EMI North America Inc filed Critical Thorn EMI North America Inc
Application granted granted Critical
Publication of DE3576016D1 publication Critical patent/DE3576016D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20—Resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76889—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE8585305819T 1985-01-31 1985-08-15 Verfahren zum herstellen eines polysilicium-widerstandes in einer "polyzid"-leitung. Expired - Lifetime DE3576016D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/696,918 US4604789A (en) 1985-01-31 1985-01-31 Process for fabricating polysilicon resistor in polycide line

Publications (1)

Publication Number Publication Date
DE3576016D1 true DE3576016D1 (de) 1990-03-15

Family

ID=24799056

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585305819T Expired - Lifetime DE3576016D1 (de) 1985-01-31 1985-08-15 Verfahren zum herstellen eines polysilicium-widerstandes in einer "polyzid"-leitung.

Country Status (4)

Country Link
US (1) US4604789A (de)
EP (1) EP0192871B1 (de)
JP (1) JPS61182252A (de)
DE (1) DE3576016D1 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1186485B (it) * 1985-12-20 1987-11-26 Sgs Microelettronica Spa Circuito integrato monolitico,in particolare di tipo mos o cmos e processo per la realizzazione di tale circuito
US4837176A (en) * 1987-01-30 1989-06-06 Motorola Inc. Integrated circuit structures having polycrystalline electrode contacts and process
US4740478A (en) * 1987-01-30 1988-04-26 Motorola Inc. Integrated circuit method using double implant doping
US5067002A (en) * 1987-01-30 1991-11-19 Motorola, Inc. Integrated circuit structures having polycrystalline electrode contacts
GB8710359D0 (en) * 1987-05-01 1987-06-03 Inmos Ltd Semiconductor element
KR900008868B1 (ko) * 1987-09-30 1990-12-11 삼성전자 주식회사 저항성 접촉을 갖는 반도체 장치의 제조방법
US6004855A (en) * 1988-04-11 1999-12-21 Synergy Semiconductor Corporation Process for producing a high performance bipolar structure
DE68928787T2 (de) * 1988-04-11 1998-12-24 Synergy Semiconductor Corp., Santa Clara, Calif. Verfahren zur Herstellung eines Bipolartransistors
GB2262187A (en) * 1988-11-22 1993-06-09 Seiko Epson Corp Semiconductor resistors
JPH0434966A (ja) * 1990-05-30 1992-02-05 Seiko Instr Inc 半導体装置の製造方法
US5068201A (en) * 1990-05-31 1991-11-26 Sgs-Thomson Microelectronics, Inc. Method for forming a high valued resistive load element and low resistance interconnect for integrated circuits
US5268325A (en) * 1990-05-31 1993-12-07 Sgs-Thomson Microelectronics, Inc. Method for fabricating a polycrystalline silicon resistive load element in an integrated circuit
JPH04355912A (ja) * 1990-08-09 1992-12-09 Seiko Epson Corp 半導体装置及びその製造方法
US5462894A (en) * 1991-08-06 1995-10-31 Sgs-Thomson Microelectronics, Inc. Method for fabricating a polycrystalline silicon resistive load element in an integrated circuit
US5712196A (en) * 1995-06-07 1998-01-27 Advanced Micro Devices, Inc. Method for producing a low resistivity polycide
TW388109B (en) * 1997-02-11 2000-04-21 Winbond Electronics Corp Method for fabricating SRAM polyload
US6184103B1 (en) * 1998-06-26 2001-02-06 Sony Corporation High resistance polysilicon SRAM load elements and methods of fabricating therefor
US6232194B1 (en) 1999-11-05 2001-05-15 Taiwan Semiconductor Manufacturing Company Silicon nitride capped poly resistor with SAC process
US7112535B2 (en) * 2003-09-30 2006-09-26 International Business Machines Corporation Precision polysilicon resistor process
KR100887007B1 (ko) * 2007-10-12 2009-03-04 주식회사 동부하이텍 Ｌｄｉ의 알-스트링내 폴리 패턴 형성 방법 및 구조
US7785979B2 (en) * 2008-07-15 2010-08-31 International Business Machines Corporation Integrated circuits comprising resistors having different sheet resistances and methods of fabricating the same
EP3379222B1 (de) 2017-03-22 2020-12-30 Methode Electronics Malta Ltd. Auf magnetoelastik basierte sensoranordnung
US11084342B2 (en) 2018-02-27 2021-08-10 Methode Electronics, Inc. Towing systems and methods using magnetic field sensing
US11135882B2 (en) 2018-02-27 2021-10-05 Methode Electronics, Inc. Towing systems and methods using magnetic field sensing
US11491832B2 (en) 2018-02-27 2022-11-08 Methode Electronics, Inc. Towing systems and methods using magnetic field sensing
WO2019168565A1 (en) 2018-02-27 2019-09-06 Methode Electronics,Inc. Towing systems and methods using magnetic field sensing
US11221262B2 (en) 2018-02-27 2022-01-11 Methode Electronics, Inc. Towing systems and methods using magnetic field sensing

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3576478A (en) * 1969-07-22 1971-04-27 Philco Ford Corp Igfet comprising n-type silicon substrate, silicon oxide gate insulator and p-type polycrystalline silicon gate electrode
JPS5922380B2 (ja) * 1975-12-03 1984-05-26 株式会社東芝 ハンドウタイソシノ セイゾウホウホウ
US4110776A (en) * 1976-09-27 1978-08-29 Texas Instruments Incorporated Semiconductor integrated circuit with implanted resistor element in polycrystalline silicon layer
US4208781A (en) * 1976-09-27 1980-06-24 Texas Instruments Incorporated Semiconductor integrated circuit with implanted resistor element in polycrystalline silicon layer
US4136434A (en) * 1977-06-10 1979-01-30 Bell Telephone Laboratories, Incorporated Fabrication of small contact openings in large-scale-integrated devices
US4475964A (en) * 1979-02-20 1984-10-09 Tokyo Shibaura Denki Kabushiki Kaisha Method of manufacturing a semiconductor device
US4654680A (en) * 1980-09-24 1987-03-31 Semiconductor Energy Laboratory Co., Ltd. Sidewall gate IGFET
US4398335A (en) * 1980-12-09 1983-08-16 Fairchild Camera & Instrument Corporation Multilayer metal silicide interconnections for integrated circuits
US4446613A (en) * 1981-10-19 1984-05-08 Intel Corporation Integrated circuit resistor and method of fabrication
DE3132809A1 (de) * 1981-08-19 1983-03-10 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von integrierten mos-feldeffekttransistoren, insbesondere von komplementaeren mos-feldeffekttransistorenschaltungen mit einer aus metallsiliziden bestehenden zusaetzlichen leiterbahnebene
FR2515427A1 (fr) * 1981-10-27 1983-04-29 Efcis Procede de fabrication de resistances de forte valeur pour circuits integres
US4400867A (en) * 1982-04-26 1983-08-30 Bell Telephone Laboratories, Incorporated High conductivity metallization for semiconductor integrated circuits
US4503601A (en) * 1983-04-18 1985-03-12 Ncr Corporation Oxide trench structure for polysilicon gates and interconnects

Also Published As

Publication number Publication date
JPS61182252A (ja) 1986-08-14
EP0192871B1 (de) 1990-02-07
US4604789A (en) 1986-08-12
EP0192871A1 (de) 1986-09-03

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Legal Events

Date Code Title Description
8363 Opposition against the patent
8365 Fully valid after opposition proceedings
8339 Ceased/non-payment of the annual fee