DE3478170D1 - A c-mos device and process for manufacturing the same - Google Patents

A c-mos device and process for manufacturing the same

Info

Publication number
DE3478170D1
DE3478170D1 DE8484108241T DE3478170T DE3478170D1 DE 3478170 D1 DE3478170 D1 DE 3478170D1 DE 8484108241 T DE8484108241 T DE 8484108241T DE 3478170 T DE3478170 T DE 3478170T DE 3478170 D1 DE3478170 D1 DE 3478170D1
Authority
DE
Germany
Prior art keywords
manufacturing
same
mos device
mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8484108241T
Other languages
English (en)
Inventor
Satoshi C O Patent Divis Maeda
Hiroshi C O Patent Divisi Iwai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP58128919A external-priority patent/JPS6021560A/ja
Priority claimed from JP58138801A external-priority patent/JPS6030167A/ja
Priority claimed from JP58138802A external-priority patent/JPS6030168A/ja
Priority claimed from JP58138803A external-priority patent/JPS6030169A/ja
Priority claimed from JP58182655A external-priority patent/JPS6074664A/ja
Priority claimed from JP58180544A external-priority patent/JPS6074564A/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3478170D1 publication Critical patent/DE3478170D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76294Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using selective deposition of single crystal silicon, i.e. SEG techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823878Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0922Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
DE8484108241T 1983-07-15 1984-07-13 A c-mos device and process for manufacturing the same Expired DE3478170D1 (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP58128919A JPS6021560A (ja) 1983-07-15 1983-07-15 相補型mos半導体装置及びその製造方法
JP58138801A JPS6030167A (ja) 1983-07-29 1983-07-29 相補型mos半導体装置及びその製造方法
JP58138802A JPS6030168A (ja) 1983-07-29 1983-07-29 相補型mos半導体装置及びその製造方法
JP58138803A JPS6030169A (ja) 1983-07-29 1983-07-29 相補型mos半導体装置及びその製造方法
JP58182655A JPS6074664A (ja) 1983-09-30 1983-09-30 相補型mos半導体装置の製造方法
JP58180544A JPS6074564A (ja) 1983-09-30 1983-09-30 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3478170D1 true DE3478170D1 (en) 1989-06-15

Family

ID=27552731

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484108241T Expired DE3478170D1 (en) 1983-07-15 1984-07-13 A c-mos device and process for manufacturing the same

Country Status (3)

Country Link
US (1) US5079183A (de)
EP (1) EP0134504B1 (de)
DE (1) DE3478170D1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0178649B1 (de) * 1984-10-17 1991-07-24 Hitachi, Ltd. Komplementäre Halbleiteranordnung
KR890017771A (ko) * 1988-05-20 1989-12-18 강진구 반도체장치 제조방법
US5010034A (en) * 1989-03-07 1991-04-23 National Semiconductor Corporation CMOS and bipolar fabrication process using selective epitaxial growth scalable to below 0.5 micron
JPH03296247A (ja) * 1990-04-13 1991-12-26 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP3556679B2 (ja) * 1992-05-29 2004-08-18 株式会社半導体エネルギー研究所 電気光学装置
JPH05183159A (ja) * 1992-01-07 1993-07-23 Fujitsu Ltd 半導体装置及びその製造方法
US5340754A (en) * 1992-09-02 1994-08-23 Motorla, Inc. Method for forming a transistor having a dynamic connection between a substrate and a channel region
US6445043B1 (en) * 1994-11-30 2002-09-03 Agere Systems Isolated regions in an integrated circuit
JP3223895B2 (ja) * 1998-12-15 2001-10-29 日本電気株式会社 半導体装置の製造方法
US7348652B2 (en) * 2003-03-07 2008-03-25 Micron Technology, Inc. Bulk-isolated PN diode and method of forming a bulk-isolated PN diode
JP2005244020A (ja) * 2004-02-27 2005-09-08 Toshiba Corp 半導体装置及びその製造方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3861968A (en) * 1972-06-19 1975-01-21 Ibm Method of fabricating integrated circuit device structure with complementary elements utilizing selective thermal oxidation and selective epitaxial deposition
JPS51135385A (en) * 1975-03-06 1976-11-24 Texas Instruments Inc Method of producing semiconductor device
US4145803A (en) * 1977-07-22 1979-03-27 Texas Instruments Incorporated Lithographic offset alignment techniques for RAM fabrication
US4319395A (en) * 1979-06-28 1982-03-16 Motorola, Inc. Method of making self-aligned device
JPS571225A (en) * 1980-06-03 1982-01-06 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS5768049A (en) * 1980-10-15 1982-04-26 Fujitsu Ltd Semiconductor device and manufacture thereof
JPS5776830A (en) * 1980-10-31 1982-05-14 Fujitsu Ltd Semiconductor substrate
JPS5893252A (ja) * 1981-11-30 1983-06-02 Toshiba Corp 半導体装置及びその製造方法
US4412868A (en) * 1981-12-23 1983-11-01 General Electric Company Method of making integrated circuits utilizing ion implantation and selective epitaxial growth
JPS58114419A (ja) * 1981-12-28 1983-07-07 Fujitsu Ltd 半導体装置用基板の製造方法
JPS58115832A (ja) * 1981-12-28 1983-07-09 Fujitsu Ltd 半導体装置の製造方法
JPS58114422A (ja) * 1981-12-28 1983-07-07 Fujitsu Ltd 半導体装置用基板の製造方法
US4554570A (en) * 1982-06-24 1985-11-19 Rca Corporation Vertically integrated IGFET device
US4571818A (en) * 1983-09-29 1986-02-25 At&T Bell Laboratories Isolation process for high-voltage semiconductor devices
US4536945A (en) * 1983-11-02 1985-08-27 National Semiconductor Corporation Process for producing CMOS structures with Schottky bipolar transistors

Also Published As

Publication number Publication date
EP0134504A1 (de) 1985-03-20
US5079183A (en) 1992-01-07
EP0134504B1 (de) 1989-05-10

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