DE3366266D1 - Method of manufacturing an insulated gate field effect device and device manufactured by the method - Google Patents

Method of manufacturing an insulated gate field effect device and device manufactured by the method

Info

Publication number
DE3366266D1
DE3366266D1 DE8383200968T DE3366266T DE3366266D1 DE 3366266 D1 DE3366266 D1 DE 3366266D1 DE 8383200968 T DE8383200968 T DE 8383200968T DE 3366266 T DE3366266 T DE 3366266T DE 3366266 D1 DE3366266 D1 DE 3366266D1
Authority
DE
Germany
Prior art keywords
manufacturing
field effect
insulated gate
gate field
effect device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383200968T
Other languages
English (en)
Inventor
Henricus Godefridus Rafae Maas
Francois Marinus Klaassen
Johannes Arnoldus Appels
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE3366266D1 publication Critical patent/DE3366266D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843Source or drain regions of field-effect devices
    • H01L29/0847Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7834Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a non-planar structure, e.g. the gate or the source or the drain being non-planar

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
DE8383200968T 1982-07-05 1983-06-29 Method of manufacturing an insulated gate field effect device and device manufactured by the method Expired DE3366266D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL8202686A NL8202686A (nl) 1982-07-05 1982-07-05 Werkwijze ter vervaardiging van een veldeffektinrichting met geisoleerde stuurelektrode, en inrichting vervaardigd volgens de werkwijze.

Publications (1)

Publication Number Publication Date
DE3366266D1 true DE3366266D1 (en) 1986-10-23

Family

ID=19839970

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383200968T Expired DE3366266D1 (en) 1982-07-05 1983-06-29 Method of manufacturing an insulated gate field effect device and device manufactured by the method

Country Status (6)

Country Link
US (1) US4545110A (de)
EP (1) EP0098652B1 (de)
JP (1) JPS5922366A (de)
CA (1) CA1206625A (de)
DE (1) DE3366266D1 (de)
NL (1) NL8202686A (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8302541A (nl) * 1983-07-15 1985-02-01 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting, en halfgeleiderinrichting vervaardigd volgens de werkwijze.
NL8400224A (nl) * 1984-01-25 1985-08-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting en inrichting vervaardigd door toepassing daarvan.
NL8402223A (nl) * 1984-07-13 1986-02-03 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting en inrichting, vervaardigd door toepassing daarvan.
NL8402859A (nl) * 1984-09-18 1986-04-16 Philips Nv Werkwijze voor het vervaardigen van submicrongroeven in bijvoorbeeld halfgeleidermateriaal en met deze werkwijze verkregen inrichtingen.
FR2573919B1 (fr) * 1984-11-06 1987-07-17 Thomson Csf Procede de fabrication de grilles pour circuit integre
JPS61140122A (ja) * 1984-12-13 1986-06-27 Mitsubishi Electric Corp 負荷時タツプ切換装置
US4653173A (en) * 1985-03-04 1987-03-31 Signetics Corporation Method of manufacturing an insulated gate field effect device
GB2172743B (en) * 1985-03-23 1988-11-16 Stc Plc Improvements in integrated circuits
US4649629A (en) * 1985-07-29 1987-03-17 Thomson Components - Mostek Corp. Method of late programming a read only memory
NL8700640A (nl) * 1987-03-18 1988-10-17 Philips Nv Halfgeleiderinrichting en werkwijze ter vervaardiging daarvan.
JPS63262873A (ja) * 1987-04-21 1988-10-31 Fuji Xerox Co Ltd 半導体装置
GB2215515A (en) * 1988-03-14 1989-09-20 Philips Electronic Associated A lateral insulated gate field effect transistor and a method of manufacture
JPH0258206A (ja) * 1988-08-23 1990-02-27 Mitsubishi Electric Corp 負荷時タップ切換装置
EP0452720A3 (en) * 1990-04-02 1994-10-26 Nat Semiconductor Corp A semiconductor structure and method of its manufacture
US5039621A (en) * 1990-06-08 1991-08-13 Texas Instruments Incorporated Semiconductor over insulator mesa and method of forming the same
EP0730309B1 (de) * 1995-02-21 1998-10-14 STMicroelectronics S.r.l. Hochspannungs-MOSFET mit Feldplatten-Elektrode und Verfahren zur Herstellung
US5888873A (en) * 1996-11-06 1999-03-30 Advanced Micro Devices, Inc. Method of manufacturing short channel MOS devices
US6525340B2 (en) * 2001-06-04 2003-02-25 International Business Machines Corporation Semiconductor device with junction isolation
US7166867B2 (en) * 2003-12-05 2007-01-23 International Rectifier Corporation III-nitride device with improved layout geometry
JP2006275124A (ja) * 2005-03-29 2006-10-12 Shinwa Sangyo Co Ltd 都市ガス用ガスコック

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5284981A (en) * 1976-01-06 1977-07-14 Mitsubishi Electric Corp Production of insulated gate type semiconductor device
JPS54140483A (en) * 1978-04-21 1979-10-31 Nec Corp Semiconductor device
US4173818A (en) * 1978-05-30 1979-11-13 International Business Machines Corporation Method for fabricating transistor structures having very short effective channels
JPS5621372A (en) * 1979-07-31 1981-02-27 Fujitsu Ltd Manufacture of semiconductor device
NL187328C (nl) * 1980-12-23 1991-08-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
US4419809A (en) * 1981-12-30 1983-12-13 International Business Machines Corporation Fabrication process of sub-micrometer channel length MOSFETs

Also Published As

Publication number Publication date
JPS5922366A (ja) 1984-02-04
EP0098652B1 (de) 1986-09-17
EP0098652A3 (en) 1984-02-22
CA1206625A (en) 1986-06-24
NL8202686A (nl) 1984-02-01
EP0098652A2 (de) 1984-01-18
US4545110A (en) 1985-10-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee