DE3275789D1 - Substrate for mounting integrated circuit chips - Google Patents

Substrate for mounting integrated circuit chips

Info

Publication number
DE3275789D1
DE3275789D1 DE8282110816T DE3275789T DE3275789D1 DE 3275789 D1 DE3275789 D1 DE 3275789D1 DE 8282110816 T DE8282110816 T DE 8282110816T DE 3275789 T DE3275789 T DE 3275789T DE 3275789 D1 DE3275789 D1 DE 3275789D1
Authority
DE
Germany
Prior art keywords
substrate
integrated circuit
circuit chips
mounting integrated
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282110816T
Other languages
German (de)
English (en)
Inventor
Robert Marks
Douglas Wallace Phelps
William Carroll Ward
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3275789D1 publication Critical patent/DE3275789D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H05K3/4015—Surface contacts, e.g. bumps using auxiliary conductive elements, e.g. pieces of metal foil, metallic spheres
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07511—Treating the bonding area before connecting, e.g. by applying flux or cleaning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07531—Techniques
    • H10W72/07532—Compression bonding, e.g. thermocompression bonding
    • H10W72/07533—Ultrasonic bonding, e.g. thermosonic bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5434—Dispositions of bond wires the connected ends being on auxiliary connecting means on bond pads, e.g. on other bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/879—Bump connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
DE8282110816T 1981-12-09 1982-11-23 Substrate for mounting integrated circuit chips Expired DE3275789D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/328,889 US4447857A (en) 1981-12-09 1981-12-09 Substrate with multiple type connections

Publications (1)

Publication Number Publication Date
DE3275789D1 true DE3275789D1 (en) 1987-04-23

Family

ID=23282896

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282110816T Expired DE3275789D1 (en) 1981-12-09 1982-11-23 Substrate for mounting integrated circuit chips

Country Status (4)

Country Link
US (1) US4447857A (https=)
EP (1) EP0081135B1 (https=)
JP (1) JPS58101493A (https=)
DE (1) DE3275789D1 (https=)

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JPS58169942A (ja) * 1982-03-29 1983-10-06 Fujitsu Ltd 半導体装置
JPS61296800A (ja) * 1985-06-25 1986-12-27 日本電気株式会社 設計変更用電極
DE3685647T2 (de) * 1985-07-16 1993-01-07 Nippon Telegraph & Telephone Verbindungskontakte zwischen substraten und verfahren zur herstellung derselben.
US5917707A (en) 1993-11-16 1999-06-29 Formfactor, Inc. Flexible contact structure with an electrically conductive shell
US4706166A (en) * 1986-04-25 1987-11-10 Irvine Sensors Corporation High-density electronic modules--process and product
US4873615A (en) * 1986-10-09 1989-10-10 Amp Incorporated Semiconductor chip carrier system
US4837928A (en) * 1986-10-17 1989-06-13 Cominco Ltd. Method of producing a jumper chip for semiconductor devices
US5189507A (en) * 1986-12-17 1993-02-23 Raychem Corporation Interconnection of electronic components
US4955523A (en) * 1986-12-17 1990-09-11 Raychem Corporation Interconnection of electronic components
US4860443A (en) * 1987-01-21 1989-08-29 Hughes Aircraft Company Method for connecting leadless chip package
DE3704200A1 (de) * 1987-02-11 1988-08-25 Bbc Brown Boveri & Cie Verfahren zur herstellung einer verbindung zwischen einem bonddraht und einer kontaktflaeche bei hybriden dickschicht-schaltkreisen
JPS63158863U (https=) * 1987-04-07 1988-10-18
DE3817600C2 (de) * 1987-05-26 1994-06-23 Matsushita Electric Works Ltd Verfahren zur Herstellung einer Halbleitervorrichtung mit einem keramischen Substrat und einem integrierten Schaltungskreis
JP2673993B2 (ja) * 1990-07-02 1997-11-05 日本無線株式会社 表面弾性波装置
US5274531A (en) * 1991-06-17 1993-12-28 The Intec Group, Inc. Lead frame with aluminum rivets
SE9202077L (sv) * 1992-07-06 1994-01-07 Ellemtel Utvecklings Ab Komponentmodul
JP2783093B2 (ja) * 1992-10-21 1998-08-06 日本電気株式会社 プリント配線板
US20020053734A1 (en) 1993-11-16 2002-05-09 Formfactor, Inc. Probe card assembly and kit, and methods of making same
US7073254B2 (en) 1993-11-16 2006-07-11 Formfactor, Inc. Method for mounting a plurality of spring contact elements
US5820014A (en) 1993-11-16 1998-10-13 Form Factor, Inc. Solder preforms
US5455390A (en) * 1994-02-01 1995-10-03 Tessera, Inc. Microelectronics unit mounting with multiple lead bonding
US6117694A (en) * 1994-07-07 2000-09-12 Tessera, Inc. Flexible lead structures and methods of making same
US5798286A (en) * 1995-09-22 1998-08-25 Tessera, Inc. Connecting multiple microelectronic elements with lead deformation
US5830782A (en) * 1994-07-07 1998-11-03 Tessera, Inc. Microelectronic element bonding with deformation of leads in rows
US5688716A (en) 1994-07-07 1997-11-18 Tessera, Inc. Fan-out semiconductor chip assembly
US5518964A (en) * 1994-07-07 1996-05-21 Tessera, Inc. Microelectronic mounting with multiple lead deformation and bonding
US6828668B2 (en) * 1994-07-07 2004-12-07 Tessera, Inc. Flexible lead structures and methods of making same
US6429112B1 (en) 1994-07-07 2002-08-06 Tessera, Inc. Multi-layer substrates and fabrication processes
US6848173B2 (en) * 1994-07-07 2005-02-01 Tessera, Inc. Microelectric packages having deformed bonded leads and methods therefor
US6204074B1 (en) 1995-01-09 2001-03-20 International Business Machines Corporation Chip design process for wire bond and flip-chip package
US5844317A (en) * 1995-12-21 1998-12-01 International Business Machines Corporation Consolidated chip design for wire bond and flip-chip package technologies
US7166495B2 (en) * 1996-02-20 2007-01-23 Micron Technology, Inc. Method of fabricating a multi-die semiconductor package assembly
US5696031A (en) * 1996-11-20 1997-12-09 Micron Technology, Inc. Device and method for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
US8033838B2 (en) 1996-02-21 2011-10-11 Formfactor, Inc. Microelectronic contact structure
US5994152A (en) 1996-02-21 1999-11-30 Formfactor, Inc. Fabricating interconnects and tips using sacrificial substrates
GB2356490B (en) * 1996-08-27 2001-08-15 Nec Corp A multi-chip module mountable on a printed circuit board
US5969417A (en) * 1996-08-27 1999-10-19 Nec Corporation Chip package device mountable on a mother board in whichever of facedown and wire bonding manners
US6133072A (en) * 1996-12-13 2000-10-17 Tessera, Inc. Microelectronic connector with planar elastomer sockets
US5907769A (en) * 1996-12-30 1999-05-25 Micron Technology, Inc. Leads under chip in conventional IC package
JP3681542B2 (ja) * 1998-07-01 2005-08-10 富士通株式会社 プリント回路基板および多段バンプ用中継基板
US6373143B1 (en) 1998-09-24 2002-04-16 International Business Machines Corporation Integrated circuit having wirebond pads suitable for probing
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US6395994B1 (en) * 2000-01-31 2002-05-28 Visteon Global Technologies, Inc. Etched tri-metal with integrated wire traces for wire bonding
US7173336B2 (en) * 2000-01-31 2007-02-06 Sanyo Electric Co., Ltd. Hybrid integrated circuit device
US6611434B1 (en) * 2000-10-30 2003-08-26 Siliconware Precision Industries Co., Ltd. Stacked multi-chip package structure with on-chip integration of passive component
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US8125060B2 (en) 2006-12-08 2012-02-28 Infineon Technologies Ag Electronic component with layered frame
US9269681B2 (en) 2012-11-16 2016-02-23 Qualcomm Incorporated Surface finish on trace for a thermal compression flip chip (TCFC)
US11239158B1 (en) * 2020-10-08 2022-02-01 Qualcomm Incorporated Wire bond inductor structures for flip chip dies
CN121215638A (zh) * 2025-09-24 2025-12-26 无锡中微高科电子有限公司 一种异质芯片集成的高温封装结构及其封装方法

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US3544704A (en) * 1969-01-21 1970-12-01 Motorola Inc Bonding islands for hybrid circuits
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Also Published As

Publication number Publication date
JPS58101493A (ja) 1983-06-16
US4447857A (en) 1984-05-08
JPS6352776B2 (https=) 1988-10-20
EP0081135B1 (en) 1987-03-18
EP0081135A3 (en) 1984-07-25
EP0081135A2 (en) 1983-06-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee