DE3221304A1 - Process for producing dielectrically insulated solid-state circuits - Google Patents
Process for producing dielectrically insulated solid-state circuitsInfo
- Publication number
- DE3221304A1 DE3221304A1 DE19823221304 DE3221304A DE3221304A1 DE 3221304 A1 DE3221304 A1 DE 3221304A1 DE 19823221304 DE19823221304 DE 19823221304 DE 3221304 A DE3221304 A DE 3221304A DE 3221304 A1 DE3221304 A1 DE 3221304A1
- Authority
- DE
- Germany
- Prior art keywords
- silicon
- layer
- silicon dioxide
- areas
- monocrystalline
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76267—Vertical isolation by silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76281—Lateral isolation by selective oxidation of silicon
Abstract
Description
Verfahren zum Herstellen dielektrisch isolierterProcess for producing dielectrically isolated
Festkörperschaltkreise Die vorliegende Erfindung betrifft ein Verfahren zum Herstellen dielektrisch isolierter Festkörperschaltkreise, die in einem einkristallinen Siliciumträger angeordnet sind.Solid State Circuits The present invention relates to a method for the production of dielectrically isolated solid-state circuits in a single-crystal Silicon carriers are arranged.
Bei der Herstellung von dielektrisch isolierten Festkörperschaltkreisen für Hochfrequenz- oder Hochvolt-Anwendungen wird vielfach von Saphirsubstraten ausgegangen. Diese sind jedoch teuer.In the manufacture of dielectrically isolated solid-state circuits for high-frequency or high-voltage applications, sapphire substrates are often assumed. However, these are expensive.
Aus "IEEE Transactions on Electron Devices", Januar 1980, Seite 290 ist ein Verfahren zum Herstellen von integrierten Schaltkreisen bekannt, wobei deren aktive Teile in Zonen (Inseln) aus mit Laserstrahlen getemperten Polysilicium angeordnet sind, die von Umrandungen bildenden Zonen aus Siliciumdioxid umgeben sind.From "IEEE Transactions on Electron Devices", January 1980, p. 290 a method for producing integrated circuits is known, the active parts arranged in zones (islands) made of polysilicon annealed with laser beams which are surrounded by border-forming zones of silicon dioxide.
Ausgehend von einem Siliciumsubstrat wird dabei zunächst eine Siliciumnitridschicht als Isolierung und auf dieser wiederum eine Schicht aus Polysilicium abgeschieden. Mit Hilfe einer Siliciumnitridmaske wird dann die Polysiliciumschicht nach dem LOCOS-Verfahren an den vorgesehenen Stellen oxidiert, so daß die angestrebten Polysiliciuminseln erhalten blieben.Starting from a silicon substrate, a silicon nitride layer is initially created as insulation and on this in turn a layer of polysilicon is deposited. With the aid of a silicon nitride mask, the polysilicon layer is then formed using the LOCOS method oxidized at the intended locations, so that the desired polysilicon islands remained.
Ein weiteres Verfahren ist aus "IEEE Electronic Devices Letters", Nr. 10, Oktober 1980, Seite 214 bekannt. Ausgehend von einem Quarz substrat und einer darauf abgeschiedenen Polysiliciumschicht wird wiederum mittels LOCOS-Verfahren an bestimmten Stellen das Polysilicium in SiO2 umgewandelt, so daß Inseln aus Polysilicium entstehen, die dann mittels Laserbestrahlung rekristallisiert werden. In diesen isolierten polykristallinen Siliciuminseln werden denn die Bauelemente wie z.B. MOS-FETs ausgebildet.Another method is from "IEEE Electronic Devices Letters", No. 10, October 1980, page 214. Starting from a quartz substrate and one separated on it Polysilicon layer is in turn by means of LOCOS process converts the polysilicon into SiO2 at certain points, so that Polysilicon islands are created, which are then recrystallized by means of laser irradiation will. The components are then located in these isolated polycrystalline silicon islands such as MOS-FETs.
Die vorliegende Erfindung, wie sie in den Ansprüchen gekennzeichnet ist, löst dagegen die Aufgabe, ein Verfahren zum Herstellen dielektrisch isolierter Festkörperschaltkreise anzugeben, die in einkristallinen Siliciuminseln angeordnet sind.The present invention as characterized in the claims is, however, solves the problem of a method for producing dielectrically isolated Specify solid-state circuits arranged in single-crystal silicon islands are.
Die Erfindung wird an einem Ausführungsbeispiel in Verbindung mit den Figuren der beigefügten Zeichnung erläutert.The invention is based on an embodiment in connection with the figures of the accompanying drawing explained.
Die Fig. 1 bis 6 stellen einzelne Stufen der Herstellung des Ausführungsbeispiels dar.FIGS. 1 to 6 show individual stages in the production of the exemplary embodiment represent.
Ausgehend von einem einkristallinen Siliciumsubstrat 1 werden zunächst bestimmte inselförmige Bereiche der einen Hauptflache desselben in Siliciumdioxidschichten 2 umgewandelt.Starting from a monocrystalline silicon substrate 1, certain island-shaped areas of one major surface of the same in silicon dioxide layers 2 converted.
Dies kann zum einen durch lokale Oxidation mit Hilfe einer Siliciutnnitridmaske nach dem bekannten LOCOS-Verfahren geschehen oder zum anderen durch Aufbringen einer Oxidschicht über einer der auptflche des Siliciumsubstrates, und zwar thermisch oder durch CVD (chemical vapor deposition chemische Abscheidung aus der Dampfphase), dem sich ein maskiertes Abcitzen des Oxids bis hinunter auf die SiliciumsubstratoberflAche anschließt.This can be done on the one hand by local oxidation with the aid of a silicon nitride mask done according to the known LOCOS process or on the other hand by applying a Oxide layer over one of the main surfaces of the silicon substrate, namely thermally or by CVD (chemical vapor deposition), masked abrasion of the oxide down to the silicon substrate surface connects.
Sodann wird nach einer der herkömmlichen Verfahren eine polykristallille Siliciumschicht 3 über den inselförmigen Siliciumoxidschichten 2 und den freiliegenden, die Inseln umgebenden Bcreichen 4 der OberflAche des Siliciumsubstrats 1 abgeschieden (Fig. 1).Then, according to one of the conventional methods, a polycrystalline Silicon layer 3 over the island-shaped silicon oxide layers 2 and the exposed, The areas surrounding the islands 4 of the surface of the silicon substrate 1 are deposited (Fig. 1).
Innerhalb dieser Kanalnetz- oder fensterrclhmcnfornlign Bereiche 4 befindet sich die polykristalline Siliciumschicht 3 somit im direkten Kontakt mit dem Siliciumsubstrat 1.Within this sewer network or window area 4 the polycrystalline silicon layer 3 is thus in direct contact with the silicon substrate 1.
Als nächster Schritt erfolgt eine lokale Laser- oder Elektronenstrahlbehandlung der Polysil iciumschichü 3 in de Bereichen,die direkten Kontakt mit dem einkristallinen Siliciumsubstrat 1 haben. Unter Mitwirkung des letzteren als Kristallkeim wird dabei die bestrahlte und aufgeschmolzene Zone der Polysiliciumschicht 3 in einkristallines Silicium verwandelt. Durch entsprechende Führung des Strahles wird eine epitaktische Rekristallisierung auch der Teile der Polysilciumschicht 3 bewirkt, die über den Siliciumoxidschichten 2 liegen (Fig. 3), so daß letztlich die gesamte Polysiliciumschicht 3 in den einkristallinen Zustand tbergeführt wird.The next step is local laser or electron beam treatment the polysilicon layer 3 in the areas that are in direct contact with the monocrystalline Have silicon substrate 1. With the participation of the latter as a crystal nucleus is thereby the irradiated and melted zone of the polysilicon layer 3 in monocrystalline Transforms silicon. Appropriate guidance of the beam becomes epitaxial Recrystallization also causes the parts of the polysilicon layer 3, which over the Silicon oxide layers 2 are (Fig. 3), so that ultimately the entire polysilicon layer 3 is converted into the monocrystalline state.
Durch eine zweite lokale Oxidation unter Verwendung einer Siliciumnitridmaske 6 werden die Bereiche der einkristallinen Siliciumschicht 5 in Siliciumdioxidzonen 2' verwandelt, die an das Siliciumsubstrat 1 angrenzen (Fig. 4, Fig. 5).By a second local oxidation using a silicon nitride mask 6 become the regions of the single crystal silicon layer 5 in silicon dioxide zones 2 ', which adjoin the silicon substrate 1 (Fig. 4, Fig. 5).
Nach Abätzen der Siliciumnitridmaske resultiert die in Fig. 6 gezeigte Struktur, die völlig isolierte einkristalline Siliciuminseln 7 zeigt, in denen Schaltkreise oder Schaltkreisteile nach bekannten Verfahrensschritten angeordnet werden können. Dickere Inselbereiche können im Anschluß daran durch weitere Siliciumbeschichtungen, und zwar direkt epitaktisch oder über Polysilicium mit Rekristallisierung und wiederholte lokale Oxidation unter Ausbildung der Umrandungszonen aus Siliciumdioxid erhalten werden.After the silicon nitride mask has been etched off, that shown in FIG. 6 results Structure showing completely isolated monocrystalline silicon islands 7 in which circuits or circuit parts can be arranged according to known method steps. Thicker island areas can then be replaced by further silicon coatings, directly epitaxially or via polysilicon with recrystallization and repeated local oxidation obtained with the formation of the peripheral zones of silicon dioxide will.
Das vorliegende Verfahren ermöc;lichst also die Herstellung einer Oxid-isolierten einkrista]#linen Siliciumzoiie oder Insel, die gegenüber einem einkristallinen Siliciumsubstrat wie auch wie auch gegenüber weiteren Siliciuminseln isoliert ist.The present process therefore enables the production of a Oxide-isolated single crystal or island, which is opposite to a monocrystalline silicon substrate as well as against other silicon islands is isolated.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19823221304 DE3221304A1 (en) | 1982-06-05 | 1982-06-05 | Process for producing dielectrically insulated solid-state circuits |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19823221304 DE3221304A1 (en) | 1982-06-05 | 1982-06-05 | Process for producing dielectrically insulated solid-state circuits |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3221304A1 true DE3221304A1 (en) | 1983-12-08 |
Family
ID=6165440
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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DE19823221304 Withdrawn DE3221304A1 (en) | 1982-06-05 | 1982-06-05 | Process for producing dielectrically insulated solid-state circuits |
Country Status (1)
Country | Link |
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DE (1) | DE3221304A1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1986002198A1 (en) * | 1984-10-05 | 1986-04-10 | Michel Haond | Method for making monocrystalline silicon islands electrically isolated from each other |
US5338692A (en) * | 1989-04-27 | 1994-08-16 | Max-Planck-Gesellschaft Zur Forderung Der Wissenschaften E.V. | Method of generating active semiconductor structures by means of starting structures which have a 2D charge carrier layer parallel to the surface |
US5385865A (en) * | 1990-04-26 | 1995-01-31 | Max-Planck-Gesellschaft Zur Forderung Der Wissenschaften | Method of generating active semiconductor structures by means of starting structures which have a 2D charge carrier layer parallel to the surface |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2535813C2 (en) * | 1975-08-11 | 1980-11-20 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Process for the production of monocrystalline layers of semiconductor material on an electrically insulating substrate |
-
1982
- 1982-06-05 DE DE19823221304 patent/DE3221304A1/en not_active Withdrawn
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2535813C2 (en) * | 1975-08-11 | 1980-11-20 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Process for the production of monocrystalline layers of semiconductor material on an electrically insulating substrate |
Non-Patent Citations (4)
Title |
---|
US-Z: Electronics, 3. Juli 1980, H.3, S.44,45 * |
US-Z: Electronics, 8. Juni 1980, Bd.43, H.12, S. 88 bis 94 * |
US-Z: IBM Technical Dislcosure Bulletin, Bd.24, H.6, 1981, S.2955-2957 * |
US-Z: IEEE Transactions on Electron Devices, 1980, Bd. ED-27, H.1, S.290 bis 293 * |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1986002198A1 (en) * | 1984-10-05 | 1986-04-10 | Michel Haond | Method for making monocrystalline silicon islands electrically isolated from each other |
FR2571544A1 (en) * | 1984-10-05 | 1986-04-11 | Haond Michel | PROCESS FOR THE PRODUCTION OF MONOCRYSTALLINE SILICON ILOTS ISOLATED ELECTRICALLY FROM ONE OF OTHERS |
US5338692A (en) * | 1989-04-27 | 1994-08-16 | Max-Planck-Gesellschaft Zur Forderung Der Wissenschaften E.V. | Method of generating active semiconductor structures by means of starting structures which have a 2D charge carrier layer parallel to the surface |
US5396089A (en) * | 1989-04-27 | 1995-03-07 | Max-Planck-Gesellschaft Zur Forderung Der Wissenschaften | Method of generating active semiconductor structures by means of starting structures which have a 2D charge carrier layer parallel to the surface |
US5385865A (en) * | 1990-04-26 | 1995-01-31 | Max-Planck-Gesellschaft Zur Forderung Der Wissenschaften | Method of generating active semiconductor structures by means of starting structures which have a 2D charge carrier layer parallel to the surface |
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Legal Events
Date | Code | Title | Description |
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OM8 | Search report available as to paragraph 43 lit. 1 sentence 1 patent law | ||
8130 | Withdrawal |