DE3170156D1 - Error propagation inhibiting method, and device for a security processor - Google Patents

Error propagation inhibiting method, and device for a security processor

Info

Publication number
DE3170156D1
DE3170156D1 DE8181401555T DE3170156T DE3170156D1 DE 3170156 D1 DE3170156 D1 DE 3170156D1 DE 8181401555 T DE8181401555 T DE 8181401555T DE 3170156 T DE3170156 T DE 3170156T DE 3170156 D1 DE3170156 D1 DE 3170156D1
Authority
DE
Germany
Prior art keywords
breakdowns
definite
security processor
circuits
error propagation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181401555T
Other languages
German (de)
English (en)
Inventor
Remy Fourre
Langre Bruno De
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AERO ETUDES CONSEILS
Original Assignee
AERO ETUDES CONSEILS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AERO ETUDES CONSEILS filed Critical AERO ETUDES CONSEILS
Application granted granted Critical
Publication of DE3170156D1 publication Critical patent/DE3170156D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Electrophonic Musical Instruments (AREA)
  • Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)
  • Communication Control (AREA)
  • Devices For Executing Special Programs (AREA)
  • Multi Processors (AREA)
DE8181401555T 1980-10-15 1981-10-07 Error propagation inhibiting method, and device for a security processor Expired DE3170156D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8022040A FR2492131A1 (fr) 1980-10-15 1980-10-15 Procede et dispositif d'interdiction de propagation d'erreurs dans un processeur de securite

Publications (1)

Publication Number Publication Date
DE3170156D1 true DE3170156D1 (en) 1985-05-30

Family

ID=9246915

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8181401555T Expired DE3170156D1 (en) 1980-10-15 1981-10-07 Error propagation inhibiting method, and device for a security processor

Country Status (11)

Country Link
US (1) US4460996A (https=)
EP (1) EP0050076B1 (https=)
JP (1) JPS5798046A (https=)
AT (1) ATE12991T1 (https=)
AU (1) AU547218B2 (https=)
BR (1) BR8106501A (https=)
CA (1) CA1174367A (https=)
DE (1) DE3170156D1 (https=)
FR (1) FR2492131A1 (https=)
IL (1) IL63919A (https=)
ZA (1) ZA816669B (https=)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3548175A (en) * 1968-01-15 1970-12-15 Ltv Electrosystems Inc Error detector for frequency changers
FR1565552A (https=) * 1968-03-08 1969-05-02
SE308038B (https=) * 1968-04-18 1969-01-27 Ericsson Telefon Ab L M
US3699323A (en) * 1970-12-23 1972-10-17 Ibm Error detecting and correcting system and method
US3716834A (en) * 1971-10-07 1973-02-13 H Adams Data transmission system with immunity to circuit faults
US4320512A (en) * 1980-06-23 1982-03-16 The Bendix Corporation Monitored digital system

Also Published As

Publication number Publication date
EP0050076A3 (en) 1982-05-05
ZA816669B (en) 1982-09-29
EP0050076A2 (fr) 1982-04-21
JPS5798046A (en) 1982-06-18
FR2492131A1 (fr) 1982-04-16
FR2492131B1 (https=) 1982-11-19
BR8106501A (pt) 1982-06-29
AU7633281A (en) 1982-04-22
IL63919A0 (en) 1981-12-31
ATE12991T1 (de) 1985-05-15
US4460996A (en) 1984-07-17
EP0050076B1 (fr) 1985-04-24
AU547218B2 (en) 1985-10-10
CA1174367A (en) 1984-09-11
IL63919A (en) 1984-12-31

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee