DE3131875A1 - Method for producing a semiconductor pattern, and semiconductor pattern - Google Patents

Method for producing a semiconductor pattern, and semiconductor pattern

Info

Publication number
DE3131875A1
DE3131875A1 DE19813131875 DE3131875A DE3131875A1 DE 3131875 A1 DE3131875 A1 DE 3131875A1 DE 19813131875 DE19813131875 DE 19813131875 DE 3131875 A DE3131875 A DE 3131875A DE 3131875 A1 DE3131875 A1 DE 3131875A1
Authority
DE
Germany
Prior art keywords
layer
semiconductor pattern
method
polysilicon
producing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19813131875
Other languages
German (de)
Inventor
William I Lehrer
John M Pierce
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US17938880A priority Critical
Application filed by Fairchild Semiconductor Corp filed Critical Fairchild Semiconductor Corp
Publication of DE3131875A1 publication Critical patent/DE3131875A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53257Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76889Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H01L29/4925Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
    • H01L29/4933Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The invention relates to a semiconductor device and a method for fabricating it, a polysilicon gate and connection layer, which is arranged above an insulating layer, being covered with a metal silicide layer in order to achieve a reduced connection resistivity. In order to preclude peeling-off of the silicide layer from the polysilicon layer below it at elevated temperatures, there is formed above the silicide layer a layer of polysilicon. <IMAGE>
DE19813131875 1980-08-18 1981-08-12 Method for producing a semiconductor pattern, and semiconductor pattern Withdrawn DE3131875A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17938880A true 1980-08-18 1980-08-18

Publications (1)

Publication Number Publication Date
DE3131875A1 true DE3131875A1 (en) 1982-03-25

Family

ID=22656394

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19813131875 Withdrawn DE3131875A1 (en) 1980-08-18 1981-08-12 Method for producing a semiconductor pattern, and semiconductor pattern

Country Status (2)

Country Link
JP (1) JPS5759386A (en)
DE (1) DE3131875A1 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0136350A1 (en) * 1983-03-09 1985-04-10 Advanced Micro Devices, Inc. Inverted polycide sandwich structure and method
DE3442037A1 (en) * 1983-11-18 1985-05-30 Hitachi Ltd Method for producing an integrated semiconductor circuit
EP0339586A2 (en) * 1988-04-25 1989-11-02 Nec Corporation Semiconductor device having improved gate capacitance and manufacturing method therefor
US4978637A (en) * 1989-05-31 1990-12-18 Sgs-Thomson Microelectronics, Inc. Local interconnect process for integrated circuits
US6387788B2 (en) * 1998-06-29 2002-05-14 Hyundai Electronics Industries Co., Ltd. Method for forming polycide gate electrode of metal oxide semiconductor field effect transistor

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4450620A (en) * 1983-02-18 1984-05-29 Bell Telephone Laboratories, Incorporated Fabrication of MOS integrated circuit devices
JPS59195870A (en) * 1983-04-21 1984-11-07 Toshiba Corp Semiconductor device
JPH0658965B2 (en) * 1983-08-30 1994-08-03 株式会社東芝 Method for manufacturing semiconductor device
JPS6057975A (en) * 1983-09-09 1985-04-03 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS62115776A (en) * 1985-11-15 1987-05-27 Nec Corp Manufacture of semiconductor device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4180596A (en) * 1977-06-30 1979-12-25 International Business Machines Corporation Method for providing a metal silicide layer on a substrate
US4128670A (en) * 1977-11-11 1978-12-05 International Business Machines Corporation Fabrication method for integrated circuits with polysilicon lines having low sheet resistance

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0136350A1 (en) * 1983-03-09 1985-04-10 Advanced Micro Devices, Inc. Inverted polycide sandwich structure and method
EP0136350A4 (en) * 1983-03-09 1987-08-24 Advanced Micro Devices Inc Inverted polycide sandwich structure and method.
DE3442037A1 (en) * 1983-11-18 1985-05-30 Hitachi Ltd Method for producing an integrated semiconductor circuit
EP0339586A2 (en) * 1988-04-25 1989-11-02 Nec Corporation Semiconductor device having improved gate capacitance and manufacturing method therefor
EP0339586A3 (en) * 1988-04-25 1990-10-10 Nec Corporation Semiconductor device having improved gate capacitance and manufacturing method therefor
US4978637A (en) * 1989-05-31 1990-12-18 Sgs-Thomson Microelectronics, Inc. Local interconnect process for integrated circuits
USRE35111E (en) * 1989-05-31 1995-12-05 Sgs-Thomson Microelectronics, Inc. Local interconnect process for integrated circuits
US6387788B2 (en) * 1998-06-29 2002-05-14 Hyundai Electronics Industries Co., Ltd. Method for forming polycide gate electrode of metal oxide semiconductor field effect transistor

Also Published As

Publication number Publication date
JPS5759386A (en) 1982-04-09

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8130 Withdrawal