DE3032461C2 - - Google Patents
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- Publication number
- DE3032461C2 DE3032461C2 DE19803032461 DE3032461A DE3032461C2 DE 3032461 C2 DE3032461 C2 DE 3032461C2 DE 19803032461 DE19803032461 DE 19803032461 DE 3032461 A DE3032461 A DE 3032461A DE 3032461 C2 DE3032461 C2 DE 3032461C2
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- Prior art keywords
- layer
- laser
- silicon
- metal contact
- crystal surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000010703 silicon Substances 0.000 claims description 24
- 229910052710 silicon Inorganic materials 0.000 claims description 24
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 23
- 239000010410 layer Substances 0.000 claims description 17
- 238000000034 method Methods 0.000 claims description 15
- 239000013078 crystal Substances 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 13
- 239000002184 metal Substances 0.000 claims description 13
- 239000004065 semiconductor Substances 0.000 claims description 9
- 239000002344 surface layer Substances 0.000 claims description 8
- 229910045601 alloy Inorganic materials 0.000 claims description 7
- 239000000956 alloy Substances 0.000 claims description 7
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 230000005669 field effect Effects 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 description 7
- 235000012431 wafers Nutrition 0.000 description 6
- 230000000903 blocking effect Effects 0.000 description 5
- CSDREXVUYHZDNP-UHFFFAOYSA-N alumanylidynesilicon Chemical compound [Al].[Si] CSDREXVUYHZDNP-UHFFFAOYSA-N 0.000 description 3
- 238000005169 Debye-Scherrer Methods 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 238000005275 alloying Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 238000013532 laser treatment Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910000676 Si alloy Inorganic materials 0.000 description 1
- 238000000889 atomisation Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 239000002689 soil Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/2636—Bombardment with radiation with high-energy radiation for heating, e.g. electron beam heating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
Description
Die Erfindung betrifft ein Verfahren zur Verbesserung der Legie rungsbildung von Metallkontaktschichten für Halbleiterbauelemen te auf in (100)-Richtung orientierten Siliziumkristallober flächen.The invention relates to a method for improving the alloy formation of metal contact layers for semiconductor devices te on silicon crystal surface oriented in (100) direction surfaces.
Aus der deutschen Patentschrift 28 25 212 ist ein Verfahren be kannt, bei dem dünne Metallschichten, welche durch Aufdampfen, Zerstäuben, elektrolytische Abscheidung oder Ionenimplantation auf einem Halbleitersubstrat aufgebracht worden sind, mit einem intensiven kurzen Laserlichtpuls bestrahlt werden und dabei an die Halbleiteroberfläche anlegiert werden. Dabei müssen die Be strahlungsbedingungen so gewählt werden, daß in dem Substrat keine nennenswerte Diffusion stattfindet. Die Pulsdauer der La serlichtpulse liegt deshalb im Nanosekundenbereich. Das bekann te Verfahren ist auf die Herstellung extrem dünner Metallstruk turen, wie sie beispielsweise in der VLSI-Technologie Anwendung finden, beschränkt.From the German patent 28 25 212 is a method knows, with the thin metal layers, which by evaporation, Atomization, electrolytic deposition or ion implantation have been applied to a semiconductor substrate with a intense short laser light pulse are irradiated and on the semiconductor surface are alloyed. The Be radiation conditions are chosen so that in the substrate no significant diffusion takes place. The pulse duration of the La serlichtpulse is therefore in the nanosecond range. That got The process is based on the production of extremely thin metal structures structures such as those used in VLSI technology find limited.
In der Halbleitertechnologie wählt man im allgemeinen die Ober flächen, zum Beispiel für Siliziummaterial, aus dem Bauelemente hergestellt werden sollen, in der Ebene einer bestimmten bevor zugten Kristallorientierung.In semiconductor technology, the waiters are generally chosen surfaces, for example for silicon material, from the components should be made in the plane of a certain one before drawn crystal orientation.
Beispielsweise werden die Thyristoren der Zukunft mit Hilfe in tegrierter Feldeffekttransistoren erzeugte, steuerbare Kurz schlüsse enthalten. Daher wird es notwendig sein, die Leistungs halbleiter- und die MOS-Technik miteinander zu kombinieren. Wäh rend in der Leistungshalbleitertechnik wegen der guten Legier barkeit (111)-orientiertes Silizium verwendet wird, wird in der MOS-Technik vorzugsweise (100)-orientiertes Silizium als Ausgangsmaterial verarbeitet, weil hier andere Kristalleigen schaften erheblich schwerer ins Gewicht fallen.For example, the thyristors of the future will be built using tegrated field effect transistors generated, controllable short conclusions included. Therefore, it will be necessary to the performance to combine semiconductor and MOS technology. Wuh rend in power semiconductor technology because of the good alloy Ability (111) oriented silicon is used in the MOS technology preferably (100) oriented silicon as The raw material is processed because there are other crystals weight considerably heavier.
Ein weiterer wesentlicher Gesichtspunkt ist, daß sich ⟨100⟩- Silizium-Grundmaterial leichter ziehen und homogener dotieren läßt als ⟨111⟩-Silizium. ⟨100⟩-Silizium ist deshalb erheb lich wirtschaftlicher herstellbar. Die Verwendung des ⟨100⟩- Siliziums wäre deshalb auch vorteilhafter für die Herstellung von Leistungshalbleiterbauelementen.Another important aspect is that ⟨100⟩- Draw silicon base material more easily and dope more homogeneously leaves as ⟨111⟩ silicon. ⟨100⟩ silicon is therefore significant producible more economically. Using the ⟨100⟩- Silicon would therefore also be more advantageous for production of power semiconductor components.
Der Einsatz von ⟨100⟩-orientiertem Silizium zur Herstellung von Thyristoren stößt jedoch bei der Legierung zwischen Metall schichten und Silizium auf Schwierigkeiten. Die Aluminium-Sili zium-Legierung erfolgt in ⟨100⟩-orientierten Silizium-Ober flächen sehr ungleichmäßig, so daß die negative Sperrfähigkeit sehr mangelhaft ist.The use of ⟨100⟩ oriented silicon for manufacturing of thyristors, however, collides between metals in the alloy layers and silicon on difficulty. The aluminum silos zium alloy is made in ⟨100⟩ oriented silicon upper surfaces very unevenly, so that the negative blocking ability is very poor.
Die Aufgabe, die der Erfindung zugrundeliegt, besteht deshalb darin, die Legierungsbildung von Metallkontaktschichten auf ⟨100⟩-orientierten Siliziumkristallscheiben zur Herstellung von Thyristoren gegenüber dem Kontaktmetall zu verbessern.The object on which the invention is based is therefore in the alloying of metal contact layers ⟨100⟩ oriented silicon crystal wafers for manufacturing of thyristors over the contact metal.
Diese Aufgabe wird erfindungsgemäß dadurch gelöst, daßThis object is achieved in that
- a) der für das Aufbringen der Metallkontaktschicht vorgesehene Bereich der Kristalloberfläche mit einer dichten Folge intensiver Laserlichtpulse so abgerastert wird, daß eine mit vielen Versetzungslinien durchwachsene polykristalline Ober flächenschicht entsteht unda) the one intended for the application of the metal contact layer Area of the crystal surface with a dense sequence intense laser light pulses are scanned so that one with polycrystalline upper with many dislocation lines surface layer arises and
- b) anschließend darauf die Metallkontaktschicht aufgebracht und einlegiert wird.b) then the metal contact layer is applied thereon and is alloyed.
Als Kontaktmetallschicht wird Aluminium, welches vorzugsweise in Form einer Folie aufgepreßt wird, verwendet.Aluminum, which is preferred, is used as the contact metal layer is pressed on in the form of a film, used.
Gemäß einem besonders günstigen Ausführungsbeispiel nach der Lehre der Erfindung wird ein Nd:YAG-Pulslaser mit einer Wellen länge von 1,06 µm, einer Pulsdauer von 0,5 µs und einer Leistung im Bereich von 50 Watt verwendet, das Lichtstrahlenbündel des Lasers auf einen Durchmesser von 50 µm fokussiert und der für die Kontaktierung vorgesehene Bereich der Kristalloberfläche mit einer Pulsfrequenz von 4 kHz durch dichtes Nebeneinander setzen der Einzelstrahlenbündelquerschnitte abgerastert. Die gesamte Bestrahlungszeit für eine etwa 7,5 cm große (100)- orientierte Siliziumkristallscheibe beträgt für dieses Beispiel ca. 1 Minute.According to a particularly favorable embodiment according to the The teaching of the invention is a Nd: YAG pulse laser with a wave length of 1.06 µm, a pulse duration of 0.5 µs and a power used in the range of 50 watts, the light beam of the Lasers focused on a diameter of 50 microns and for the contact area provided for the crystal surface with a pulse frequency of 4 kHz due to close juxtaposition set the individual beam cross-sections scanned. The total irradiation time for a 7.5 cm (100) - oriented silicon crystal wafer is for this example about 1 minute.
Das Verfahren nach der Lehre der Erfindung läßt sich folgender maßen erklären:The method according to the teaching of the invention can be as follows explain dimensions:
Wird eine Siliziumoberfläche mit einem kurzen Laser-Lichtpuls oberhalb einer kritischen Intensität I kr bestrahlt, so verdampft von der bestrahlten Oberflächenstelle etwas Silizium. Dadurch entsteht ein kleiner Krater vom Durchmesser des Laserstrahlbün dels. Beim Abkühlen dieser Stelle bildet sich insbesondere an den Kraterrändern eine mit vielen Versetzungslinien durchwachse ne polykristalline Oberflächenschicht. Wird die kritische In tentität I kr nicht allzusehr überschritten, bleibt das Vernet zungsliniennetzwerk auf diese Oberflächenschicht begrenzt.If a silicon surface is irradiated with a short laser light pulse above a critical intensity I kr , some silicon evaporates from the irradiated surface location. This creates a small crater with the diameter of the laser beam. When this point cools down, a polycrystalline surface layer that grows through with many dislocation lines is formed, in particular at the crater edges. If the critical intensity I kr is not exceeded too much, the network of network lines remains limited to this surface layer.
Das dichte Versetzungsliniennetzwerk und die verschiedenen Orientierungen der Kristallite der polykristallinen Oberflächenschicht begünstigen des Anlösen des Silizium durch das Aluminium und das auch bei ⟨100⟩-orientierten Siliziumscheiben, so daß sich eine gleichmäßig dünne Oberflächen-Aluminium-Silizium-Legierungsschicht aus bildet.The dense dislocation network and the various Orientations of the crystallites of the polycrystalline Surface layer favor the dissolution of the silicon through the aluminum and that also with ⟨100⟩-oriented Silicon wafers so that there is an evenly thin Surface aluminum-silicon alloy layer forms.
Elektronenstrahlbeugungsdiagramme in Reflexion zeigen von der unbestrahlten, geläppten Scheibenrückseite das Kikuchi-Diagramm einer perfekten einkristallinen Ober flächenschicht. Nach dem Laserbestrahlen an Luft werden diffuse Debye-Scherrer-Ringe sichtbar, die auf eine dünne, nicht notwendigerweise stöchiometrische Oxidschicht hin weisen. Diese Oxidschicht ist ca. 30 nm dick. Nach dem Abätzen mit Flußsäure erscheinen einzelne Bragg-Reflexe überlagert mit einem Debye-Scherrer-Ringsystem, das von polykristallinen Oberflächenbereichen stammt. Die Krater böden dürften einkristallin sein, während die Krater ränder polykristalline Struktur besitzen. Demnach ist das Verfahren umso wirkungsvoller, je feiner das Laserlicht strahlenbündel fokussiert ist und je dichter die einzelnen Bestrahlungsflecke liegen. Im Gegensatz zu dem in der deutschen Patentschrift 28 25 212 beschriebenen Verfahren zum Anlegieren extrem dünner Strukturen ist das er findungsgemäße Verfahren insbesondere zum Herstellung dickerer Legierungsschichten geeignet.Reflection electron beam diffraction diagrams from the unirradiated, lapped rear of the window Kikuchi diagram of a perfect monocrystalline upper surface layer. After laser irradiation in air diffuse Debye-Scherrer rings visible on a thin, not necessarily stoichiometric oxide layer point. This oxide layer is approximately 30 nm thick. After this Individual Bragg reflections appear when etched with hydrofluoric acid overlaid with a Debye-Scherrer ring system by polycrystalline surface areas. The craters Soil should be single crystal while the crater edges have polycrystalline structure. So that's it The finer the laser light, the more effective the process beam is focused and the denser the individual There are radiation spots. In contrast to that in the German Patent 28 25 212 described method for the application of extremely thin structures it is Processes according to the invention, in particular for production thicker alloy layers.
Im folgenden sollen anhand eines Ausführungsbeispiels und der Fig. 1 bis 4 die einzelnen Verfahrensschritte schematisch dargestellt und noch kurz erläutert werden. Dabei gelten in den Figuren für gleiche Teile die gleichen Bezugszeichen.The individual method steps are to be schematically illustrated and briefly explained below using an exemplary embodiment and FIGS. 1 to 4. The same reference numerals apply to the same parts in the figures.
Eine Siliziumkristallscheibe 1 mit einer in ⟨100⟩-Richtung orientierten Oberfläche wird, wie in Fig. 1 dargestellt, mit scharf fokussiertem, intensiven Laserlichtpulsen 2 abrasternd bestrahlt, so daß Verdampfungskrater mit einer dünnen Oberflächenschicht 3 aus ausgedehnten Versetzungs liniennetzwerken mit Polykristallen entstehen, die der nachfolgenden Legierung keinen Widerstand mehr entgegen setzen.A silicon crystal wafer 1 with a surface oriented in the ⟨100⟩ direction is, as shown in FIG. 1, scanned with sharply focused, intense laser light pulses 2 , so that evaporation craters with a thin surface layer 3 are formed from extensive dislocation line networks with polycrystals no further resistance to the following alloy.
Auf diese gestörte Oberflächenschicht 3 wird, wie aus Fig. 2 zu entnehmen ist, eine Aluminium-Schicht 4 durch Aufdampfen, Zerstäuben, elektrolytische Abscheidung oder durch Anpressen einer Folie aufgebracht und in den Halb leiterkörper 1 einlegiert. Dabei bildet sich zunächst auf der Siliziumkristallscheibe 1 eine Aluminium-Sili zium-Schmelze 14 (siehe Fig. 3), welche bei der Ab kühlung in ein Aluminium-Silizium-Eutetikum 24 und eine p-leitende Siliziumschicht 5 übergeht (siehe Fig. 4).On this disturbed surface layer 3 , as can be seen from FIG. 2, an aluminum layer 4 is applied by vapor deposition, sputtering, electrolytic deposition or by pressing on a foil and alloyed into the semiconductor body 1 . An aluminum-silicon melt 14 (see FIG. 3) is initially formed on the silicon crystal wafer 1 , which merges with cooling into an aluminum-silicon eutetic 24 and a p-type silicon layer 5 (see FIG. 4) .
Nach der Durchführung des Verfahrens nach der Lehre der Erfindung wurden in bezug auf die elektrischen Parameter folgende Ergebnisse erzielt:After performing the procedure according to the teaching of Invention have been made in terms of electrical parameters achieved the following results:
Es wurden Thyristoren, welche mittels integrierter Feld effekttransistoren erzeugte steuerbare Kurzschlüsse ent halten, aus ⟨100⟩-Silizium hergestellt. Ein Teil der ⟨100⟩-orientierten Silizium-Scheiben wurden vor der Legierung der erfindungsgemäßen Laserbehandlung unter zogen. Die Häufigkeit der gemessenen Sperrfähigkeit U R /V in negativer Richtung ist aus den Fig. 5 und 6 er sichtlich. Die Sperrfähigkeit ist bei den unbehandelten Scheiben (siehe Fig. 5), wie auch in früheren Versuchen schon festgestellt wurde, schlecht. Bei den laserbe handelten Scheiben (siehe Fig. 6) dagegen ist die nega tive Sperrfähigkeit grundlegend verbessert und erreicht die Sperrfähigkeit von Thyristoren aus ⟨111⟩-orientierten Silizium. Damit ist gezeigt, daß auch ⟨100⟩-orientiertes Silizium mit Aluminium legierbar ist, wenn die zu legieren de Fläche vorher eine dementsprechende Laserbehandlung erfährt. An den Laser selbst werden dabei keine beson deren Güteanforderungen gestellt.Thyristors, which contain controllable short circuits generated by means of integrated field effect transistors, were made from ⟨100⟩ silicon. Some of the ⟨100⟩-oriented silicon wafers were subjected to the laser treatment according to the invention before alloying. The frequency of the measured blocking capability U R / V in the negative direction is evident from FIGS . 5 and 6. The blocking ability is poor in the untreated disks (see FIG. 5), as has also been established in previous experiments. In the laser treated disks (see Fig. 6), however, the negative blocking ability is fundamentally improved and reaches the blocking ability of thyristors made of ⟨111⟩-oriented silicon. This shows that even ⟨100⟩-oriented silicon can be alloyed with aluminum if the surface to be alloyed is previously subjected to a corresponding laser treatment. No special quality requirements are imposed on the laser itself.
Durch das Verfahren nach der Lehre der Erfindung ist die Möglichkeit gegeben, die MOS-Technologie und die Bipolar- Technologie besser zu integrieren.By the method according to the teaching of the invention Given the opportunity to use MOS technology and bipolar Integrate technology better.
Claims (5)
- a) der für das Aufbringen der Metallkontaktschicht (4) vorgesehene Bereich der Kristalloberfläche mit einer dichten Folge intensiver Laserlichtpulse (2) so abge rastert wird, daß eine mit vielen Versetzungslinien durchwachsene polykristalline Oberflächenschicht (3) entsteht und
- b) anschließend darauf die Metallkontaktschicht (4) aufgebracht und einlegiert wird.
- a) provided for the application of the metal contact layer (4) of the crystal surface intense with a dense sequence of laser light pulses (2) rasterizes so abge that a host of dislocation lines by grown polycrystalline surface layer (3) is formed and
- b) the metal contact layer ( 4 ) is then applied and alloyed thereon.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19803032461 DE3032461A1 (en) | 1980-08-28 | 1980-08-28 | Alloyed metal contact prodn. on oriented semiconductor crystal - by rastering surface with intense pulsed laser light before applying metal assists alloying |
US06/289,880 US4359486A (en) | 1980-08-28 | 1981-08-04 | Method of producing alloyed metal contact layers on crystal-orientated semiconductor surfaces by energy pulse irradiation |
EP81106341A EP0046914B1 (en) | 1980-08-28 | 1981-08-14 | Method of forming alloyed metal contact layers on crystallographically oriented semiconductor surfaces using pulsed energy radiation |
JP13254981A JPS5772322A (en) | 1980-08-28 | 1981-08-24 | Method of generating alloyed metallic contact layer to surface of semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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DE19803032461 DE3032461A1 (en) | 1980-08-28 | 1980-08-28 | Alloyed metal contact prodn. on oriented semiconductor crystal - by rastering surface with intense pulsed laser light before applying metal assists alloying |
Publications (2)
Publication Number | Publication Date |
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DE3032461A1 DE3032461A1 (en) | 1982-04-01 |
DE3032461C2 true DE3032461C2 (en) | 1989-04-13 |
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DE19803032461 Granted DE3032461A1 (en) | 1980-08-28 | 1980-08-28 | Alloyed metal contact prodn. on oriented semiconductor crystal - by rastering surface with intense pulsed laser light before applying metal assists alloying |
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DE (1) | DE3032461A1 (en) |
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JP2003282478A (en) | 2002-01-17 | 2003-10-03 | Sony Corp | Method for alloying and method forming wire, method for forming display element, and method for manufacturing image display device |
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NL6413441A (en) * | 1964-11-19 | 1966-05-20 | ||
GB1057687A (en) * | 1964-12-11 | 1967-02-08 | Associated Semiconductor Mft | Improvements in and relating to methods of manufacturing semiconductor devices |
JPS51111061A (en) * | 1975-03-26 | 1976-10-01 | Hitachi Ltd | Electrode forming method |
SE392783B (en) * | 1975-06-19 | 1977-04-18 | Asea Ab | SEMICONDUCTOR DEVICE INCLUDING A THYRIST AND A FIELD POWER TRANSISTOR PART |
US4059461A (en) * | 1975-12-10 | 1977-11-22 | Massachusetts Institute Of Technology | Method for improving the crystallinity of semiconductor films by laser beam scanning and the products thereof |
DE2825212C2 (en) * | 1978-06-08 | 1980-03-27 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Process for the production of semiconductor components by means of a short, intense laser light pulse |
CH638641A5 (en) * | 1978-11-17 | 1983-09-30 | Univ Bern Inst Fuer Angewandte | SEMICONDUCTOR COMPONENT, METHOD FOR THE PRODUCTION AND USE OF THE SEMICONDUCTOR COMPONENT. |
JPS5723223A (en) * | 1980-07-18 | 1982-02-06 | Fujitsu Ltd | Manufacture of compound semiconductor device |
-
1980
- 1980-08-28 DE DE19803032461 patent/DE3032461A1/en active Granted
-
1981
- 1981-08-24 JP JP13254981A patent/JPS5772322A/en active Pending
Also Published As
Publication number | Publication date |
---|---|
DE3032461A1 (en) | 1982-04-01 |
JPS5772322A (en) | 1982-05-06 |
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