DE3001032A1 - Halbleiteranordnung und verfahren zu deren herstellung - Google Patents

Halbleiteranordnung und verfahren zu deren herstellung

Info

Publication number
DE3001032A1
DE3001032A1 DE19803001032 DE3001032A DE3001032A1 DE 3001032 A1 DE3001032 A1 DE 3001032A1 DE 19803001032 DE19803001032 DE 19803001032 DE 3001032 A DE3001032 A DE 3001032A DE 3001032 A1 DE3001032 A1 DE 3001032A1
Authority
DE
Germany
Prior art keywords
semiconductor
opening
zone
layer
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19803001032
Other languages
German (de)
English (en)
Inventor
Cornelis Maria Hart
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE3001032A1 publication Critical patent/DE3001032A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53271—Conductive materials containing semiconductor material, e.g. polysilicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42304—Base electrodes for bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Integrated Circuits (AREA)
DE19803001032 1979-01-15 1980-01-12 Halbleiteranordnung und verfahren zu deren herstellung Withdrawn DE3001032A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7900280A NL7900280A (nl) 1979-01-15 1979-01-15 Halfgeleiderinrichting en werkwijze ter vervaardiging daarvan.

Publications (1)

Publication Number Publication Date
DE3001032A1 true DE3001032A1 (de) 1980-07-24

Family

ID=19832451

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19803001032 Withdrawn DE3001032A1 (de) 1979-01-15 1980-01-12 Halbleiteranordnung und verfahren zu deren herstellung

Country Status (6)

Country Link
US (1) US4430793A (US06235095-20010522-C00021.png)
JP (1) JPS5596653A (US06235095-20010522-C00021.png)
DE (1) DE3001032A1 (US06235095-20010522-C00021.png)
FR (1) FR2446540A1 (US06235095-20010522-C00021.png)
GB (1) GB2040568B (US06235095-20010522-C00021.png)
NL (1) NL7900280A (US06235095-20010522-C00021.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0046257A1 (en) * 1980-08-20 1982-02-24 Kabushiki Kaisha Toshiba Semiconductor device

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5734359A (en) * 1980-08-08 1982-02-24 Toshiba Corp Semiconductor device and manufacture thereof
EP0064613B1 (en) * 1981-04-30 1986-10-29 Kabushiki Kaisha Toshiba Semiconductor device having a plurality of element units operable in parallel
JPS5866359A (ja) * 1981-09-28 1983-04-20 Fujitsu Ltd 半導体装置の製造方法
NL8105920A (nl) * 1981-12-31 1983-07-18 Philips Nv Halfgeleiderinrichting en werkwijze voor het vervaardigen van een dergelijke halfgeleiderinrichting.
JPS58202525A (ja) * 1982-05-21 1983-11-25 Toshiba Corp 半導体装置の製造方法
US4712125A (en) * 1982-08-06 1987-12-08 International Business Machines Corporation Structure for contacting a narrow width PN junction region
US4905075A (en) * 1986-05-05 1990-02-27 General Electric Company Hermetic semiconductor enclosure
US4837176A (en) * 1987-01-30 1989-06-06 Motorola Inc. Integrated circuit structures having polycrystalline electrode contacts and process
US5067002A (en) * 1987-01-30 1991-11-19 Motorola, Inc. Integrated circuit structures having polycrystalline electrode contacts
US4772566A (en) * 1987-07-01 1988-09-20 Motorola Inc. Single tub transistor means and method
US5254495A (en) * 1993-05-07 1993-10-19 United Microelectronics Corporation Salicide recessed local oxidation of silicon
DE19832329A1 (de) 1997-07-31 1999-02-04 Siemens Ag Verfahren zur Strukturierung von Halbleitern mit hoher Präzision, guter Homogenität und Reproduzierbarkeit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2749607A1 (de) * 1976-11-19 1978-05-24 Philips Nv Halbleiteranordnung und verfahren zu deren herstellung

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3611067A (en) * 1970-04-20 1971-10-05 Fairchild Camera Instr Co Complementary npn/pnp structure for monolithic integrated circuits
US4074304A (en) * 1974-10-04 1978-02-14 Nippon Electric Company, Ltd. Semiconductor device having a miniature junction area and process for fabricating same
JPS52119186A (en) * 1976-03-31 1977-10-06 Nec Corp Manufacture of semiconductor
JPS5338992A (en) * 1976-09-22 1978-04-10 Hitachi Ltd Manufacture of semiconductor device
GB2010580B (en) * 1977-11-14 1982-06-30 Tokyo Shibaura Electric Co Method for manufacturing a semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2749607A1 (de) * 1976-11-19 1978-05-24 Philips Nv Halbleiteranordnung und verfahren zu deren herstellung

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0046257A1 (en) * 1980-08-20 1982-02-24 Kabushiki Kaisha Toshiba Semiconductor device

Also Published As

Publication number Publication date
JPS5596653A (en) 1980-07-23
US4430793A (en) 1984-02-14
NL7900280A (nl) 1980-07-17
FR2446540A1 (fr) 1980-08-08
GB2040568B (en) 1983-03-02
FR2446540B1 (US06235095-20010522-C00021.png) 1985-05-17
GB2040568A (en) 1980-08-28

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8125 Change of the main classification

Ipc: H01L 29/40

8126 Change of the secondary classification

Free format text: H01L 29/72 H01L 29/74 H01L 23/48

8139 Disposal/non-payment of the annual fee