DE2717989A1 - METHOD AND DEVICE FOR READING ADDRESSES ON A MAGNETIC RECORDING MEDIUM - Google Patents

Description

Patent attorneys

Dipl-Ing Dipl.-Chem Dtpl-Ing.

E. Prince - Dr. G. Hauser - G. Leiser

Ernsbergerstrasse 19 271798

8 Munich 60

April 21, 197 * i

Compagnie Internationale Pour l'Informatique CII- Honeywell Bull
94, avenue Gambetta
PARIS (20) / France

Our sign; C 3128

Method and device for reading addresses on a magnetic Recording media

The invention relates to a method and a device for reading of addresses on a magnetic recording medium. It is particularly applicable to magnetic disk drives.

Magnetic disk memories are increasingly being used in current data processing systems because of them Storage capacity and the relatively short time it takes the magnetic read / write heads to access one in any one Point to access the information contained in the disks from the point in time in which they are commanded by the data processing system

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have been given access to this information.

It is well known that the magnetic disks carry the information in coded form Form in circular, concentric recording tracks, the width of which does not exceed a few hundredths of a millimeter and which are on theirs both faces are engraved. The tracks are identified by assigning them a sequence number j (where j is a whole Number), which changes from 0 to (N-1), where N is the total number of recording tracks. The coded expression the running lobster j denotes a track. The most commonly used codes are binary codes.

It is well known that in the case of storage systems with a low storage capacity, which contain only one or two disks, the addresses of the tracks of an area of a disk recorded on the same area in such a way that that a maximum of space is reserved for recording the data, while a minimum of space is reserved for recording the addresses and is reserved for recording on the tracks for the position control of the magnetic head associated with this area.

In current practice, the attitude control information and addresses are recorded inside groups of reference zones, which are distributed over the entire surface of the plate. The number of zones is at least equal to the number of tracks each group of zones including indexing means allowing the beginning of the group to be identified.

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Each reference zone contains a certain number of cells, each of which contains position control information and a bit of the address contains, as in the German patent application "Method for writing addresses on a magnetic recording medium" described by the applicant, claiming the priority of French patent application no. 7609357 of 31.3.1976 has been submitted. The number of cells in a zone is equal to the number of address bits.

It should be remembered that the English word bit is both a binary digit 1 or 0 and any materialization of this digit either in the form of a magnetic record or in the form of an analog or digital electrical signal, where an analog signal is defined as a signal whose voltage varies continuously between a value (+ V) and a value (-V) changes, while a digital signal can only assume the two digital values 0 and 1.

As is known, in order to record a sequence of information on a magnetic medium, one in each track thereof is used Generated in succession of small magnetic areas, which are referred to as "elementary magnets", which over the entire Length of the track are distributed and successive magnetic inductions with opposite values, opposite Have a sense of direction and a direction parallel to the surface of the plate. Each cell corresponds to two as defined above Changes in the direction of magnetization. Any of these changes

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can occupy one of two predetermined positions inside the cell. The first change forms the position information, while the second change, called the "wake front" indicates the value of the bit of the address as a function of the position it occupies. When the magnetic head encounters a sequence of changes in the direction of magnetization which corresponds to a reference zone, it provides a sequence of analog signals, from which a sequence of digital pulses is formed by shaping circuits, the beginning of the Reference zone is indicated by a special impulse.

If one looks at the digital impulses corresponding to the trailing fronts, each front can occupy two positions, the time interval being between each of these pulses and the reference zone start pulse is different depending on the value of the address bit.

The aim of the method for reading addresses on a record carrier is, by marking the position in time Store the address bits in the form of signals for each digital pulse in relation to the pulse indicating the beginning of the zone, which are equal to digital value 0 or equal to digital value 1 «

This is achieved by using a first signal with a constant Frequency, the reference signal, a second signal is generated which is obtained by dividing the frequency of the first signal and that by digital pulses are synchronized, the value of each address bit being obtained by the temporal position of each of these pulses

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is marked within each period of the second signal.

The invention also provides a simple and reliable method for reading addresses on a magnetic recording medium, which requires a facility that costs little to carry it out.

According to the invention, the method for reading addresses on a magnetic recording medium is the Information:

- are arranged in several lanes;

- written in binary code by means of at least one magnetic head, the addresses of the tracks inside Groups of reference zones are entered, each track is assigned at least one zone and each group of Zone indexing devices for marking the beginning of the group and each zone contains several unit cells whose Number is equal to the number of address bits and which contain at least one change in the direction of magnetization which is one of two predetermined Occupies positions inside each cell which indicates the value of each address bit and which is read by the head Turn signals into the form of digital pulses and save the read address, characterized by:

- That a periodic reference signal H with an exactly constant frequency is produced;

a signal SYNCHRO obtained by dividing the frequency of the reference signal H is synchronized by the digital pulses will,

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- That the bit of each address by combining the signals SYNCHRO and the digital pulses IMP. is saved, where the value of each bit depends on the time position of each pulse IMP. within each period of the SYNCHRO signal

- That the number of cells is counted, with each storage of a bit a cell is counted,

- that the address is scanned and then stored, and

- that the scanning of the address and the counting of the cells are enabled for the entire duration of the reading of each zone.

An embodiment of the invention is described in more detail below with reference to the accompanying drawings. Show it:

Fig. 1 shows an example of the preferred distribution of

Information on the surface of a magnetic disk,

Fig. 2 shows a positioning reference zone, the

Address is written in cyclically permuted binary code or Gray code,

Fig. 3. the analog signals of reading the addresses

through the magnetic head,

Figure 4 shows the block diagram of the address read facility

according to the invention, and

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λΛ

Figure 5 is a detailed timing diagram of the signals

at different points of the reading device according to the invention.

In order to make the principles of the construction and the mode of operation of the device according to the invention for reading addresses on a recording medium better understood, reference is made to FIG 1 and 2 are given some explanations, on the one hand an example of the preferred distribution of information of the magnetic disk and, on the other hand, show an example of the writing of an address on the magnetic disk.

In Fig. 1a, a magnetic disk D is shown which rotates in the direction of the arrow F and whose recording usable area is delimited by the circles d1 and d2. On this plate η equal sectors S ... S .... S are defined. Every ³ ο i η

Sector S. is, as FIG. 1b better shows, in two parts SDO. and SAD. divided into which on the one hand the data to be processed by the data processing system to which the disk storage belongs and on the other hand the information required for the Position control of the magnetic head T with respect to the axis Axj of the tracks are required, and the track addresses are recorded

The area of the SAD part. is much smaller than the area of the part SDO.

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FIGS. 1c and 1d show an enlarged view of the part SAD. the sectors S., which is inside the circle C.

Every part of SAD. of a sector S. is ZRP in N zones. ...

Il IO

ZRP ZRP _Λ , which are used as a positioning reference

zones are designated. In Figs. 1c and 1d are for simplicity only the first five zones ZRP. to ZRP have been represented, in symbolic form by rectangles.

The boundaries between the different zones ZRP .. are the circular center lines Axj of the magnetic tracks. Every magnetic track with the sequence number j and the axis Axj, the zone ZRP is assigned. Thus, the O track is the ZRP zone. assigned, of track 1 the zone ZRP, etc.

Each zone ZRP .. contains the address of the track to which it is assigned. Thus, according to FIG. 1d, the zone contains ZRP. the address

IO

of track O, zone ZRP, the address of track 1, etc.

The address of the tracks is expressed in a binary code, the number of bits ρ of which is so large that: 2 ¹ ^ N.

A description of some binary codes can be found, for example in the book by H. SO UBI ES-CAMY, Editions DUNOD, 1961, Pp. 253-256.

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According to FIG. 2, the zone ZRP .. contains an arrangement of several unit cells of the same length, the number of which is the same is the number of bits used to write the address of the Traces are required.

In the described embodiment there are nine cells C1 to C9. A cell is assigned to each bit, with the Cell C1 is assigned to the bit with the highest digit and cell C9 is assigned to the bit with the lowest digit. You are from the left to the right in numerically increasing order, which corresponds to the (temporal) order in which these cells can be written and read by the magnetic head T.

Each of these cells is divided into four equal parts CP1, CP2, CP3, CP4, the boundaries of which are designated as the positions P1, P2, P3 and P4 are defined, where the position P1 is the boundary between the parts CP1 and CP2, etc. Each cell contains two consecutive ones Changes in the direction of magnetization of the magnetic disk, which are shown by a double line in Fig. 2, in which also, for each cell, the direction and the sign of the magnetic induction inside each of the parts CP1 bis CP4 are specified. Each of the two changes in the direction of magnetization can assume two positions: - The first "change" is information required for position control of the head T is required and can take either the position P1 or the position P2;

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- the second "change", also known as the "wake front" can take either the position P3 or the position P4 and indicates the value of the address bit, namely 0 for the position P3 and 1 for position P4.

Their presence allows each unit cell to be restored in the same way from one cell to another, so that the direction and sign of the magnetic induction in each part CP1 of cells C1 to C9 are identical.

Fig. 3 shows that when the "trailing front" of cells C1 and C9 occupies position P3, the address bits of these cells are O'n, while when the "trailing front" of cell C2 occupies position P4, the corresponding bit is one 1 is. The first cell C1 of a zone ZRP .. contains an additional one

Change in direction of magnetization MARC, which assumes position P and allows the beginning of this zone to be marked.

The addresses are preferably written in a cyclically permuted binary code, the Gray code. The description such a code can be found, for example, in the book by H. SOUBIES-CAMY, Editions DUNOD, 1961, pp. 253-254.

Figure 3a is a partial view of two adjacent reference zones

ZRP ... and ZRP. ^. . _v and its first five cells i2k i (2k1)

C1 to C5 shows the main feature of the Gray code, namely that two consecutive addresses pass through distinguish the change of a single bit from each other.

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As Fig. 3a shows, the two addresses differ

(2k) and (2k_1), which are included in the zones ZRP and ZRP

are carried by the bit of cell C4, where the address bit 2k is equal to 0 (trailing front in position P3) and the address bit (2k-1) is equal to 1 (trailing front in position P4).

To simplify the explanation, it is assumed that the address (2k) is to be read which is inside the reference zone ZRP. is inscribed, with the explanations for reading

O ² K)
apply to any address inside any reference zone

ZRP .. of the magnetic disk D is located.

Fig. 3b shows the analog signal obtained by reading the

Reference zones ZRf ³ ^ p ₁₀ ^and ZRP 'by the magnetic head T.

which is located above the Ax ₁ axis of the AdreS track (2k-1). The largest part of the head T is located above the zone ZRP. . This signal breaks down into several signals,

IK

namely:

- the position control signals SP ^, SP _12, SP ₁₅ , SP ₃₁ to SP ₃₅ , etc .;

- the signal S MARC, that of the change in the direction of magnetization

corresponds to, where MARC is the beginning of the zones ZRP and ZRP indicates;

- the signals'AB, AB, AB, AB representing the different bits correspond to the address (2k), the signal AB corresponding to the bit with the highest digit (the highest weight of the address).

The signal AB is a signal with two vertices CR and CR ',

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which result from the fact that the two trailing fronts of cells C _{1 of} the two zones ZRP _, and ZRP

4 i2k

very close together. In this case it is said to be there is an uncertainty in reading the bit of the address (2k) written in cell C1. This uncertainty will

by an uncertainty determination circuit, not shown fixed, which it is proposed in the German patent application P 26 58 566.0.

The device for reading addresses on a magnetic recording medium has the task of reading the analog signals AB, AB, etc. to bits whose digital value is equal to zero or one by measuring the time interval between each of the signals AB, AB, AB .... AB and the signal S MARC

ι £ ι y

lies.

When the head T moves at a constant speed with respect to the reference zones and when the trailing fronts occupy one of the positions P3 or P4 inside each cell C1 to C9, the time interval between the signal S MARC and a signal AB- is, depending on whether this signal AB. corresponds to an O-bit or a 1-bit.

4 shows the basic circuit diagram in the form of a block diagram the device for reading addresses on a magnetic recording medium, which is used to carry out the invention

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Reading method is determined.

The main various components of this facility are:

the FORM circuit for bringing the information through the magnetic head T read analog signals AB .;

- the clock TAKT;

- the JK flip-flop switch KIPP;

the frequency divider DIV for that supplied by the clock TAKT Signal;

- the cell counter COMPT;

the memory MEMO, which stores the bits of the address; and

- the key circuit TAST.

The FORM circuit converts the analog signals S MARK and AB, AB -AB., AB into the form of digital pulses IMP, IMP,

IMP, IMP .... IMP that have a very short duration and ei y

are shown in Fig. 5, the beginning of these pulses at times t, t, t. ..t. ... t cherishes and taking the momentum

O ι 2 I 9

IMP a 1-bit, the impulse IMP an O-bit and the impulse ι 8

IMP corresponds to a 1-bit.
9

The Forrrgebungsaltung FORM can, for example, from a conventional threshold circuit exist.

The clock generator TAKT delivers a signal H, which is a sequence of square-wave pulses with a frequency F, the is completely stable over time, acts. The rotation of the plate

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is readjusted to the signal of the clock generator TAKT illustrated embodiment of the invention, the frequency F is equal to 12 times the mean frequency F of the

Square pulse IMP ..

When the mean period of these pulses

is applicable: middle 8 χ 12th is, ET 8 χ 12th middle ■ v

The frequency divider DIV receives at its inputs on the one hand the impulses IMP, IMP ... IMP. and on the other hand the signal H.

It supplies the digital signal SYNCHRO, the frequency of which is equal to one twelfth of the frequency F or the same as the frequency

F ..., is. Its period T is equal to the time of the bypass means **

movement of each cell under the reading head T.

The signal SYNCHRO is synchronized by the square-wave pulses IMP, IMP, ..., IMP., ..., IMP, so that the

c. I 9

Pulses (such as pulses IMP and IMP ₄ O, corresponding to an address bit which has the digital value of 1, are synchronous with the portion of the signal SYNCHRO who has the digital value of 1 (this portion as the signal SYNCHRO 1 of Fig. 5 is considered) and that the pulses (such as the pulses IMP, IMP) corresponding to an address bit having the digital value zero are synchronous with the part of the signal SYNCHRO which the

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Digital value zero (this part is considered to be the signal SYNCHRO ZERO in Fig. 5). So you can say that SYNCHRO = SYNCHRO 1 + SYNCHRO ZERO.

The signal SYNCHRO and the impulses IMP ... IMP are fed to one or the other input of the memory MEMO.

If this receives the signal SYNCHRO 1 and impulses like the impulses IMP or IMP at the same time, it saves

ι 9

Address bit with the digital value 1.

If simultaneously the SYNCHRO ZERO part of the SYNCHRO signal and pulses, such as the IMP or IMP pulses, receives, it stores an address bit with the digital value zero.

The signal SYNCHRO is fed to the inputs of the key circuit TAST and the cell counter COMPT.

The counter COMPT counts the cells of each positioning zone ZRP ... In the exemplary embodiment described, its counting capacity is equal to the number of cells, i.e. equal to 9. It counts one cell as soon as the signal SYNCHRO goes from the digital value zero to the digital value one (if transition from the SYNCHRO ZERO signal to the SYNCHRO 1 signal).

When the counter COMPT has counted nine cells, it outputs a zero reset signal NRSRP, which is a first input of the Toggle switch KIPP is supplied.

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It is then erased to zero itself.

The flip-flop KIPP receives the pulses IMP, IMP, IMP., IMP at a first input and at a second input the signal VAL.

The signal VAL is a signal which drops from the digital value one to the digital value zero at the time t * , the time interval (t − t ') being equal to a few microseconds in the exemplary embodiment selected. The time t 'corresponds to the time at which the in the part SDO. of the sector S. ₁ immediately preceding the sector S. ceases to be read by the head T.

The signal VAL rises again to the digital value 1 at the point in time t ', the time interval (t * - t) being equal to a few ten periods of the signal H. The signal VAL is supplied by the data reading circuits (not shown) of the disk memory.

The flip-flop KIPP supplies the signal FEN, which is equal to from the time t to the time t = (t + 9T) Digital value is one. This signal FEN is the second input of the key circuit TAST and the second input of the Counter COMPT supplied.

The key circuit TAST supplies the signal AD TAKT, which has a phase delay of a fraction of the period T compared the signal SYNCHRO (a quarter period in the

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selected embodiment), as Fig. 5 shows. This signal is fed to a first input of the serial register SER, whose second input is connected to the output of the memory MEMO. This register contains just as many Positions how the address contains bits.

On every rising edge of the AD TAKT signal (when this signal changes from the digital value 0 to the digital value 1) the bit which is stored by the memory MEMO is transferred to the register SER.

It can therefore be said that the state of the memory MEMO is scanned by the signal AD TAKT.

It can be seen that the memory MEMO every bit for one Duration of a quarter of the period T stores before it is transferred to the serial register SER.

As soon as the address (2k) is completely stored in the register SER it can be used as information by the electronic circuits of the magnetic disk memory, for example by the device for moving the magnetic heads, which is described in the above-mentioned German patent application P 26 58 566.0 is suggested.

Contains in a preferred embodiment of the invention

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the key circuit TAST in series:

- the shift register REG; and

- the NAND circuit P.

The register REG receives the signal SYNCHRO and outputs a signal SYNCHRORE, which is a quarter of the period T opposite the SYNCHRO signal is delayed. This signal is delivered to the first input of the NAND circuit P, whose second input receives the signal FEN. The NAND circuit P outputs the signal AD TAKT.

In a preferred embodiment of the invention, the frequency divider DIV consists of the combination of two ring counters AN1 and AN2, which are connected in series, the counter AN1 the pulses IMP. and receives the signal H, while the counter AN2 supplies the signal SYNCHRO. Such counters are described, for example, in the book by FAIRCHILD, "T2L Applications ¹¹ , August 1973, pp. 10-8. The two counters AN1 and AN2 are used as frequency dividers. When the counter AN1 divides the frequency of the signal H by the The number η divides and when the counter AN divides the frequency of the signal Q (see 4 is).

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Claims (8)

Patent attorneys OpI-Ing Oipl.-Chem. Dipt-Ing E. Prince - Dr. G. Hauser - G. Leiser Ernsbergerstrasse 19 8 Munich 60 2/1/989 April 21, 19 Compagnie Internationale Pour l'Informatique CII- Honeywell Bull
94ι Avenue Gambetta
PARIS (20) / France Our reference: C 3128 Patent claims before: Method for reading addresses on a magnetic recording medium on which the information: - are arranged in several lanes; - written in binary code by means of at least one magnetic head, the addresses of the tracks inside Groups of reference zones are entered, each track is assigned at least one zone and each group of Zone indexing devices for marking the beginning of the group and each zone contains several unit cells whose Number is equal to the number of address bits and which contain at least one change in the direction of magnetization which is one of two predetermined Occupies positions inside each cell which indicates the value of each address bit, and which is read by the head Signals are brought into the form of digital pulses and the read address is saved, characterized by: - That a periodic reference signal (H) with exactly constant Freqt is produced; - that a signal (SYNCHRO) that is generated by dividing the frequency of the 809812/0583 ORIGINAL * INSPECTED ■ - 2 - Reference signal (H) is obtained by which digital pulses are synchronized, - that the bit of each address is stored by combining the signals (SYNCHRO) and the digital pulses (IMP.), where the value of each bit depends on the time position of each pulse (IMP.) within each period of the signal (SYNCHRO) is, - That the number of cells is counted, with each storage of a bit a cell is counted, - that the address is scanned and then stored, and - that the scanning of the address and the counting of the cells are enabled during the entire period of reading of each zone will, 2. Device for carrying out the method according to claim 1, "with a circuit for bringing the digital pulses into account and with an element for storing the read address, characterized by: - A clock generator (TAKT) which supplies the periodic reference signal (H); - A frequency divider (DIV) for the signal H, which supplies the signal (SYNCHRO) and its inputs with the output of the Shaping circuit (FORM) and connected to the output of the clock (TAKT); - A memory (MEMO) for storing the bits of the address, the inputs of which are connected to the output of the shaping circuit (FORM) and the frequency divider (DIV) are connected and its 809812/0583 Output is connected to an input of the storage element; - A counter (COMPT) for the number of cells, of which an input is connected to the output of the frequency divider (OlV) ; - A key circuit (TAST), vcn which an input is connected to the output of the frequency divider (DIV) and from which output is connected to a second input of the memory element; and - a toggle switch (KIPP) to enable the counting of the cells and the scanning of the address of which an input is connected to the output of the counter (COMPT) and of which the output is connected on the one hand to a second input of the counter (COMPT) and on the other hand to a second input of the key circuit (TAST). 3. Device according to claim 2, characterized in that the frequency divider (DIV) consists of two series-connected ring counters (AN ₁ , AN ₂ ). 4. Device according to claim 2 or 3, characterized in that the trigger circuit (KIPP) is a JK trigger circuit. 5. Device according to one of claims 2 to 4, characterized in that the key circuit (TAST) is a shift register (REG), which is connected in series with a NAND switch (P), the input of the register (REG) with the 809812/0583 Output of the frequency divider (DIV) is connected, while the output is connected to an input of the NAND circuit (P) is, of which the second input is connected to the output of the flip-flop (KIPP). 6. Device according to one of claims 2 to 5, characterized in that that the storage element is a serial register (SER). 7. Device according to one of claims 2 to 6, characterized in that that the magnetic recording medium is a magnetic disk of a magnetic disk storage. 8. Device according to one of claims 2 to 7, characterized in that each group of zones contains a single reference zone, the reference zones being arranged in the interior of separate, identical circular sectors which are arranged at regular intervals on the surface of the magnetic recording medium and the number of which is equal to the number of sectors. 809812/0583