DE2536270A1 - Mii oeffnungen versehene halbleiterscheibe - Google Patents

Mii oeffnungen versehene halbleiterscheibe

Info

Publication number
DE2536270A1
DE2536270A1 DE19752536270 DE2536270A DE2536270A1 DE 2536270 A1 DE2536270 A1 DE 2536270A1 DE 19752536270 DE19752536270 DE 19752536270 DE 2536270 A DE2536270 A DE 2536270A DE 2536270 A1 DE2536270 A1 DE 2536270A1
Authority
DE
Germany
Prior art keywords
semiconductor wafer
opening
openings
wafer according
mii
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19752536270
Other languages
German (de)
English (en)
Inventor
Alfred Harold Johnson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE2536270A1 publication Critical patent/DE2536270A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Wire Bonding (AREA)
DE19752536270 1974-08-19 1975-08-14 Mii oeffnungen versehene halbleiterscheibe Withdrawn DE2536270A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/498,342 US3959579A (en) 1974-08-19 1974-08-19 Apertured semi-conductor device mounted on a substrate

Publications (1)

Publication Number Publication Date
DE2536270A1 true DE2536270A1 (de) 1976-03-04

Family

ID=23980676

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19752536270 Withdrawn DE2536270A1 (de) 1974-08-19 1975-08-14 Mii oeffnungen versehene halbleiterscheibe

Country Status (6)

Country Link
US (1) US3959579A (https=)
JP (1) JPS5250512B2 (https=)
DE (1) DE2536270A1 (https=)
FR (1) FR2282719A1 (https=)
GB (1) GB1469085A (https=)
IT (1) IT1039025B (https=)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4082394A (en) * 1977-01-03 1978-04-04 International Business Machines Corporation Metallized ceramic and printed circuit module
US4193082A (en) * 1978-06-23 1980-03-11 International Business Machines Corporation Multi-layer dielectric structure
JPS5728337A (en) * 1980-07-28 1982-02-16 Hitachi Ltd Connecting constructin of semiconductor element
US4377316A (en) * 1981-02-27 1983-03-22 International Business Machines Corporation High density interconnection means for chip carriers
JPS582054A (ja) * 1981-06-26 1983-01-07 Fujitsu Ltd 半導体装置
JPS5918664A (ja) * 1982-07-22 1984-01-31 Mitsubishi Electric Corp 半導体試験用接続装置
JPS5966257A (ja) * 1982-10-08 1984-04-14 Nippon Telegr & Teleph Corp <Ntt> メツセ−ジ在中表示方式
US4862245A (en) * 1985-04-18 1989-08-29 International Business Machines Corporation Package semiconductor chip
US4667404A (en) * 1985-09-30 1987-05-26 Microelectronics Center Of North Carolina Method of interconnecting wiring planes
US4764644A (en) * 1985-09-30 1988-08-16 Microelectronics Center Of North Carolina Microelectronics apparatus
US4774630A (en) * 1985-09-30 1988-09-27 Microelectronics Center Of North Carolina Apparatus for mounting a semiconductor chip and making electrical connections thereto
GB2189084B (en) * 1986-04-10 1989-11-22 Stc Plc Integrated circuit package
US4754370A (en) * 1986-08-26 1988-06-28 American Telephone And Telegraph Company, At&T Bell Laboratories Electrical component with added connecting conducting paths
GB2253308B (en) * 1986-09-26 1993-01-20 Gen Electric Co Plc Semiconductor circuit arrangements
US4868634A (en) * 1987-03-13 1989-09-19 Citizen Watch Co., Ltd. IC-packaged device
JP2529254B2 (ja) * 1987-04-21 1996-08-28 シチズン時計株式会社 Ｉｃ実装装置
US5191224A (en) * 1987-04-22 1993-03-02 Hitachi, Ltd. Wafer scale of full wafer memory system, packaging method thereof, and wafer processing method employed therein
US5061822A (en) * 1988-09-12 1991-10-29 Honeywell Inc. Radial solution to chip carrier pitch deviation
US5223741A (en) * 1989-09-01 1993-06-29 Tactical Fabs, Inc. Package for an integrated circuit structure
US5313096A (en) * 1992-03-16 1994-05-17 Dense-Pac Microsystems, Inc. IC chip package having chip attached to and wire bonded within an overlying substrate
US5483100A (en) * 1992-06-02 1996-01-09 Amkor Electronics, Inc. Integrated circuit package with via interconnections formed in a substrate
US5264729A (en) * 1992-07-29 1993-11-23 Lsi Logic Corporation Semiconductor package having programmable interconnect
US6205654B1 (en) * 1992-12-11 2001-03-27 Staktek Group L.P. Method of manufacturing a surface mount package
US5514907A (en) * 1995-03-21 1996-05-07 Simple Technology Incorporated Apparatus for stacking semiconductor chips
US5682062A (en) * 1995-06-05 1997-10-28 Harris Corporation System for interconnecting stacked integrated circuits
US5646067A (en) * 1995-06-05 1997-07-08 Harris Corporation Method of bonding wafers having vias including conductive material
US5608264A (en) * 1995-06-05 1997-03-04 Harris Corporation Surface mountable integrated circuit with conductive vias
US5814889A (en) * 1995-06-05 1998-09-29 Harris Corporation Intergrated circuit with coaxial isolation and method
US5668409A (en) * 1995-06-05 1997-09-16 Harris Corporation Integrated circuit with edge connections and method
US5618752A (en) * 1995-06-05 1997-04-08 Harris Corporation Method of fabrication of surface mountable integrated circuits
US6572387B2 (en) 1999-09-24 2003-06-03 Staktek Group, L.P. Flexible circuit connector for stacked chip module
US6608763B1 (en) 2000-09-15 2003-08-19 Staktek Group L.P. Stacking system and method
US6462408B1 (en) 2001-03-27 2002-10-08 Staktek Group, L.P. Contact member stacking system and method
US9681550B2 (en) * 2007-08-28 2017-06-13 Joseph C. Fjelstad Method of making a circuit subassembly

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2890976A (en) * 1954-12-30 1959-06-16 Sprague Electric Co Monocrystalline tubular semiconductor
US3374533A (en) * 1965-05-26 1968-03-26 Sprague Electric Co Semiconductor mounting and assembly method
US3365620A (en) * 1966-06-13 1968-01-23 Ibm Circuit package with improved modular assembly and cooling apparatus
US3457541A (en) * 1967-05-01 1969-07-22 Lockheed Aircraft Corp Mounting board for electronic circuit elements
GB1239678A (https=) * 1968-12-04 1971-07-21
US3648131A (en) * 1969-11-07 1972-03-07 Ibm Hourglass-shaped conductive connection through semiconductor structures
US3596140A (en) * 1969-12-01 1971-07-27 Ronald A Walsh Demountable peripheral-contact electronic circuit board assembly
US3619734A (en) * 1969-12-17 1971-11-09 Rca Corp Assembly of series connected semiconductor elements having good heat dissipation
IT939391B (it) * 1970-09-08 1973-02-10 Pasticca semiconduttrice nonche metodo e dispositivo per la sua produzione
US3726002A (en) * 1971-08-27 1973-04-10 Ibm Process for forming a multi-layer glass-metal module adaptable for integral mounting to a dissimilar refractory substrate

Also Published As

Publication number Publication date
FR2282719A1 (fr) 1976-03-19
JPS5250512B2 (https=) 1977-12-24
JPS5136083A (https=) 1976-03-26
US3959579A (en) 1976-05-25
IT1039025B (it) 1979-12-10
FR2282719B1 (https=) 1977-07-22
GB1469085A (en) 1977-03-30

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Legal Events

Date Code Title Description
OD Request for examination
8139 Disposal/non-payment of the annual fee