DE2456951A1 - Halbleiterschaltungspackung und verfahren zu ihrer herstellung - Google Patents

Halbleiterschaltungspackung und verfahren zu ihrer herstellung

Info

Publication number
DE2456951A1
DE2456951A1 DE19742456951 DE2456951A DE2456951A1 DE 2456951 A1 DE2456951 A1 DE 2456951A1 DE 19742456951 DE19742456951 DE 19742456951 DE 2456951 A DE2456951 A DE 2456951A DE 2456951 A1 DE2456951 A1 DE 2456951A1
Authority
DE
Germany
Prior art keywords
semiconductor
connection
semiconductor circuit
connecting conductors
insulating material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19742456951
Other languages
German (de)
English (en)
Inventor
Andrew Koutalides
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Raytheon Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Raytheon Co filed Critical Raytheon Co
Publication of DE2456951A1 publication Critical patent/DE2456951A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)
DE19742456951 1973-12-03 1974-12-02 Halbleiterschaltungspackung und verfahren zu ihrer herstellung Withdrawn DE2456951A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US42100473A 1973-12-03 1973-12-03

Publications (1)

Publication Number Publication Date
DE2456951A1 true DE2456951A1 (de) 1975-06-05

Family

ID=23668787

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19742456951 Withdrawn DE2456951A1 (de) 1973-12-03 1974-12-02 Halbleiterschaltungspackung und verfahren zu ihrer herstellung

Country Status (7)

Country Link
JP (2) JPS5087587A (cs)
CA (1) CA1032276A (cs)
CH (1) CH585968A5 (cs)
DE (1) DE2456951A1 (cs)
FR (1) FR2253282B1 (cs)
GB (1) GB1458846A (cs)
SE (1) SE403852B (cs)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4577214A (en) * 1981-05-06 1986-03-18 At&T Bell Laboratories Low-inductance power/ground distribution in a package for a semiconductor chip

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2485262A1 (fr) * 1980-06-19 1981-12-24 Thomson Csf Boitier d'encapsulation resistant a de fortes pressions externes
JPH04120765A (ja) * 1990-09-12 1992-04-21 Seiko Epson Corp 半導体装置とその製造方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3374537A (en) * 1965-03-22 1968-03-26 Philco Ford Corp Method of connecting leads to a semiconductive device
US3436810A (en) * 1967-07-17 1969-04-08 Jade Corp Method of packaging integrated circuits
DE2003423A1 (de) * 1970-01-27 1971-09-16 Licentia Gmbh Verfahren zum Kontaktieren von Halbleiteranordnungen
US3668770A (en) * 1970-05-25 1972-06-13 Rca Corp Method of connecting semiconductor device to terminals of package
DE2217647A1 (de) * 1971-04-26 1972-11-09 RCA Corp., New York, N.Y. (V.StA.) Verbindungsanordnung zum Anschließen einer integrierten Schaltung
JPS4727491U (cs) 1971-04-17 1972-11-28
JPS4836983A (cs) 1971-09-10 1973-05-31

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3374537A (en) * 1965-03-22 1968-03-26 Philco Ford Corp Method of connecting leads to a semiconductive device
US3436810A (en) * 1967-07-17 1969-04-08 Jade Corp Method of packaging integrated circuits
DE2003423A1 (de) * 1970-01-27 1971-09-16 Licentia Gmbh Verfahren zum Kontaktieren von Halbleiteranordnungen
US3668770A (en) * 1970-05-25 1972-06-13 Rca Corp Method of connecting semiconductor device to terminals of package
JPS4727491U (cs) 1971-04-17 1972-11-28
DE2217647A1 (de) * 1971-04-26 1972-11-09 RCA Corp., New York, N.Y. (V.StA.) Verbindungsanordnung zum Anschließen einer integrierten Schaltung
JPS4836983A (cs) 1971-09-10 1973-05-31

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
JP-GM 27 491/72 *
JP-OS 36 983/73 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4577214A (en) * 1981-05-06 1986-03-18 At&T Bell Laboratories Low-inductance power/ground distribution in a package for a semiconductor chip

Also Published As

Publication number Publication date
GB1458846A (en) 1976-12-15
SE403852B (sv) 1978-09-04
FR2253282A1 (cs) 1975-06-27
JPS5087587A (cs) 1975-07-14
JPS5860940U (ja) 1983-04-25
CH585968A5 (cs) 1977-03-15
SE7415064L (cs) 1975-06-04
CA1032276A (en) 1978-05-30
FR2253282B1 (cs) 1980-09-12

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Legal Events

Date Code Title Description
OD Request for examination
8125 Change of the main classification

Ipc: H01L 23/50

8126 Change of the secondary classification

Ipc: H01L 21/92

8130 Withdrawal