DE19845790B4 - Process for the wet-chemical thinning of Si layers in the active emitter region of a bipolar transistor - Google Patents
Process for the wet-chemical thinning of Si layers in the active emitter region of a bipolar transistor Download PDFInfo
- Publication number
- DE19845790B4 DE19845790B4 DE1998145790 DE19845790A DE19845790B4 DE 19845790 B4 DE19845790 B4 DE 19845790B4 DE 1998145790 DE1998145790 DE 1998145790 DE 19845790 A DE19845790 A DE 19845790A DE 19845790 B4 DE19845790 B4 DE 19845790B4
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- Prior art keywords
- layer
- stop layer
- doping
- etch stop
- wet
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- 239000000126 substance Substances 0.000 title claims abstract description 18
- 238000000034 method Methods 0.000 title claims abstract description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 10
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 10
- 239000010703 silicon Substances 0.000 claims abstract description 10
- 238000005530 etching Methods 0.000 claims abstract description 6
- 239000010410 layer Substances 0.000 claims description 71
- 239000002019 doping agent Substances 0.000 claims description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 4
- 239000002356 single layer Substances 0.000 claims description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- 229910052796 boron Inorganic materials 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 2
- 229910052799 carbon Inorganic materials 0.000 claims description 2
- 229910052732 germanium Inorganic materials 0.000 claims description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims 2
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000002955 isolation Methods 0.000 description 4
- 238000000151 deposition Methods 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052729 chemical element Inorganic materials 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000003631 wet chemical etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66242—Heterojunction transistors [HBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
Abstract
Verfahren zur naßchemischen Abdünnung von Siliziumschichten im aktiven Emittergebiet (7) eines Bipolartransistors, dadurch gekennzeichnet, daß eine zusätzlich mittels Atomic Layer Doping in eine Deckelschicht (3 und 9; 3 und 8) eingebrachte Dotierung mit einer Dicke kleiner 3 nm als Ätzstoppschicht (5, 10) für naßchemische Ätzmittel wirkt und die Ätzstoppschicht (5, 10) mit einem naßchemischen Ätzmittel entfernt wird.method to the wet chemical thinning of silicon layers in the active emitter region (7) of a bipolar transistor, characterized in that a additionally by means of atomic layer doping in a cover layer (3 and 9, 3 and 8) introduced doping with a thickness of less than 3 nm as the etching stop layer (5, 10) for wet chemical etchant acts and the etch stop layer (5, 10) with a wet chemical etchant Will get removed.
Description
Die Erfindung bezieht sich auf ein Verfahren zur naßchemischen Abdünnung von Si-Schichten im aktiven Emittergebiet eines Bipolartransistors.The The invention relates to a method for wet chemical thinning of Si layers in the active emitter region of a bipolar transistor.
Mit Hilfe epitaktischer Prozesse zur Erzeugung der Basis und des Basisanschlusses lassen sich die Hochgeschwindigkeitseigenschaften von Bipolartransistoren weiter verbessern. Dabei wird die Möglichkeit der insitu-Dotierung genutzt, um geringere Basisweiten und -schichtwiderstände zu realisieren. Günstig auf die Einstellung von Basisschichtwiderstand und Stromverstärkung wirkt sich bekanntermaßen die Abscheidung von Heteroschichten aus.With Help epitaxial processes to generate the base and the base connection let the high-speed characteristics of bipolar transistors improve further. The possibility of in situ doping is thereby used to realize lower base widths and film resistances. Cheap on the setting of base layer resistance and current gain acts known the deposition of heterolayers.
In einer speziellen Einfach-Polysilizium-Technologie mit Ätzstoppschicht wurde das Verfahren der differentiellen Epitaxie zur Erzeugung epitaktischer Basisschichten verwendet. Differentielle Epitaxie bedeutet, daß epitaktisches Wachstum sowohl auf Halbleiter- als auch auf Isolatorgebieten stattfindet. So können gleichzeitig die innere Basis und der Basisanschluß auf dem Isolatorgebiet entstehen.In a special single polysilicon technology with etch stop layer the process of differential epitaxy was used to produce epitaxial Base layers used. Differential epitaxy means that epitaxial Growth takes place in both semiconductor and insulator regions. So can at the same time the inner base and the base connection on the Isolator area arise.
Nachteilig dabei ist, daß die Dicke der Epitaxieschicht der inneren Basis nicht unabhängig von der des Basisanschlusses auf dem Isolatorgebiet eingestellt werden kann. In Bezug auf Hochgeschwindigkeitsanwendungen wäre es von Vorteil, im Bereich des aktiven Basis-Emitter-Überganges eine hinreichend geringe Epitaxieschichtdicke zwischen Emitter und Basis, im äußeren Basisgebiet zur Realisierung von möglichst geringen Basisanschluß-Widerständen eine dickere Epitaxieschicht zu realisieren.adversely it is that the Thickness of the epitaxial layer of the inner base not independent of the of the base terminal can be set in the insulator area. In terms of high-speed applications, it would be beneficial in the area of the active base-emitter junction a sufficiently low epitaxial layer thickness between emitter and Base, in the outer base area for the realization of possible low base terminal resistors one To realize thicker epitaxial layer.
Aus
Aufgabe der Erfindung ist es, ein Verfahren zur naßchemischen Abdünnung der epitaktischen Siliziumschicht im aktiven Emittergebiet eines Bipolartransistors vorzuschlagen, das die Hochgeschwindigkeitseigenschaften des Bipolartransistors verbessert und insbesondere im Bereich des aktiven Basis-Emitter-Übergangs eine hinreichend geringe Epitaxieschichtdicke zwischen Emitter und Basis und im äußeren Basisgebiet zur Realisierung von möglichst geringen Basisanschluß-Widerständen eine dickere Epitaxieschicht ermöglicht.task The invention is a method for wet chemical thinning the epitaxial silicon layer in the active emitter region of a bipolar transistor propose that the high speed characteristics of the bipolar transistor improves and, in particular in the area of the active base-emitter junction a sufficiently low Epitaxial layer thickness between emitter and base and in the outer base region for the realization of the smallest possible Base terminal resistors one thicker epitaxial layer allows.
Zur Realisierung dieser gegensätzlichen Anforderungen an die Epitaxieschichtdicke wird die Epitaxieschichtdicke über der Basis, bekannt als Deckeldicke, generell erhöht und innerhalb des aktiven Emitterbereiches nachträglich mittels geeigneter Verfahren, wie z. B. naßchemischem Rückätzen, reduziert.to Realization of these opposing Epitaxial layer thickness requirements will exceed the epitaxial layer thickness over the Base, known as lid thickness, generally elevated and within the active emitter area later by suitable methods, such. As wet chemical etching, reduced.
Erfindungsgemäß wird diese Aufgabe durch ein Verfahren nach Anspruch 1 gelöst, welches eine naßchemische Oberflächenrelief-Erzeugung im Bereich des aktiven Emitters umfasst.According to the invention this Problem solved by a method according to claim 1, which is a wet chemical Surface relief generation in the area of the active emitter.
Um definierte Silizium-Abträge im Bereich des aktiven Emitters zu erzielen, ist es zweckmäßig, eine zusätzliche insitu Dotierung epitaktisch in der Deckelschicht über der abgeschiedenen Basis zu realisieren. Diese insitu Dotierungen dienen als Ätzstoppschichten, die es ermöglichen, gut reproduzierbar mit bekannten naßchemischen Ätzmitteln definiert Silizium abzutragen.Around defined silicon deposits in the range of the active emitter, it is appropriate to a additional insitu doping epitaxially in the cover layer over the realized on a separate basis. These insitu dopings serve as etch stop layers, which make it possible good reproducibility with known wet chemical etchants defined to remove silicon.
Als Dotanden werden verschiedene chemische Elemente wie Bor, Germanium oder Kohlenstoff eingesetzt, die einen Ätzstopp bewirken.When Dotants become various chemical elements such as boron, germanium or carbon used, which cause an etching stop.
Bei Verwendung von Bor als Ätzstopp- bzw. Dotandenschicht liegt es im Bereich der Erfindung, zwischen hochdotierter Ätzstopp- bzw. Dotandenschicht und Deckelschicht einerseits und der Emitterdotierung andererseits einen Inside-Poly-Silizium-Spacer zu bilden, um einen ausreichenden seitlichen Abstand zwischen diesen unterschiedlichen Dotierungen zu realisieren.at Use of boron as etch stop or Dotandenschicht it is within the scope of the invention, between highly doped etch stop or Dotandenschicht and cover layer on the one hand and the emitter doping on the other hand, an inside-poly-silicon spacer to form enough lateral space between them realize different dopings.
Als Verfahren zur Erzeugung der Ätzstoppschicht wurde das "Atomic Layer Doping", im folgenden als ALD bezeichnet, angewandt. Beim Atomic Layer Doping wird die Dosierung und die vertikale Positionierung der Dotierstoffschicht mit Atomlagengenauigkeit eingestellt.When Method for producing the etch stop layer became the "Atomic Layer Doping ", im hereafter referred to as ALD. Atomic Layer Doping becomes the dosage and the vertical positioning of the dopant layer set with atomic layer accuracy.
Diese Atomlagengenauigkeit der Einbringung der Dotierung als Ätzstoppschicht bietet den Vorteil, die Dicke der zu ätzenden Emitterschicht mit Atomlagengenauigkeit einzustellen. Erfindungsgemäß wird die Atomlagendotierung während der Abscheidung der Emitterschicht eingebracht.These Atomic position accuracy of the introduction of the doping as etching stop layer offers the advantage of the thickness of the emitter layer to be etched with atomic layer accuracy adjust. According to the invention Atomic doping during introduced the deposition of the emitter layer.
Ausführungsbeispiele der Erfindung sind in den Zeichnungen dargestellt und werden im folgenden näher erläutert.embodiments The invention are illustrated in the drawings and are in following closer explained.
Die Zeichnungen zeigen:The Drawings show:
Beispiel 1example 1
Die Erfindung wird nun am Beispiel der Herstellung eines Bipolartransistors beschrieben.The The invention will now be described using the example of the production of a bipolar transistor described.
Eine
Epitaxieschichtfolge, bestehend aus Pufferschicht
Mit
Hilfe bekannter naßchemischer Ätzmittel, die
Silizium hochselektiv zum Die lektrikum
Beispiel 2Example 2
Eine
Epitaxieschichtfolge, bestehend aus Pufferschicht
Mit
Hilfe bekannter naßchemischer Ätzmittel, die
Polysilizium hochselektiv zum Dielektrikum
In der vorliegenden Erfindung wurde anhand konkreter Ausführungsbeispiele ein Verfahren zur naßchemischen Abdünnung von Si-Schichten im aktiven Emittergebiet eines Bipolartransistors erläutert. Es sei aber vermerkt, daß die vorliegende Erfindung nicht auf die Einzelheiten der Beschreibung in den Ausführungsbeispielen eingeschränkt ist, da im Rahmen der Patentansprüche Änderungen und Abwandlungen beansprucht werden.In The present invention was based on concrete embodiments a method for wet chemical thinning Si layers in the active emitter region of a bipolar transistor explained. It be noted, however, that the The present invention is not limited to the details of the description in the embodiments limited is because within the scope of the claims changes and modifications be claimed.
Claims (5)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE1998145790 DE19845790B4 (en) | 1998-09-21 | 1998-09-21 | Process for the wet-chemical thinning of Si layers in the active emitter region of a bipolar transistor |
PCT/DE1999/003068 WO2000017922A1 (en) | 1998-09-21 | 1999-09-20 | METHOD FOR THE WET-CHEMICAL THINNING OF Si-LAYERS IN THE ACTIVE EMITTER REGION OF A BIPOLAR TRANSISTOR |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE1998145790 DE19845790B4 (en) | 1998-09-21 | 1998-09-21 | Process for the wet-chemical thinning of Si layers in the active emitter region of a bipolar transistor |
Publications (2)
Publication Number | Publication Date |
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DE19845790A1 DE19845790A1 (en) | 2000-03-23 |
DE19845790B4 true DE19845790B4 (en) | 2008-12-04 |
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DE1998145790 Expired - Fee Related DE19845790B4 (en) | 1998-09-21 | 1998-09-21 | Process for the wet-chemical thinning of Si layers in the active emitter region of a bipolar transistor |
Country Status (2)
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DE (1) | DE19845790B4 (en) |
WO (1) | WO2000017922A1 (en) |
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DE102004053393B4 (en) | 2004-11-05 | 2007-01-11 | Atmel Germany Gmbh | Method for producing a vertically integrated cascode structure and vertically integrated cascode structure |
DE102004053394B4 (en) * | 2004-11-05 | 2010-08-19 | Atmel Automotive Gmbh | Semiconductor arrangement and method for producing a semiconductor device |
DE102004055213B4 (en) | 2004-11-16 | 2009-04-09 | Atmel Germany Gmbh | Method for producing an integrated circuit on a semiconductor chip |
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- 1998-09-21 DE DE1998145790 patent/DE19845790B4/en not_active Expired - Fee Related
-
1999
- 1999-09-20 WO PCT/DE1999/003068 patent/WO2000017922A1/en active Application Filing
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Also Published As
Publication number | Publication date |
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DE19845790A1 (en) | 2000-03-23 |
WO2000017922A1 (en) | 2000-03-30 |
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