DE19728183B4 - Manufacturing method of conductive wires of a chip-size semiconductor package - Google Patents

Manufacturing method of conductive wires of a chip-size semiconductor package Download PDF

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Publication number
DE19728183B4
DE19728183B4 DE19728183A DE19728183A DE19728183B4 DE 19728183 B4 DE19728183 B4 DE 19728183B4 DE 19728183 A DE19728183 A DE 19728183A DE 19728183 A DE19728183 A DE 19728183A DE 19728183 B4 DE19728183 B4 DE 19728183B4
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conductive wires
conductive
electrolyzer
electrode
chip
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DE19728183A1 (en
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Jea-Weon Cho
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SK Hynix Inc
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LG Semicon Co Ltd
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Abstract

Herstellungsverfahren für leitende Drähte eines Halbleitergehäuses in Chipgröße oder eines CSP, das umfaßt:
Bonden leitender Drähte (45) auf Bondinseln (43), die auf einer oberen Oberfläche eines Halbleiterchips (41) geformt sind;
Einbringen des Halbleiterchips (41) mit den so gebondeten leitenden Drähten (45) in einen Elektrolyseur (55), der eine Elektrolytlösung (50) enthält, auf eine Art und Weise, daß ein Ende jedes der leitenden Drähte (45) außerhalb der Elektrolytlösung (50) liegt;
Anbringen einer Galvanisierelektrode (60) an einer Innenwand des Elektrolyseurs (55), wobei die Galvanisierungselektrode (60) vollständig in die Elektrolytlösung (50) eingetaucht ist;
Anbringen einer leitenden Platte (65), die als gemeinsame Elektrode dient, an dem freiliegenden einen Ende jedes der leitenden Drähte (45); und
Verbinden der leitenden Platte (65) und der Außenwand des Elektrolyseurs (55) mit einer elektrischen Stromquelle (70) zur Durchführung einer Galvanisierung auf der Oberfläche der leitenden Drähte (45).
A conductive wire manufacturing method of a chip-size semiconductor package or a CSP, comprising:
Bonding conductive wires (45) to bonding pads (43) formed on an upper surface of a semiconductor chip (41);
Inserting the semiconductor chip (41) with the conductive wires (45) thus bonded into an electrolyzer (55) containing an electrolytic solution (50) in a manner such that one end of each of the conductive wires (45) is external to the electrolytic solution (50) 50);
Attaching a plating electrode (60) to an inner wall of the electrolyzer (55), wherein the plating electrode (60) is completely immersed in the electrolytic solution (50);
Attaching a conductive plate (65) serving as a common electrode to the exposed one end of each of the conductive wires (45); and
Bonding the conductive plate (65) and the outer wall of the electrolyzer (55) to an electrical power source (70) for performing electroplating on the surface of the conductive wires (45).

Figure 00000001
Figure 00000001

Description

HINTERGRUND DER ERFINDUNGBACKGROUND OF THE INVENTION

1. Bereich der Erfindung1. Field of the invention

Die vorliegende Erfindung betrifft ein Herstellungsverfahren für leitende Drähte eines Halbleitergehäuses in Chipgröße (im Folgenden als CSP bezeichnet) und besonders ein verbessertes Herstellungsverfahren für leitende Drähte eines CSP, bei dem leitende Drähte direkt auf Bondinseln, die auf einem Halbleiterchip geformt sind, gebondet werden.The The present invention relates to a manufacturing method for conductive wires a semiconductor package in chip size (hereafter referred to as CSP) and especially an improved manufacturing process for senior wires a CSP, where conductive wires directly on bonding pads formed on a semiconductor chip, be bonded.

Das Herstellungsverfahren für CSP nach dem Stand der Technik wird nun mit Bezug auf 1A bis 1F ausführlich beschrieben.The manufacturing method of prior art CSP will now be described with reference to FIG 1A to 1F described in detail.

Als erstes wird, wie in 1A gezeigt, ein Halbleiterchip (11) (oder ein Wafer), auf dem eine Bondinsel (13) geformt ist, bereitgestellt, und eine Passivierungsschicht (15) wird auf der oberen Oberfläche des Halbleiterchips (11), außer auf der Bondinsel (13), geformt. Dann werden, wie in 1B gezeigt, eine aus TiW bestehende erste leitende Schicht (17) und eine aus Au bestehende zweite leitende Schicht (19) der Reihe nach durch ein Sputterverfahren auf der Bondinsel (13) und der Passivierungsschicht (15) abgeschieden. Wie in 1C gezeigt, wird ein Ende eines aus Gold (Au) bestehenden leitenden Drahts (21) auf die Oberfläche der auf der Bondinsel (13) geformten zweiten leitenden Schicht (19) gebondet, und dann wird der leitende Draht (21) so geschnitten, daß er als gerade oder gekrümmte Linie von 1 bis 2 mm Länge geformt wird. Die leitende Schicht (19) wird als gemeinsamer Anschluß verwendet, wenn ein späterer Galvanisierprozeß ausgeführt wird. Als nächstes wird, wie in 1D gezeigt, auf der zweiten leitenden Schicht (19) außer auf dem Teil, wo die Bondinsel (13) geformt ist, ein Fotolack (23) geformt. Dann wird, wie in 1E gezeigt, um die Stärke des leitenden Drahts (21) zu erhöhen, auf der Oberfläche des leitenden Drahts (21) eine Beschichtung mit Nickel (Ni) (25) durchgeführt, und dann wird, wie in 1F gezeigt, auf dem mit Nickel beschichteten Teil des leitenden Drahts (21) eine Beschichtung mit Gold (Au) (27) ausgeführt. Die Goldbeschichtung verbessert eine elektrische Lötverbindung zwischen dem leitenden Draht (21) und einer Leiterplatte (PCB), wenn das CSP auf der PCB angebracht wird, und verhindert Korrosion. Das Verfahren zum Beschichten mit Nickel und Gold verwendet Galvanisieren. Schließlich wird der Fotolack (23) entfernt und die erste und zweite leitende Schicht (17, 19) werden außer in dem Bereich, wo die Bondinsel (13) geformt ist, entfernt.First, as in 1A shown a semiconductor chip ( 11 ) (or a wafer) on which a bonding pad ( 13 ), and a passivation layer ( 15 ) is on the upper surface of the semiconductor chip ( 11 ), except on the bond island ( 13 ), shaped. Then, as in 1B shown a TiW first conductive layer ( 17 ) and a second conductive layer made of Au ( 19 ) in turn by a sputtering method on the bonding pad ( 13 ) and the passivation layer ( 15 ) deposited. As in 1C 1, an end of a gold (Au) conductive wire (FIG. 21 ) on the surface of the bond island ( 13 ) formed second conductive layer ( 19 ) and then the conductive wire ( 21 ) is cut so that it is shaped as a straight or curved line of 1 to 2 mm in length. The conductive layer ( 19 ) is used as a common terminal when a later plating process is carried out. Next, as in 1D shown on the second conductive layer ( 19 ) except on the part where the bond island ( 13 ), a photoresist ( 23 ) shaped. Then, as in 1E shown the strength of the conductive wire ( 21 ), on the surface of the conductive wire ( 21 ) a coating with nickel (Ni) ( 25 ), and then, as in 1F shown on the nickel-coated part of the conductive wire ( 21 ) a coating with gold (Au) ( 27 ). The gold coating improves an electrical solder joint between the conductive wire ( 21 ) and a printed circuit board (PCB) when the CSP is mounted on the PCB and prevents corrosion. The process of coating with nickel and gold uses electroplating. Finally, the photoresist ( 23 ) and the first and second conductive layers ( 17 . 19 ) except in the area where the bond island ( 13 ) is formed, removed.

Das in Zusammenhang mit den 1A bis 1F beschriebene Herstellungsverfahren ist beispielsweise aus der WO 96/15459 A1 bekannt, wobei jedoch anstatt von zwei leitfähigen Schichten (17, 19) nur eine einzige leitfähige Schicht auf die Bondinsel (13) bzw. die Passivierungsschicht (15) aufgebracht wird.That in connection with the 1A to 1F described manufacturing method is known for example from WO 96/15459 A1, but instead of two conductive layers ( 17 . 19 ) only a single conductive layer on the bonding pad ( 13 ) or the passivation layer ( 15 ) is applied.

Das herkömmliche Herstellungsverfahren für CSP erfordert ungünstigerweise einen sehr schwierigen und kostspieligen Prozeß wie Sputtern, Aufbringen von Fotolack und Ätzen, um die Stärke des leitenden Drahts (21) und die elektrische Lötverbindung zu verbessern und Korrosion zu verhindern.Unfortunately, the conventional CSP fabrication process requires a very difficult and costly process such as sputtering, photoresist, and etching to increase the strength of the conductive wire (FIG. 21 ) and to improve the electrical solder joint and prevent corrosion.

ZUSAMMENFASSUNG DER ERFINDUNGSUMMARY THE INVENTION

Es ist folglich ein Ziel der vorliegenden Erfindung, durch Verbessern eines Beschichtungsverfahrens eines leitenden Drahts des CSP ein einfacheres und kostengünstigeres Herstellungsverfahren für leitende Drähte eines Halbleitergehäuses in Chipgröße (CSP) bereitzustellen.It is therefore an object of the present invention, by improving a method of coating a conductive wire of the CSP simpler and cheaper Manufacturing process for conductive wires a semiconductor package in chip size (CSP) provide.

Um das obige Ziel zu erreichen, wird ein verbessertes Herstellungsverfahren für leitende Drähte eines CSP bereitgestellt, das enthält: Bonden leitender Drähte auf Bondinseln, die auf der oberen Oberfläche eines Halbleiterchips geformt sind, Einbringen der gesamten Struktur in einen Elektrolyseur, der eine Elektrolytlösung enthält, auf eine Art und Weise, daß ein Ende jedes leitenden Drahts außerhalb der Elektrolytlösung liegt, Anbringen einer Galvanisierelektrode an der inneren Wand des Elektrolyseurs, wobei die Galvanisierungselektrode vollständig in die Elektrolytlösung eingetaucht ist, Anbringen ei ner leitenden Platte, die dem freigelegten einen Ende jedes leitenden Drahts als gemeinsame Elektrode dient, und Verbinden der leitenden Platte und der Außenwand des Elektrolyseurs mit einer Stromquelle zur Durchführung einer Galvanisierung auf der Oberfläche der leitenden Drähte.Around Achieving the above object will be an improved manufacturing process for senior Wires one CSP provided that includes: Bonding of conductive wires on bond pads formed on the top surface of a semiconductor chip are, introducing the entire structure into an electrolyzer, the one electrolyte solution contains in a way that one End of each wire outside the electrolyte solution attaching a plating electrode to the inner wall the electrolyzer, wherein the electroplating electrode completely in the electrolyte solution immersed, attaching a conductive plate to the exposed one one end of each conductive wire serves as a common electrode, and Connecting the conductive plate and the outer wall of the electrolyzer with a power source for carrying a galvanization on the surface of the conductive wires.

KURZE BESCHREIBUNG DER ZEICHNUNGENSHORT DESCRIPTION THE DRAWINGS

Die vorliegende Erfindung wird aus der unten gegebenen ausführlichen Beschreibung und den beigefügten Zeichnungen, die nur der Darstellung dienen und somit die vorliegende Erfindung nicht beschränken, besser verständlich.The The present invention will become apparent from the detailed below Description and attached Drawings, which serve only the representation and thus the present one Not limit the invention better understandable.

1A bis 1F sind Schnittansichten in Längsrichtung, die ein Herstellungsverfahren für ein Halbleitergehäuse in Chipgröße (CSP) gemäß dem Stand der Technik zeigen; und 1A to 1F 5 are longitudinal sectional views showing a prior art chip size (CSP) semiconductor package manufacturing method; and

2A bis 2E sind Schnittansichten in Längsrichtung, die ein Herstellungsverfahren für ein CSP gemäß der vorliegenden Erfindung zeigen. 2A to 2E FIG. 15 are longitudinal sectional views showing a manufacturing method of a CSP according to the present invention.

AUSFÜHRLICHE BESCHREIBUNG DER ERFINDUNGDETAILED DESCRIPTION OF THE INVENTION

Das Herstellungsverfahren für leitende Drähte eines Halbleitergehäuses in Chipgröße (CSP) gemäß der vorliegenden Erfindung wird nun mit Bezug auf die beigefügten Zeichnungen ausführlich beschrieben.The Manufacturing process for conductive wires a semiconductor package in chip size (CSP) according to the present The invention will now be described in detail with reference to the accompanying drawings.

2A bis 2E sind Schnittansichten in Längsrichtung, die die Herstellung eines CSP gemäß der vorliegenden Erfindung zeigen. 2A to 2E are longitudinal sectional views showing the manufacture of a CSP according to the present invention.

Zuerst werden, wie in 2A gezeigt, aus Gold (Au) bestehende leitende Drähte (45) jeweils auf eine Vielzahl von auf einem Halbleiterchip (41) geformten Bondinseln (43) gebondet.First, as in 2A shown gold (Au) existing conductive wires ( 45 ) each on a plurality of on a semiconductor chip ( 41 ) molded bond islands ( 43 Bonded.

Dann wird der sich ergebende Halbleiterchip (40) von 2A, wie in 2B gezeigt, in einen Elektrolyseur (55), der eine Elektrolytlösung (50) enthält, auf eine Art und Weise eingebracht, daß ein Ende jedes aus der Vielzahl von leitenden Drähten (45), die auf den Halbleiterchip (40) gebondet sind, außerhalb der Elektrolytlösung (50) liegt.Then, the resulting semiconductor chip ( 40 ) from 2A , as in 2 B shown in an electrolyzer ( 55 ) containing an electrolyte solution ( 50 ) in such a way that one end of each of the plurality of conductive wires ( 45 ) on the semiconductor chip ( 40 ) are bonded outside the electrolyte solution ( 50 ) lies.

Dann wird, wie in 2C gezeigt, eine Galvanisierelektrode (60) wie beispielsweise eine Nickelelektrode (Ni) an der Innenwand des Elektrolyseurs (55) auf eine Art und Weise angebracht, daß die Elektrode (60) vollständig in die Elektrolytlösung (50) eingetaucht ist.Then, as in 2C shown a galvanizing electrode ( 60 ) such as a nickel electrode (Ni) on the inner wall of the electrolyzer ( 55 ) in such a way that the electrode ( 60 ) completely into the electrolyte solution ( 50 ) is immersed.

Dann wird, wie in 2D gezeigt, eine als gemeinsame Elektrode dienende leitende Platte (65) auf dem einen freiliegenden Ende jedes der leitenden Drähte (45) angebracht. Die leitende Platte (65) besteht vorzugsweise aus Kupfer (Cu).Then, as in 2D shown serving as a common electrode conductive plate ( 65 ) on the one exposed end of each of the conductive wires ( 45 ) appropriate. The conductive plate ( 65 ) is preferably made of copper (Cu).

Als nächstes werden, wie in 2E gezeigt, die leitende Platte (65) und die Außenwand des Elektrolyseurs (55) mit einer elektrischen Stromquelle (70) verbunden, um ein Galvanisieren durchzuführen. Das Material der in den Elektrolyseur (55) eingetauchten Elektrode (60), d.h. Nickel (Ni) wird ionisiert, und das ionisierte Nickel wird auf die Oberflächen der aus Gold (Au) bestehenden, zu beschichtenden leitenden Drähte (45) aufgebracht. Nach Abschluß der Beschichtung mit Nickel wird die Stromquelle (70) abgeschaltet und die Galvanisierelektrode (60) wird durch eine an der Innenwand des Elektrolyseurs (55) anzubringende Goldelektrode anstatt einer Nickelelektrode ersetzt, und dann wird die Stromquelle (70) wieder daran angeschlossen. Dann wird die Goldgalvanisierelektrode ionisiert und das ionisierte Gold wird auf die Oberfläche des auf der Oberfläche der zu beschichtenden leitenden Drähte (45) geformten Nickelfilms aufgebracht. Das bedeutet, durch Ersetzen des Elektrodenmaterials (60) können die Oberflächen der leitenden Drähte (45) mit einem Material beschichtet werden, das der Anwender benötigt.Next, as in 2E shown the conductive plate ( 65 ) and the outer wall of the electrolyzer ( 55 ) with an electrical power source ( 70 ) to perform a plating. The material used in the electrolyser ( 55 ) immersed electrode ( 60 ), ie nickel (Ni) is ionized, and the ionized nickel is deposited on the surfaces of the conductive gold wires (to be coated) of gold (Au) ( 45 ) applied. After completion of the coating with nickel, the power source ( 70 ) and the electroplating electrode ( 60 ) is by a on the inner wall of the electrolyzer ( 55 ) is replaced instead of a nickel electrode, and then the power source ( 70 ) connected again. Then, the gold plating electrode is ionized and the ionized gold is deposited on the surface of the conductive wires (FIG. 45 ) formed nickel film applied. This means, by replacing the electrode material ( 60 ), the surfaces of the conductive wires ( 45 ) are coated with a material that the user needs.

Wie oben ausführlich beschrieben, kann gemäß dem Herstellungsverfahren für CSP gemäß der vorliegenden Erfindung durch Durchführung einer Galvanisierung auf der Oberfläche des Leiters unter Verwendung eines einfachen Systems aus Elektrolyseur, im Elektrolyseur enthaltener Elektrolytlösung und einer Elektrode, ein einfacherer und kostengünstigerer Galvanisierprozeß verwirklicht werden, um eine gewünschte CSP-Herstellung zu erhalten.As above in detail described according to the manufacturing process for CSP according to the present Invention by implementation a galvanization on the surface of the conductor using a simple system of electrolyzer, contained in the electrolyser Electrolytic solution and an electrode, a simpler and cheaper electroplating process realized be to a desired one CSP production to obtain.

Obwohl die bevorzugten Ausführungsformen der vorliegenden Erfindung zum Zweck der Darstellung beschrieben wurden, werden Fachleute erkennen, daß verschiedene Modifikationen, Zusätze und Ersetzungen möglich sind, ohne vom Bereich und vom Geist der Erfindung abzuweichen, wie sie in den beigefügten Ansprüchen dargestellt ist.Even though the preferred embodiments of have been described for purposes of illustration, Professionals will recognize that different Modifications, accessories and substitutions possible are without departing from the scope and spirit of the invention, as they are in the attached claims is shown.

Claims (6)

Herstellungsverfahren für leitende Drähte eines Halbleitergehäuses in Chipgröße oder eines CSP, das umfaßt: Bonden leitender Drähte (45) auf Bondinseln (43), die auf einer oberen Oberfläche eines Halbleiterchips (41) geformt sind; Einbringen des Halbleiterchips (41) mit den so gebondeten leitenden Drähten (45) in einen Elektrolyseur (55), der eine Elektrolytlösung (50) enthält, auf eine Art und Weise, daß ein Ende jedes der leitenden Drähte (45) außerhalb der Elektrolytlösung (50) liegt; Anbringen einer Galvanisierelektrode (60) an einer Innenwand des Elektrolyseurs (55), wobei die Galvanisierungselektrode (60) vollständig in die Elektrolytlösung (50) eingetaucht ist; Anbringen einer leitenden Platte (65), die als gemeinsame Elektrode dient, an dem freiliegenden einen Ende jedes der leitenden Drähte (45); und Verbinden der leitenden Platte (65) und der Außenwand des Elektrolyseurs (55) mit einer elektrischen Stromquelle (70) zur Durchführung einer Galvanisierung auf der Oberfläche der leitenden Drähte (45).Method of manufacturing conductive wires of a chip-size semiconductor package or a CSP, comprising: bonding conductive wires ( 45 ) on bond islands ( 43 ) mounted on an upper surface of a semiconductor chip ( 41 ) are formed; Introduction of the semiconductor chip ( 41 ) with the conductive wires thus bonded ( 45 ) in an electrolyzer ( 55 ) containing an electrolyte solution ( 50 ) in such a way that one end of each of the conductive wires ( 45 ) outside the electrolyte solution ( 50 ) lies; Attaching a galvanizing electrode ( 60 ) on an inner wall of the electrolyzer ( 55 ), wherein the electroplating electrode ( 60 ) completely into the electrolyte solution ( 50 ) is immersed; Attaching a conductive plate ( 65 ) serving as a common electrode at the exposed one end of each of the conductive wires (FIG. 45 ); and connecting the conductive plate ( 65 ) and the outer wall of the electrolyzer ( 55 ) with an electrical power source ( 70 ) for performing a galvanization on the surface of the conductive wires ( 45 ). Verfahren nach Anspruch 1, bei dem die leitenden Drähte (45) aus Gold (Au) bestehen.The method of claim 1, wherein the conductive wires ( 45 ) consist of gold (Au). Verfahren nach Anspruch 1, bei dem die Galvanisierelektrode (60) aus einem leitenden Material besteht.Method according to claim 1, in which the plating electrode ( 60 ) consists of a conductive material. Verfahren nach Anspruch 1, bei dem die leitende Platte (65) aus Kupfer (Cu) besteht.Method according to Claim 1, in which the conductive plate ( 65 ) consists of copper (Cu). Verfahren nach Anspruch 1, bei dem die Galvanisierelektrode (60) aus Nickel (Ni) besteht.Method according to claim 1, in which the plating electrode ( 60 ) consists of nickel (Ni). Verfahren nach Anspruch 1, bei dem die Galvanisierelektrode (60) aus Gold (Au) besteht.Method according to claim 1, in which the plating electrode ( 60 ) consists of gold (Au).
DE19728183A 1996-12-28 1997-07-02 Manufacturing method of conductive wires of a chip-size semiconductor package Expired - Fee Related DE19728183B4 (en)

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