DE1564901A1 - Method for soldering a semiconductor device, e.g. a diode or a transistor on a carrier body - Google Patents
Method for soldering a semiconductor device, e.g. a diode or a transistor on a carrier bodyInfo
- Publication number
- DE1564901A1 DE1564901A1 DE19681564901 DE1564901A DE1564901A1 DE 1564901 A1 DE1564901 A1 DE 1564901A1 DE 19681564901 DE19681564901 DE 19681564901 DE 1564901 A DE1564901 A DE 1564901A DE 1564901 A1 DE1564901 A1 DE 1564901A1
- Authority
- DE
- Germany
- Prior art keywords
- layer
- carrier body
- gold layer
- soldering
- gold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01032—Germanium [Ge]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01042—Molybdenum [Mo]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01045—Rhodium [Rh]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01058—Cerium [Ce]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
Description
Verfahren zum Auflöten eines Halbleiterbauelementes, z. B. einer Diode oder eines Transistors, auf einen Trägerkörper. Die Erfindung betrifft ein Verfahren zum Auflöten eines Halbleiterbaueiementes, z. B. einer Diode oder eines Transistors, auf einen Trägerkörper, sowie ein nach diesem Verfahren auf einen Trägerkörper aufgebrachtes Halbleiterbauelement.Method for soldering a semiconductor component, e.g. B. a diode or a transistor, on a carrier body. The invention relates to a method for soldering a semiconductor component, e.g. B. a diode or a transistor, on a carrier body, as well as one applied by this method to a carrier body Semiconductor component.
Bei der Herstellung von Halbleiterbauelementen erfolgt in der Regel die elektrische und thermische Verbindung wenigstens einer Elektrode durch Verlötung mit einem massiven Metallteil. von möglichst guter Leitfähigkeit. Dieses Metallteil soll als Trägerkörper bezeichnet werden. Wenn nicht gerade sehr kleine Abmessungen vorliegen, besteht die Forderung nach Anpassung der Wärmeausdehnungskoeffizienten der beiden Partner. Für die gebräuchlichen Halbleitermaterialien werden beide Forderungen praktisch nur von den hochschmelzenden Metallen Molybdän und Wolfram erfüllt. Da diese Metalle jedoch ein ziemlich unedles Verhalten _zeigen, erhalten sie in der Regel zuvor eine Schutzschicht aus Gold, die auch für eine nachfolgende Auflötung des Halbleiterbauelementes mit Gold-Silizium- oder Gold-Germanium-Eutektikum benötigt wird. Wird ein solches System nach dem Lötprozess einer chemischen oder elektrolytischen Ätzung unterworfen, so zeigt sich bereits nach kurzer Einwirkung des Ätzmittels eine lokale Zerstörung der Schutzschicht, weil die eutektische Legierung eine geringere Resistenz als die Goldschicht gegen das Ätzmittel aufweist. Ist aber diese Schutzschicht einmal perforiert, so erfolgt -begünstigt durch das elektrochemische Potential Gold-Molybdän bzw. Gold-Wolfram - sehr schnell Kavernenbildung im Grundmetall Molybdän oder Wolfram mit allen ihren unerwünschten Folgen. Zur Beseitigung dieses Nachteiles ist bereits aus der Zeitschrift "Semiconductor Products", August 1965, Seite 18, der Vorschlag bekannt, eine Äi-zbestärldigkcit durch eine Unterschicht aus Nickel. herbeizuführen. Dieser Vorschlag brachte jedoch auch keine Abhilfe, da auch hier die cutektische Legierung leicht abgeätzt wird und das dann freiliegende Nickel mit dem Grundmetall von der Ätzlösung angegriffen wird.This usually takes place in the manufacture of semiconductor components the electrical and thermal connection of at least one electrode by soldering with a solid metal part. of the best possible conductivity. This metal part should be referred to as a carrier body. If not very small dimensions exist, there is a requirement to adapt the coefficient of thermal expansion of the two partners. Both requirements are met for the common semiconductor materials practically only fulfilled by the refractory metals molybdenum and tungsten. There These metals, however, show a rather ignoble behavior, they are preserved in the Usually a protective layer of gold is applied beforehand, which is also suitable for subsequent soldering of the semiconductor component with gold-silicon or gold-germanium eutectic is required will. Such a system becomes a chemical after the soldering process or subjected to electrolytic etching, this shows up after a short exposure of the etchant local destruction of the protective layer because the eutectic alloy has a lower resistance than the gold layer to the etchant. But is Once this protective layer has been perforated, it takes place - favored by the electrochemical one Gold-molybdenum or gold-tungsten potential - cavern formation in the base metal very quickly Molybdenum or tungsten, with all their undesirable consequences. To eliminate this The disadvantage is already from the magazine "Semiconductor Products", August 1965, Page 18, the proposal announced that an ai-zbestärldigkcit by a lower class made of nickel. bring about. However, this suggestion did not help either, because here too the cutectic alloy is slightly etched away and that which is then exposed Nickel with the base metal is attacked by the etching solution.
Ein einwandfreier Schutz war bisher nur mit einer Goldschicht _ solcher
Stärke zu erzielen, dass die eutektische Schmelzzone diese Goldschicht nicht zu
durchdringen vermochte. Der Nachteil dieses Verfahrens besteht jedoch in den ausserordentlich
höhen Kosten und in dem Verzicht auf optimale Ausdehnungsanpassung.
Die erste und zweite auf den Trägerkörper aufgebrachte Schicht brauchen nur so stark zu sein, dass nach dem erfolgten Aufbringen keine Porosität dieser Schichten mehr besteht. Dies ist bei Aufbringen nach einem galvanischen Verfahren in der Regel bei etwa 0,5p der Fall.The first and second layers applied to the carrier body only need to be so thick that there is no longer any porosity in these layers after they have been applied. When applying by a galvanic process, this is usually the case at around 0.5p.
Wird auf einen derartigen Trägerkörper ein Halbleiterplättchen mittels Gold-Silizium- oder Gold-Germanium-Eutektikum aufgelötet, so kann sich die Schmelzzone nur bis zur Rhodiumschicht ausbilden. Selbst bei starker nachträglicher Ätzung bleibt das Grundmetall durch die Doppelschicht Rhodiutt-Gold geschützt. Da diese y Doppelschicht extrem dünn sein darf, ist ihr Einfluss auf das thermische und elektrische Verhalten der Verbindungszone praktisch vernachlässigbar. Ein Ausführungsbeispiel für das erfindungsgemässe Verfahren sowie den hergestellten Körper ist in der Zeichnung in einem Querschnittsbild dargestellt. In Fig. 1 ist lediglich der Trägerkörper 1, z. B. aus Wolfram, mit den verschiedenen nach der Erfindung auf ihn aufgebrachten Schichten gezeichnet, Es handelt sich dabei zunächst um eine dünne Goldschicht 2, eine darauf aufgebrachte Rhodiumschtcht 3 und eine stärkere Goldschicht In Fig. 2 ist ein auf diesen Körper aufgelötetes Halbleiterbauelement 6 dargestellt. Die aus einer Eutektikumschicht bestehende Lötzone ist mit 5 bezeichnet.If a semiconductor wafer by means of such a carrier body Gold-silicon or gold-germanium eutectic is soldered on, so the melting zone can become only develop up to the rhodium layer. Even with strong subsequent etching remains the base metal is protected by the double layer of rhodium-gold. Because this y double layer can be extremely thin, is their influence on the thermal and electrical behavior the connection zone is practically negligible. An embodiment for the The method according to the invention and the body produced is shown in the drawing shown in a cross-sectional image. In Fig. 1 is only the Carrier body 1, e.g. B. made of tungsten, with the various according to the invention layers applied to it, it is initially a thin one Gold layer 2, a rhodium layer 3 applied to it and a thicker gold layer A semiconductor component 6 soldered onto this body is shown in FIG. 2. The soldering zone consisting of a eutectic layer is denoted by 5.
Fig. 3 zeigt die Anordnung gemäss Fig. 2 nach der erfolgten Oberflächenätzung des Halbleiterbauelementes S.@Man erkennt die Ätzvertiefung 7, die anstelle der hier abgeätzten Eutektikumschicht 5 entstanden ist. Infolge der begrenzenden Wirkung der Rhodiumschicht 3 konnte die Ätzung den Trägerkörper 1 nicht erreichen, die Ätzvertiefung 7 erstreckt sich daher nur bis zur Rhodiumschicht 3.FIG. 3 shows the arrangement according to FIG. 2 after the surface etching has taken place of the semiconductor component S. @ You can see the etching recess 7, which instead of the here etched eutectic layer 5 has arisen. As a result of the limiting effect of the rhodium layer 3, the etching could not reach the carrier body 1, the etching recess 7 therefore only extends as far as the rhodium layer 3.
Es sei abschliessend erwähnt, dass anstelle der Rhodiumzwischenschicht auch ein anderes Element aus der Gruppe der Platinmetalle Verwendung finden kann. Das Verfahren ist ferner nicht an die Verwendung von Molybdän oder Wolfram gebunden; als Trägerkörper können auch andere Metalle, z. B. Kupfer, Eisen, Nicke. bzw. deren Legierungen dienen.Finally, it should be mentioned that instead of the rhodium intermediate layer Another element from the group of platinum metals can also be used. Furthermore, the process is not tied to the use of molybdenum or tungsten; other metals, e.g. B. copper, iron, nick. or their Alloys are used.
Claims (3)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DET0031952 | 1968-08-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE1564901A1 true DE1564901A1 (en) | 1970-02-26 |
Family
ID=7556666
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19681564901 Pending DE1564901A1 (en) | 1968-08-31 | 1968-08-31 | Method for soldering a semiconductor device, e.g. a diode or a transistor on a carrier body |
Country Status (1)
Country | Link |
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DE (1) | DE1564901A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3857161A (en) * | 1973-02-09 | 1974-12-31 | T Hutchins | Method of making a ductile hermetic indium seal |
-
1968
- 1968-08-31 DE DE19681564901 patent/DE1564901A1/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3857161A (en) * | 1973-02-09 | 1974-12-31 | T Hutchins | Method of making a ductile hermetic indium seal |
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