DE1514768B2 - Verfahren zur herstellung von halbleiteranordnungen - Google Patents

Verfahren zur herstellung von halbleiteranordnungen

Info

Publication number
DE1514768B2
DE1514768B2 DE1965ST024129 DEST024129A DE1514768B2 DE 1514768 B2 DE1514768 B2 DE 1514768B2 DE 1965ST024129 DE1965ST024129 DE 1965ST024129 DE ST024129 A DEST024129 A DE ST024129A DE 1514768 B2 DE1514768 B2 DE 1514768B2
Authority
DE
Germany
Prior art keywords
semiconductor wafer
strips
semiconductor
strip
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE1965ST024129
Other languages
German (de)
English (en)
Other versions
DE1514768A1 (de
Inventor
Carl Peter Grailands Sandbank (Großbritannien)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
Original Assignee
Deutsche ITT Industries GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche ITT Industries GmbH filed Critical Deutsche ITT Industries GmbH
Publication of DE1514768A1 publication Critical patent/DE1514768A1/de
Publication of DE1514768B2 publication Critical patent/DE1514768B2/de
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/041Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction having no base used as a mounting for the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Dicing (AREA)
DE1965ST024129 1964-07-31 1965-07-14 Verfahren zur herstellung von halbleiteranordnungen Granted DE1514768B2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB3031564 1964-07-31

Publications (2)

Publication Number Publication Date
DE1514768A1 DE1514768A1 (de) 1969-07-24
DE1514768B2 true DE1514768B2 (de) 1972-05-10

Family

ID=10305709

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1965ST024129 Granted DE1514768B2 (de) 1964-07-31 1965-07-14 Verfahren zur herstellung von halbleiteranordnungen

Country Status (2)

Country Link
DE (1) DE1514768B2 (enrdf_load_stackoverflow)
GB (1) GB1054670A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0009610A1 (de) * 1978-09-20 1980-04-16 Siemens Aktiengesellschaft Verfahren zur Herstellung prüfbarer Halbleiter-Miniaturgehäuse in Bandform

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1909480C2 (de) * 1968-03-01 1984-10-11 General Electric Co., Schenectady, N.Y. Trägeranordnung und Verfahren zur elektrischen Kontaktierung von Halbleiterchips

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0009610A1 (de) * 1978-09-20 1980-04-16 Siemens Aktiengesellschaft Verfahren zur Herstellung prüfbarer Halbleiter-Miniaturgehäuse in Bandform

Also Published As

Publication number Publication date
GB1054670A (enrdf_load_stackoverflow)
DE1514768A1 (de) 1969-07-24

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
E77 Valid patent as to the heymanns-index 1977
EF Willingness to grant licences
8339 Ceased/non-payment of the annual fee