DE112022007665T5 - Halbleitervorrichtung und Verfahren zur Herstellung einer Halbleitervorrichtung - Google Patents

Halbleitervorrichtung und Verfahren zur Herstellung einer Halbleitervorrichtung Download PDF

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Publication number
DE112022007665T5
DE112022007665T5 DE112022007665.8T DE112022007665T DE112022007665T5 DE 112022007665 T5 DE112022007665 T5 DE 112022007665T5 DE 112022007665 T DE112022007665 T DE 112022007665T DE 112022007665 T5 DE112022007665 T5 DE 112022007665T5
Authority
DE
Germany
Prior art keywords
electrode terminal
semiconductor device
connection point
circuit pattern
fitted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112022007665.8T
Other languages
German (de)
English (en)
Inventor
Kenta NAKAHARA
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE112022007665T5 publication Critical patent/DE112022007665T5/de
Pending legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/04Manufacture or treatment of leadframes
    • H10W70/048Mechanical treatments, e.g. punching, cutting, deforming or cold welding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65Shapes or dispositions of interconnections
    • H10W70/658Shapes or dispositions of interconnections for devices provided for in groups H10D8/00 - H10D48/00

Landscapes

  • Wire Bonding (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
DE112022007665.8T 2022-08-17 2022-08-17 Halbleitervorrichtung und Verfahren zur Herstellung einer Halbleitervorrichtung Pending DE112022007665T5 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2022/031026 WO2024038511A1 (ja) 2022-08-17 2022-08-17 半導体装置および半導体装置の製造方法

Publications (1)

Publication Number Publication Date
DE112022007665T5 true DE112022007665T5 (de) 2025-06-12

Family

ID=89941531

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112022007665.8T Pending DE112022007665T5 (de) 2022-08-17 2022-08-17 Halbleitervorrichtung und Verfahren zur Herstellung einer Halbleitervorrichtung

Country Status (5)

Country Link
US (1) US20250300045A1 (https=)
JP (1) JP7690133B2 (https=)
CN (1) CN119631174A (https=)
DE (1) DE112022007665T5 (https=)
WO (1) WO2024038511A1 (https=)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0567871A (ja) * 1991-04-26 1993-03-19 Nec Toyama Ltd 印刷配線板及びその製造方法
JPH09283901A (ja) * 1996-04-12 1997-10-31 Nec Corp 表面実装lsiパッケージの実装方法および構造
JP6538513B2 (ja) * 2015-10-02 2019-07-03 株式会社 日立パワーデバイス 半導体パワーモジュールおよび移動体
JP2020178003A (ja) * 2019-04-17 2020-10-29 三菱電機株式会社 パワー半導体モジュールおよびパワー半導体モジュールの製造方法
JP7217837B2 (ja) * 2020-07-22 2023-02-03 三菱電機株式会社 半導体装置、電力変換装置、移動体、および半導体装置の製造方法

Also Published As

Publication number Publication date
JP7690133B2 (ja) 2025-06-09
US20250300045A1 (en) 2025-09-25
CN119631174A (zh) 2025-03-14
WO2024038511A1 (ja) 2024-02-22
JPWO2024038511A1 (https=) 2024-02-22

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Free format text: PREVIOUS MAIN CLASS: H01L0023120000

Ipc: H10W0070600000