DE112014002117T5 - Display system with compensation techniques and / or shared layer resources - Google Patents

Display system with compensation techniques and / or shared layer resources

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Publication number
DE112014002117T5
DE112014002117T5 DE112014002117.2T DE112014002117T DE112014002117T5 DE 112014002117 T5 DE112014002117 T5 DE 112014002117T5 DE 112014002117 T DE112014002117 T DE 112014002117T DE 112014002117 T5 DE112014002117 T5 DE 112014002117T5
Authority
DE
Germany
Prior art keywords
voltage
current
pixel
pixels
pixel circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112014002117.2T
Other languages
German (de)
Inventor
Joseph Marcel Dionne
Javid Jaffari
Vladislav Muravin
Jaimal Soni
Nino Zahirovic
Gholamreza Chaji
Yaser Azizi
Abbas Hormati
Tong Liu
Stephan Alexander
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ignis Innovation Inc
Original Assignee
Ignis Innovation Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US13/869,399 priority Critical patent/US9384698B2/en
Priority to US13/869,399 priority
Priority to US13/890,926 priority patent/US9311859B2/en
Priority to US13/890,926 priority
Priority to US61/827,404 priority
Priority to US201361827404P priority
Priority to PCT/IB2014/059753 priority patent/WO2014141148A1/en
Priority to IBIB-PCT/IB2014/059753 priority
Priority to US61/976,910 priority
Priority to US201461976910P priority
Application filed by Ignis Innovation Inc filed Critical Ignis Innovation Inc
Priority to PCT/IB2014/060959 priority patent/WO2014174472A1/en
Publication of DE112014002117T5 publication Critical patent/DE112014002117T5/en
Application status is Pending legal-status Critical

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0439Pixel structures
    • G09G2300/0452Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/029Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/04Maintaining the quality of display appearance
    • G09G2320/043Preventing or counteracting the effects of ageing
    • G09G2320/045Compensation of drifts in the characteristics of light emitting or modulating elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00Aspects of display data processing
    • G09G2340/06Colour space transformation

Abstract

A voltage programmable display system allows for measuring effects on pixels in a screen that includes both active pixels and reference pixels coupled to a supply line and a programming line. The reference pixels are controlled so that they are not subject to significant changes due to aging and operating conditions over time. A readout circuit is coupled to the active pixels and the reference pixels to read at least one of current, voltage or charge from the pixels when supplied with known input signals. The readout circuit is subject to changes due to aging and operating conditions over time, but the readout values from the reference pixel are used to adjust the readings from the active pixels to compensate for the undesired effects.

Description

  • CROSS-REFERENCE TO RELATED APPLICATIONS
  • This application:
    • (1) claims priority to US Provisional Application No. 61 / 827,404, filed May 24, 2013 (Attorney Docket No. 058161-000039PL03);
    • (2) is a continuation-in-part of US Patent Application No. 13 / 890,926, filed May 9, 2013 (Attorney Docket No. 058161-000039USP2), which is a continuation-in-part of US Patent Application No. 13 / 869,399, filed on Dec. 1, 1989, pp April 24, 2013 (Attorney Docket No. 058161-000039USP1), which is a continuation-in-part of US Patent Application No. 12 / 956,842, filed Nov. 30, 2010 (Attorney Docket No. 058161-000039USPT), which is assigned to Priority of Canadian Application No. 2,688,870 filed Nov. 30, 2009 (Attorney Docket No. 058161-000039CAPT);
    • (3) is a continuation-in-part of United States Patent Application No. 13 / 844,856 filed Mar. 16, 2013 (Attorney Docket No. 058161-000034USC1), which is a continuation-in-part of U.S. Patent Application No. 12 / 816,856, filed on Mar. 13, 2013 June 16, 2010 (Attorney Docket No. 058161-000034USPT) claiming priority to Canadian Application No. 2,669,367, filed June 16, 2009 (Attorney Docket No. 058161-000034CAPT);
    • (4) is a partial continuation of international application no. PCT / IB2014 / 059753 filed March 13, 2014 (Attorney Docket No. 058161-000081WOPT) claiming priority to US Provisional Application No. 61 / 779,776 filed Mar. 13, 2013 (Attorney Docket No. 058161-000081PL01 ); and
    • (5) claims priority to US Provisional Application No. 61 / 976,910, filed April 8, 2014, 8 (Attorney Docket No. 058161-000081PL02);
    each incorporated by reference herein in their entirety.
  • COPYRIGHT
  • Part of the disclosure of this specification contains material which is subject to copyright protection. The copyright owner has no objection to anyone making copies of the patent publication as contained in the Patent and Trademark Office patent documents or registers, but otherwise reserves all copyright whatsoever.
  • FIELD OF THE INVENTION
  • The present invention relates generally to active matrix organic light emitting diode (AMOLED) displays, and more particularly to determining aging conditions that require compensation for the pixels of such displays.
  • BACKGROUND
  • Active matrix organic light emitting diode ("AMOLED") devices are currently being introduced. The advantages of such displays include low power consumption, manufacturing flexibility, and higher refresh rates than conventional liquid crystal displays. In contrast to conventional liquid crystal displays, there is no backlight for an AMOLED display because each pixel consists of OLEDs with different colors that emit light independently. The OLEDs emit light based on current provided by a drive transistor. The drive transistor is typically a thin film transistor (TFT). The power consumed in each pixel is directly related to the amount of light generated in that pixel.
  • The input current of the drive transistor determines the OLED luminosity of the pixel. Since the pixel circuits are voltage programmable, the space-time-heat profile of the display surface, which changes the voltage-current characteristics of the drive transistor, affects the quality of the display. The speed of the short-term aging of the thin-film transistor is also temperature-dependent. In addition, the output of the pixel is affected by long-term aging of the driving transistor. Appropriate corrections can be applied to the video stream to compensate for the unwanted temperature-related visual effects. Long term aging of the driving transistor can be suitably determined by calibrating the pixels with respect to stored data of the pixel to reduce the aging effects to determine. Consequently, accurate aging data over the life of the display device is required.
  • Currently, pixel-based ads are tested before shipping by operating all pixels at full brightness. The array of pixels is then optically examined to determine if all pixels are functioning. However, the optical inspection does not detect any electrical defects that may not be reflected in the output of the pixels. The basic data for pixels is based on design parameters and characteristics of the pixels that are determined before leaving the factory, but that does not take into account actual physical characteristics of the pixels themselves.
  • Various compensation systems use a normal driving scheme in which a video frame is permanently displayed on the screen and the OLED and TFT circuit are permanently under electrical stress. In addition, pixel calibration (data refresh and measurement) of each subpixel occurs at each video frame by changing the gray scale value of the active subpixel to a desired value. This results in a visual artifact, where the measured subpixel is seen during calibration. It may also degrade the aging of the measured subpixel since the modified gray scale level is maintained on the subpixel for the entire duration of the frame.
  • In addition, a previous compensation technique for OLED displays considered backplane aging and OLED efficiency loss. The aging (and / or uniformity) of the screen has been determined and stored in look-up tables as raw or processed data. Then, a compensation block used the stored data to compensate for any shift in the electrical parameters of the backplane (eg, threshold voltage shift) or the OLED (eg, shifting the OLED operating voltage). Such techniques can also be used to compensate for OLED efficiency losses. These techniques are based on the assumption that the OLED color coordinates are stable despite reductions in OLED efficiency. Depending on the OLED material and the required service life of the device, this can be a valid assumption. However, OLED materials with poor color coordinate stability can cause excessive display color shifts and afterglow.
  • The color coordinates (i.e., chromaticity) of an OLED shift over time. These shifts are more pronounced with white OLEDs because the different color components combined in an OLED structure to produce white light can shift differently (eg, the blue portion may age faster than the red or green portion of the combined OLED stack), resulting in undesirable shifts in the display white point, which in turn leads to artifacts such as image glare. In addition, this phenomenon also occurs in other OLEDs, z. For example, in OLEDs that consist only of monochrome components in a stack (i.e., only red OLED stack, green OLED stack only, etc.). As a result, color shifts that occur in the display can lead to severe image glare problems.
  • In addition, as explained in previous documents and patents, IGNIS Maxlife can compensate for both OLED and backplane problems, including aging, unevenness, temperature, etc. The computation of compensation factors occurs with dedicated resources of a display.
  • Thus, there is a need for techniques for providing accurate measurement of the time and space information of the display and ways of applying this information to improve display uniformity in an AMOLED display. There is also a need for accurate determination of base measurements of pixel characteristics for aging compensation purposes.
  • SUMMARY
  • A voltage programmed display system that provides for measuring effects on pixels in a screen that includes a plurality of active pixels that form the display screen to display an image under an operating condition, the active pixels coupled to a supply line and a programming line, respectively , and a variety of reference pixels contained in the ad slot. Both the active pixels and the reference pixels are coupled to the supply line and the programming line. The reference pixels are controlled so that they do not undergo significant changes due to aging and operating conditions over time. A readout circuit is coupled to the active pixels and the reference pixels to read at least one of current, voltage or charge from the pixels when supplied with known input signals. The The readout circuit undergoes changes due to aging and operating conditions over time, but the readout values from the reference pixels are used to adjust the readings from the active pixels to compensate for the unwanted effects.
  • According to another implementation, there is provided a system for maintaining a substantially constant display white point over a prolonged period of operation of a color display formed by an array of multiple pixels, each of the pixels comprising a plurality of subpixels having different colors, and wherein each of the subpixels is a light comprising emitting device. The display is generated by energizing the subpixels of successively selected pixels, and the color of each selected pixel is controlled by the relative power supply levels of the subpixels in the selected pixel. The degradation behavior of the subpixels in the individual pixels is determined and the relative power supply levels of the subpixels in the individual pixels are adjusted to adjust the brightness levels of the subpixels and to compensate for the degradation behavior of the subpixels. The brightness components are preferably adjusted so that a substantially constant display white point is maintained.
  • According to another implementation, the light-emitting devices are OLEDs and the degradation behavior is a shift of the chromaticity coordinates of the sub-pixels of a selected pixel, such as a pixel. A white pixel in an RGBW display. The voltage at the current input to each OLED is measured and used in determining the shift of chrominance coordinates.
  • In another implementation, color displays use light-emitting devices such as OLEDs, and in a more specific example, color shifts in such displays are compensated as the light-emitting device ages.
  • In another implementation, a system maintains a substantially constant over a longer period of operation of a color display formed by an array of a plurality of pixels, wherein each of the pixels comprises a plurality of subpixels having different colors, and wherein each of the subpixels comprises a light emitting device , The display is generated by energizing the subpixels of successively selected pixels, and the color of each selected pixel is controlled by the relative power supply levels of the subpixels in the selected pixel. The degradation performance of the subpixels in each pixel is determined, and the relative power supply levels of the subpixels in each pixel are adjusted to adjust the brightness levels of the subpixels to compensate for the degradation performance of the subpixels. The brightness levels are preferably adjusted to maintain a substantially constant display white point.
  • According to another implementation, an implementation feature relates to circuits for use in displays, and more particularly to compensation for a plurality of degradation phenomena.
  • According to another implementation, a method relates to compensating for multiple degradation phenomena simultaneously, wherein the degradation phenomena adversely affect luminance performance of powered pixels in an active matrix display. Each of the pixel circuits includes a light emitting device (eg, an organic light emitting diode or OLED) that is driven by a driving transistor. Deterioration phenomena include a phenomenon of unevenness (caused by process nonuniformity), a time-dependent aging phenomenon, and a dynamic effect phenomenon that may be caused by a shift in a threshold voltage of a driving transistor of a pixel circuit.
  • In another implementation, using total compensation rather than using separate steps for each compensation phase results in a more efficient implementation. Accordingly, one aspect of the present invention relates to a method of compensating for a variety of degradation phenomena that adversely affect the luminance performance of current driven pixel circuits in an active matrix display. Each of the pixel circuits includes a light-emitting device driven by a drive transistor. The method includes storing, using one or more controllers, a plurality of first factors in a first table to compensate for a first phenomena of the deterioration phenomena, and a plurality of second factors in a second table to augment a second phenomenon of deterioration phenomena compensate. The method further comprises measuring, using at least one of the controllers, a characteristic of a selected one of the pixel circuits, which is affected by a detected one of the first phenomenon and the second phenomenon, and which is responsive to the measurement, determining using at least one of the controls, a new value for a corresponding first factor, and a second factor for the detected phenomenon to produce a first adjusted value. The method further comprises, in response to the determination of the new value, automatically calculating, using at least one of the controllers, the other of the first factor and the second factor to produce a second adjusted value, and storing using at least one the controls, the first adjusted value, and the second adjusted value in respective ones of the first table and the second table. The method further comprises, in response to storing the first adjusted value and the second adjusted value, subsequently driving, using at least one of the controllers, the selected pixel circuit according to a pixel switching characteristic based on the first adjusted value and the second adjusted value. These aforementioned operations may be performed in any order and compensate for any combination of one or more phenomena.
  • In another implementation, a method relates to compensating for a variety of degradation phenomena that adversely affect the luminance performance of current driven pixel circuits in an active matrix display. Each of the pixel circuits includes a light-emitting device that is driven by a drive transistor. The method includes storing, using one or more controllers, a plurality of power factors in a power factor table to compensate for a phenomenon of non-uniformity of the degradation phenomena in each of the pixel circuits, the non-uniformity phenomenon relating to process nonuniformities in the fabrication of the active matrix display. The method further comprises storing, using at least one of the controllers, a plurality of scaling factors in a scaling table to compensate for at least one time-dependent aging phenomenon of the degradation phenomena of one or more of the light-emitting device and the driving transistor of the pixel circuits. The method further comprises storing, using at least one of the controllers, a plurality of offset factors in an offset factor table to compensate for at least one dynamic effect phenomenon of the degradation phenomena triggered by at least one shift of a threshold voltage of the drive transistor of each of the pixel circuits. The method further comprises measuring, using at least one of the controllers, a characteristic of a selected one of the pixel circuits affected by a selected one of the unevenness phenomena, the aging phenomenon, or the dynamic effect phenomenon. The method further comprises, in response to the measuring, determining, using at least one of the controllers, a new value for a corresponding power factor, scaling factor, or offset factor for the detected phenomenon to produce a first adjusted value. The method further comprises, in response to determining the new value, automatically calculating, using at least one of the controllers, the other two, the power factor, the scale factor, and the offset factor to produce a second adjusted value and a third adjusted value. The method further comprises storing, using at least one of the first, second, and third adjusted value controls in corresponding one of the power factor table, the scale factor table, and the offset factor table. The method further comprises, in response to storing the first, second and third adjusted values, subsequently driving, using at least one of the controllers, the selected pixel circuit according to a current based on the first, second and third adjusted values. These aforementioned operations may be performed in any order and compensate for any combination of one or more phenomena.
  • In another implementation, a display system is for compensating for degradation phenomena that adversely affect luminance performance. The system includes an active matrix with current driven pixel circuits, each pixel circuit comprising a light emitting device driven by a drive transistor, a processor, and a memory device. In the memory device instructions are stored which, when executed by the processor, store the system to store a plurality of first factors for compensating a first phenomena of the deterioration phenomena in a first table and a plurality of second factors for compensating a second phenomenon of the deterioration phenomena to save in a second table. The stored instructions also cause the system, when executed by the processor, to measure a characteristic of a selected one of the pixel circuits affected by a detected one of the first phenomenon and the second phenomenon, and a new value for one in response to the measurement determine corresponding first factor and second factor for the detected phenomenon to produce a first adjusted value. The stored instructions also cause the system, when executed by the processor and in response to determining the new value, to automatically calculate the other of the first factor and the second factor, to produce a second adjusted value. The stored instructions further cause the system, when executed by the processor, to store the first adjusted value and the second adjusted value in corresponding ones of the first table and the second table, and in response to storing the first adjusted value and the second adjusted value subsequently, drive the selected pixel circuit according to a pixel switching characteristic based on the first adjusted value and the second adjusted value. These aforementioned operations may be performed in any order and compensate for any combination of one or more phenomena.
  • According to another implementation and to bring MaxLife complexity to a level of convenience of portable applications, the measurement of a screen is moved to an offline phase. Accordingly, such a timing controller ("TCON"), a measurement scheduler, a calculation module, a driver circuit, and a memory interface become much easier.
  • In another implementation, a system includes a display module and a system module. The display module is integrated with a portable device having a display communicatively coupled to one or more of a driver unit, a measurement unit, a timing controller, a compensation sub-module, and a display memory unit. The system module is communicatively coupled to the display module and includes one or more interface modules, one or more processing units, and one or more system memory units. At least one of the processing units and the system memory units is programmable to compute new display module compensation parameters during off-line operation.
  • The above and other aspects and embodiments of the present invention will become apparent to those skilled in the art from the detailed description of various embodiments and / or aspects made with reference to the drawings, which are briefly described below.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The foregoing and other advantages of the invention will become apparent upon reading the following detailed description and upon reference to the drawings.
  • 1 Fig. 10 is a block diagram of an AMOLED display with reference pixels for correcting data for parameter compensation control;
  • 2A is a block diagram of a driver circuit of one of the pixels of the AMOLED that can be tested for aging parameters;
  • 2 B is a circuit diagram of a driver circuit one of the pixels of the AMOLED;
  • 3 Fig. 10 is a block diagram for a system for determining one of the basic aging parameters for a device under test;
  • 4A is a block diagram of the current comparator in 3 comparing a reference current level with the device under test for use in aging compensation;
  • 4B is a detailed circuit diagram of the current comparator in 4A ;
  • 4C FIG. 12 is a detailed block diagram of the device under test in FIG 3 , with the current comparator in 4A coupled;
  • 5A is a signal timing diagram of the signals for the current comparator in FIG 3 - 4 in the method for determining the current output of a device under test;
  • 5B FIG. 12 is a signal timing diagram of the signals for calibrating the bias current for the current comparator in FIG 3 - 4 ;
  • 6 is a block diagram of a reference current system for compensating for the aging of the AMOLED display in FIG 1 ;
  • 7 Fig. 10 is a block diagram of a system for using multiple luminance profiles to customize a display under various circumstances;
  • 8th Figure 12 shows single-frame diagrams of video frames for calibrating pixels in a display; and
  • 9 Figure 13 is a diagram showing the use of a small current applied to a reference pixel for more accurate aging compensation.
  • 10 Figure 12 is a graphical representation of a display with a matrix of pixels comprising lines of reference pixels.
  • 11 FIG. 5 is a timing diagram for aging compensation by applying a reset cycle prior to programming in which the pixel is programmed with a reset value.
  • 12A is a circuit diagram of a pixel circuit with IR voltage drop compensation.
  • 12B is a timing diagram for normal operation of the pixel circuit 12A ,
  • 12C is a timing diagram for a direct TFT read out of the pixel circuit 12A ,
  • 12D Figure 12 is a timing diagram for a direct OLED read from the pixel circuit 12A ,
  • 13A FIG. 12 is a circuit diagram of a pixel circuit with charge-based compensation. FIG.
  • 13B is a timing diagram for normal operation of the pixel circuit 13A ,
  • 13C is a timing diagram for a direct TFT read out of the pixel circuit 13A ,
  • 13D Figure 12 is a timing diagram for a direct OLED read from the pixel circuit 13A ,
  • 13E FIG. 12 is a timing diagram for indirect OLED reading from the pixel circuit 13A ,
  • 14 is a circuit diagram of a biased pixel circuit.
  • 15A Figure 12 is a circuit diagram of a pixel circuit having a signal line connected to an OLED and a pixel circuit.
  • 15B is a circuit diagram of a pixel circuit with an ITO electrode, which is structured as a signal line.
  • 16 is a schematic representation of a block arrangement for probing a screen.
  • 17 Figure 12 is a circuit diagram of a pixel circuit used to test a backplane.
  • 18 Figure 12 is a circuit diagram of a pixel circuit used to test a full display.
  • 19 Figure 12 is a functional block diagram of a system for compensating for color shifts in the pixels of a color display using OLEDs.
  • 20 is a CIE chromaticity diagram.
  • 21 FIG. 12 is a flowchart of a method for compensating for color shifts in the system 19 ,
  • 22A FIG. 12 is a pair of graphics showing variations in chromaticity coordinate Cx of the measured brightness values of the two white OLEDs exposed to two different loading conditions as a function of the difference between the measured OLED voltages and a non-aged reference OLED.
  • 22B Figure 4 is a pair of graphics showing variations in chrominance coordinate Cy of the measured brightness values of the two white OLEDs exposed to two different loading conditions as a function of the difference between the measured OLED voltages and a non-aged reference OLED.
  • 23 FIG. 12 is a graph showing variations in a brightness correction factor as a function of the OLED voltage of a white OLED exposed to one of the stress conditions found in FIG 4 are shown.
  • 24 Figure 12 is a functional block diagram of a modified system for compensating for color shifts in the pixels of a color display using OLEDs.
  • 25 FIG. 10 shows an exemplary configuration of a system for monitoring pixel degradation and providing compensation therefor.
  • 26 FIG. 10 is a flowchart of an integrated compensation data path according to one aspect of the present disclosure. FIG.
  • 27 shows a non-linear gamma curve for increasing the resolution at low gray values.
  • 28 shows a compressed linear gamma curve using a bit map.
  • 29 Figure 4 is a graph showing integration of a MaxLife display into portable devices.
  • While the present disclosure is susceptible to various modifications and alternative forms, specific embodiments have been set forth in the drawings by way of example, which are described in detail herein. It should be understood, however, that the present disclosure is not intended to be limited to the particular forms disclosed. On the contrary, the present disclosure is intended to embrace all modifications, equivalents and alternatives which are within the spirit and scope of the invention as defined by the appended claims.
  • DETAILED DESCRIPTION
  • 1 is an electronic display system 100 with an active matrix area or a pixel array 102 in which an arrangement of active pixels 104a -D are arranged in a row and column configuration. For ease of illustration, only two rows and columns are shown. Outside the active matrix area, the pixel array 102 is, there is a peripheral area 106 where a peripheral circuit for driving and controlling the area of the pixel array 102 is arranged. The peripheral circuit includes a gate or address driver circuit 108 , a source or data driver circuit 110 , a controller 112 and an optional supply voltage (eg, Vdd) driver 114 , The control 112 controls the gate, source and supply voltage drivers 108 . 110 . 114 , The gate driver 108 that by the controller 112 is operated on address or select lines SEL [i], SEL [i + 1], etc., one for each row of pixels 104 in the pixel arrangement 102 , In pixel division configurations described below, the gate or address driver circuit may be used 108 if applicable, also work on global selector lines GSEL [j] and optionally / GSEL [j] on multiple lines of pixels 104a -D in the pixel layout 102 work, such as every other row of pixels 104a d. The source driver circuit 110 that from the controller 112 is controlled, operates on voltage data lines VDaten [k], VDaten [k + 1], etc., one for each column of pixels 104a -D in the pixel layout 102 , The voltage data lines pass voltage programming information to each pixel 104 , which measures the brightness of each light-emitting device in the pixel 104 specify. A memory element, such as. A capacitor, in each pixel 104 stores the voltage programming information until an emission or drive cycle turns on the light-emitting device. The optional power supply driver 114 that by the controller 112 is controlled, controls a supply voltage (EL_Vdd) line, one for each row of pixels 104a -D in the pixel layout 102 ,
  • The display system 100 may also include a current source circuit that provides a fixed current on the bias lines. In some configurations, a reference current may be supplied to the current source circuit. In such configurations, a current source controller controls the timing of the application of a bias current to the bias line. In configurations in which the reference current is not supplied to the current source circuit, a current source address driver controls the timing of the application of a bias current to the bias lines.
  • As is known, every pixel needs 104a -D in the display system 100 be programmed with information indicating the brightness of the light-emitting device in the pixel 104a Specify -d. A frame defines the amount of time that includes a programming cycle or phase in which each pixel in the display system 100 is programmed with a programming voltage indicating the brightness and a drive or emission cycle or phase in which each light-emitting device in each pixel is turned on to emit light with a brightness similar to that in a memory element stored voltage corresponds. A single frame is therefore one of many still images that make up a full movie on the display system 100 is shown. There are at least two schemes for programming and driving the pixels: line by line or frame by frame. When programming line by line, a line of pixels is programmed and then driven before the next line of pixels is programmed and driven. When programming frame by frame, first all rows of pixels in the display system 100 programmed, and all individual images are driven line by line. Both schemes can use a short vertical turn off at the beginning or end of each frame in which the pixels are neither programmed nor driven.
  • The outside of the pixel layout 102 located components can be in a peripheral area 106 around the pixel layout 102 be arranged on the same physical substrate on which the pixel array 102 is arranged. These components include the gate driver 108 , the source driver 110 and the optional supply voltage control 114 , Alternatively, some of the peripheral devices may be disposed on the same substrate as the pixel array 102 While other components are disposed on another substrate, or all peripheral devices may be disposed on a substrate extending from the substrate on which the pixel array is located 102 is arranged differs. Together form the gate driver 108 , the source driver 110 and the supply voltage control 114 a display driver circuit. The display driver circuit may, in some configurations, be the gate driver 108 and the source driver 110 but not the supply voltage control 114 include.
  • The display system 100 may further include a power supply and a readout circuit 120 which reads output data from data output lines, VD [k], VD [k + 1], etc., one for each column of pixels 104a . 104c in the pixel arrangement 102 , A set of column reference pixels 130 is at the edge of the pixel array 102 made at the end of each column, z. The column of pixels 104a and 104c , The column reference pixels 130 can also input signals from the controller 112 receive and data signals to the power supply and readout circuit 120 output. The column reference pixels 130 include the drive transistor and an OLED but are not part of the pixel array 102 that displays images. As will be explained below, the column reference pixels become 130 not driven during most of the programming cycle because it is not part of the pixel array 102 for displaying images, and therefore are not aging due to the constant application of programming voltage, as with the pixels 104a and 104c the case is. Although in 1 only one column reference pixel 130 It is understood that there may be any number of column reference pixels, although in this example two to five such reference pixels may be used for each column of pixels. Each row of pixels in the array 102 also includes line reference pixels 132 at the end of each line of pixels 104a -D, z. The pixel 104a and 104b , The line reference pixels 132 include the drive transistor and an OLED but are not part of the pixel array 102 that displays images. As will be explained below, the line reference pixels 132 the task of providing a reference check of the luminance curves for the pixels determined at the time of generation.
  • 2A shows a block diagram of a driver circuit 200 for the pixel 104 in 1 , The driver circuit 200 comprises a drive device 202 an Organic Light Emitting Device ("OLED") 204 , a storage element 206 and a switching device 208 , A voltage source 212 is with the drive transistor 206 coupled. A selection line 214 is coupled to the switching device to the driver circuit 200 to activate. A data line 216 allows application of a programming voltage to the driver 202 , A monitoring line 218 allows monitoring of outputs of the OLED 204 and / or the drive device 202 , Alternatively, the monitoring line 218 and the data line 216 to one line (ie, Data / Monitor) to perform programming and monitoring functions through that one line.
  • 2 B shows an example of a circuit for implementing the driver circuit 200 in 2A , As in 2 B the drive device is shown 202 a drive transistor, which in this example is a thin-film transistor made of amorphous silicon. The storage element 206 is a capacitor in this example. The switching device 208 includes a selection transistor 226 and a monitoring transistor 230 showing the different signals to the driver circuit 200 turn. The selection line 214 is with the selection transistor 226 and the monitoring transistor 230 coupled. During the readout period, the select line becomes 214 pulled up. A programming voltage may be provided via the programming voltage input line 216 be created. A monitoring voltage may be from the monitoring line 218 be read out with the monitoring transistor 230 is coupled. The signal to the selection line 214 can be sent in parallel with the pixel programming cycle. As will be explained below, the driver circuit 200 be regularly tested by applying a reference voltage to the gate of the drive transistor.
  • There are several techniques for obtaining data on electrical characteristics of a device under test (object under test), e.g. B. the display system 100 , The device under test (test object) may be any material (or device), including (but not limited to) a light emitting diode (LED) or OLED. This measurement can be effective for determining the aging (and / or uniformity) of an OLED in a screen that consists of an array of pixels, such as pixels. B. the arrangement 102 in 1 , This data obtained may be raw or processed data in look-up tables in a memory in the controller 112 in 1 get saved. The look-up tables may be used to compensate for any shift in the electrical parameters of the backplane (eg, threshold voltage shift) or the OLED (eg, shift in the operating voltage of the OLED). Despite the use of an OLED display in 1 In these examples, the techniques described herein may be used for any display technology, including, but not limited to, OLED, liquid crystal display (LCD), LED display, or plasma display. In the case of an OLED, the measured electrical information may indicate any aging that may have occurred.
  • Current can be applied to the device under test and the output voltage can be measured. In this example, the voltage is measured with an analog-to-digital converter (ADC). For a device such as an aging OLED, a higher programming voltage is needed than the programming voltage for a new MONEY to get the same output. This method gives a direct measurement of the voltage change of the device under test. Current flow can be in either direction, but the current is generally introduced into the device under test (DUT) for illustrative purposes.
  • 3 is a block diagram of a comparison system 300 , which can be used to provide a base value for a device under test 302 to determine the effects of aging on the device under test 302 to determine. The comparison system uses two reference currents to calculate the base output current of the device under test 302 to determine. The device to be tested 302 Either the driving transistor, such as. B. the driving transistor 202 in 2 B , or an OLED, such as. For example, the OLED 204 in 2 B , be. Of course, other types of display devices using the in 3 system tested. The device to be tested 302 has a programming voltage input 304 which is kept at a constant level to output a current. A current comparator 306 has a first reference current input 308 and a second reference current input 310 on. The reference current input 308 is with a first reference current source 312 via a switch 314 coupled. The second power input 310 of the comparator 306 is with a second reference current source 316 via a switch 318 coupled. An exit 320 the device to be tested 302 is also with the second power input 310 coupled. The current comparator 306 includes a comparison output 322 ,
  • By the voltage at the entrance 304 is kept constant, is also the output current of the device under test 302 constant. This current depends on the characteristics of the device under test 302 from. A constant current is for the first reference current from the first reference current source 312 initiated, and over the switch 314 becomes the first reference current to the first input 308 of the current comparator 306 created. The second reference current is set to different levels, with each level via the switch 318 with the second entrance 310 of the comparator 306 connected is. The second reference current is with the output current of the device under test 302 combined. Since the level of the first and second reference currents is unknown, the difference between the two reference current levels from the exit 322 of the current comparator 306 the current level of the device under test 302 , The resulting output current becomes for the device under test 302 stored and compared to the current to be tested based on the same programming voltage level periodically during the operating life 302 compared to determine the aging effects.
  • The resulting particular device stream may be stored in look-up tables for each device in the display. If the device under test 302 the current changes from the expected level, therefore the programming voltage can be changed to compensate for the aging effects based on the base current generated by the calibration process in FIG 3 was determined.
  • 4A is a block diagram of a current comparator circuit 400 , which can be used to generate reference currents with a device under test 302 such as In 3 to compare. The current comparator circuit 400 has a controller connection point 402 on, the various power inputs, such. B. two reference currents and the current of the device under test, for. B. the pixel driver circuit 200 in 1 , allowed. The current may be a positive current when the current of the driving transistor 202 is compared, or a negative, if the current of an OLED 204 is compared. The current comparator circuit 400 also includes a trans-resistance operational amplifier circuit 404 , a preamp 406 and a voltage comparator circuit 408 that have a voltage output 410 generated. The combined currents are input to the trans-resistance operational amplifier circuit 404 fed and converted into a voltage. The voltage is fed to the preamplifier, and the voltage comparator circuit 408 determines whether the difference of the currents is positive or negative and outputs a corresponding value of one or zero.
  • 4B FIG. 12 is a circuit diagram of the components of the exemplary current comparator system. FIG 400 in 4A for comparing the currents as in the method in 3 for a device under test, such. B. Device 302 , can be used. The trans-resistance operational amplifier circuit 404 includes an operational amplifier 412 , a first voltage input 414 (CMP_VB), a second voltage input 416 (CMP_VB), a power input 418 and a bias current source 420 , The trans-resistance operational amplifier circuit 404 also includes two calibration switches 424 and 426 , As will be explained below, in this example different streams, such as e.g. B. the current of the device under test 302 , a variable first reference current and a fixed second reference current as in 3 shown with the power input 418 coupled. Of course, the fixed second reference current can be set to zero, if desired.
  • The first reference current input is to the negative input of the operational amplifier 412 coupled. The negative input of the operational amplifier 412 is therefore with the output current of the device under test 302 in 3 and coupled with one or two reference currents. The positive input of the operational amplifier 412 is with the first voltage input 414 coupled. The output of the operational amplifier 412 is at the gate of a transistor 432 coupled. A resistance 434 is between the negative input of the operational amplifier 412 and the source of the transistor 432 coupled. A resistance 436 is between the source of the transistor 432 and the second voltage input 416 coupled.
  • The drain of the transistor 432 is directly to the drain of a transistor 446 and via the calibration switch 426 coupled to the gate. A sampling capacitor 444 is through a switch 424 between the gate of the transistor 446 and a power rail 411 coupled. The source of 446 is also with the supply rail 411 coupled. The drain and the gate of the transistor 446 are connected to the gate terminals of the transistors 440 respectively. 442 coupled. The sources of the transistors 440 and 442 are connected together and with a bias current source 438 coupled. The drains of the transistors 442 and 440 are with corresponding transistors 448 and 450 coupled in diode-connected configuration to the supply voltage rail 411 are wired. As in 4B shown are the transistors 440 . 442 . 448 and 450 and the bias current source 438 Parts of the preamplifier 406 ,
  • The drains of the transistors 442 and 440 are with the gates of the corresponding transistors 452 and 454 coupled. The drains of the transistors 452 and 454 are with the transistors 456 and 458 coupled. The drains of the transistors 456 and 458 are with the corresponding sources of the transistors 460 and 462 coupled. The drain and gate terminals of the transistors 460 and 462 are connected to the corresponding drain and gate terminals of the transistors 464 and 466 coupled. The source terminals of the transistors 464 and 466 are with the supply voltage rail 411 coupled. The sources and drains of the transistors 464 and 466 are with the corresponding sources drains of transistors 468 and 470 connected. The gates of the transistors 456 and 458 are with a switch-on input 472 connected. The switch-on input 472 is also with the gates of dual transistors 468 and 470 connected.
  • A buffer circuit 474 is connected to the drain of the transistor 462 and the gate of the transistor 460 coupled. The output voltage 410 is with a buffer circuit 476 coupled to the drain of the transistor 460 and the gate of the transistor 462 is coupled. The buffer circuit 474 is used to buffer 476 compensate. The transistors 452 . 454 . 456 . 458 . 460 . 462 . 464 . 466 . 468 and 470 and the buffer circuits 474 and 476 together form the voltage comparator circuit 408 ,
  • The current comparator system 400 may be based on any integrated circuit technology including, but not limited to, CMOS semiconductor manufacturing. The components of the current comparator system 400 are CMOS devices in this example. The values for the input voltages 414 and 416 are for a given reference current level from the first current input 418 (I ref ) determined. In this example, the voltage levels are for both input voltages 414 and 416 equal. The voltage inputs 414 and 416 in the operational amplifier 412 can be controlled using a digital-to-analog converter (ADC) device, which in 4 not shown. Level shifters may also be added if the voltage ranges of the ADCs are insufficient. The bias current may originate from a voltage controlled current source, such as a transimpedance amplifier circuit or a transistor, such as a transistor. B. a thin film transistor.
  • 4C shows a detailed block diagram of an example of a test system, such. B. the system 300 , this in 3 is shown. The test system in 4C is with a device under test 302 coupled, which may be a pixel driver circuit, such. B. the pixel driver circuit 200 , in the 2 is shown. This example tests all driver circuits for a screen display. A gate driver circuit 480 is coupled to the select lines of all driver circuits. The gate driver circuit 480 includes a turn-on input, which in this example is the device under test 302 turns on when the signal at the input is at a low level.
  • The device to be tested 302 receives a data signal from a source driver circuit 484 , The source circuit 484 may be a source driver, such as For example, the source driver 120 in 1 , The data signal is a programming voltage having a predetermined value. The device to be tested 302 outputs a current on a monitor line when the gate driver circuit 480 turns on the device. The output of the monitor line from the device under test 302 is with an analog multiplexer circuit 482 coupled, which allows to test multiple devices. In this example, the analog multiplexer circuit allows 482 Multiplexing of 210 inputs, but of course any number of inputs can be multiplexed.
  • The signal output of the device under test 302 is with the reference current input 418 the trans-resistance operational amplifier circuit 404 coupled. In this example, there is a variable reference current source with the current input 418 as in 3 described coupled. In this example, there is no fixed reference current, such as. B. the first reference current source in 3 , The value of the first reference current source in 3 is therefore considered zero in this example.
  • 5A FIG. 11 is a timing diagram of the signals for the current comparator that is in 4A - 4C is shown. The timing diagram in 5A shows a gate turn-on signal 502 to the gate driver 480 in 4C , a CSE turn-on signal 504 that with the analog multiplexer 482 is coupled, a current reference signal 506 generated by a variable reference current source which is set to a predetermined value for each iteration of the test process and with the current input 418 is coupled, a calibration signal 508 that the calibration switch 426 controls, a calibration signal 510 that the calibration switch 424 controls, a Komparatoreinschaltsignal 512 that with the switch-on input 472 is coupled, and the output voltage 514 over the exit 410 , The CSE turn-on signal 504 is maintained at a high level to ensure that any leakage of the monitor line to the device under test 302 is eliminated in the final power comparison.
  • In a first phase 520 becomes the gate turn-on signal 502 brought to a high level, which is why the output of the device under test 302 in 4C is zero. The only currents flowing into the current comparator 400 are therefore leakage currents from the monitoring line of the device under test 302 , The output of the reference current 506 is also set to zero, so that the optimal resting state of the transistors 432 and 436 in 4B and 4C is only affected by line leakage or the displacement of the readout circuit. The calibration signal 508 is set to a high level, which is the calibration switch 426 brings to a close. The calibration signal 510 is set to a high level to the calibration switch 424 to bring to a close. The comparator switch-on signal 512 is set to a low level, which is why the output of the voltage comparator circuit 408 is reset to a logical one. The leakage current is thus in the power input 418 is initiated, and a voltage representing the leakage current of the monitoring line on the screen is on the capacitor 444 saved.
  • In a second phase 522 becomes the gate turn-on signal 502 set to a low level, which is why the output of the device under test 302 an unknown current at a set programming voltage input from the source circuit 484 generated. The current from the device under test 302 is passed through your power input 418 along with the reference current 506 which is set at a first predetermined value and opposite to the direction of the current of the device under test. The power input 418 is therefore the difference between the reference current 506 and the current from the device under test 302 , The calibration signal 510 is briefly set to a low level to the switch 424 to open. The calibration signal 508 is then set to a low level so that the switch 426 is opened. The calibration signal 510 to the switch 424 is then set to a high level to the switch 424 close and the voltage at the gate terminal of the transistor 446 to stabilize. The comparator switch-on signal 512 remains low, which is why there is no output from the voltage comparator circuit 408 gives.
  • In a third phase 524 becomes the comparator turn-on signal 512 set to a high level, and the voltage comparator 408 generates an output at the voltage output 410 , In this example, a logic one indicates a positive voltage output for the output voltage signal 514 a positive current, indicating that the current of the device under test 302 is greater than the predetermined reference current. A zero voltage at the voltage output 410 indicates a negative current, indicating that the current of the device under test 302 is less than the predetermined level of the reference current. In this way, any difference between the current of the device under test and the reference current is amplified and from the current comparator circuit 400 detected. The value of the reference current is then shifted based on the result shifted to a second predetermined value and the phases 520 . 522 and 524 are repeated. Setting the reference current allows use of the comparator circuit 400 through the test system to the current output of the device under test 302 to determine.
  • 5B FIG. 13 is a timing diagram of the signals supplied to the test system incorporated in FIG 4C to provide an optimum bias current value for the bias current source 420 in 4B for the trans-resistance operational amplifier circuit 404 to determine. To the maximum signal-to-noise ratio (SRV) for the current comparator circuit 400 It is important to calibrate the current comparator. Calibration is done by fine tuning the bias current source 420 reached. The optimum bias current level for the bias current source 420 minimizes the amount of noise during the measurement of a pixel, which is also a function of the line leakage. Accordingly, it is necessary to intercept the line leakage during the calibration of the current comparator.
  • The timing diagram in 5B shows a gate turn-on signal 552 to the gate driver 480 in 4C , a CSE turn-on signal 554 that with the analog multiplexer 482 is coupled, a current reference signal 556 generated by a variable reference current source which is set to a predetermined value for each iteration of the calibration process and to the current input 418 is coupled, a calibration signal 558 that the calibration switch 426 controls, a Komparatoreinschaltsignal 560 that with the switch-on input 472 is coupled, and the output voltage 562 at the exit 410 ,
  • The CSE turn-on signal 554 is kept high to ensure that any leakage from the line is included in the calibration process. The gate turn-on signal 552 is also kept high to prevent the device being tested 302 Outputs power from any data inputs. In a first phase 570 becomes the calibration signal 556 brought to a high level, so the calibration switch 426 close. Another calibration signal is brought high to the calibration switch 424 close. The comparator switch-on signal 558 is brought to a low level to the voltage output from the voltage comparator circuit 408 reset. Any leakage current from the monitoring line of the device under test 302 is converted into a voltage that is at the capacitor 444 is stored.
  • A second phase 572 takes place when the calibration signal to the switch 424 is brought to a low level, after which the calibration signal 556 is brought to a low level, so the switch 426 to open. The signal to the switch 424 is then brought to a high level to the switch 424 close. A small current is transferred from the reference current source to the current input 418 output. The value of the small current is a minimum value which is the range of the smallest detectable signal (MDS) of the current comparator 400 equivalent.
  • A third phase 574 takes place when the comparator turn-on signal 560 is brought to a high level, which is the voltage comparator circuit 408 allows to read the inputs. The output of the voltage comparator circuit 408 at the exit 410 should be positive, which is a positive current comparison with the leakage current.
  • A fourth phase 576 takes place when the calibration signal 556 brought back to a high level, causing the calibration switch 426 is closed. The comparator switch-on signal 558 is brought to a low level to the voltage output from the voltage comparator circuit 408 reset. Any leakage current from the monitoring line of the device under test 302 is converted into a voltage that is at the capacitor 444 is stored.
  • A fifth phase 578 takes place when the calibration signal to the switch 424 is brought to a low level, after which the calibration signal 556 is brought to a low level, causing the switch 426 is closed. The signal to the switch 424 is then brought to a high level, causing the switch 424 is closed. A small current is transferred from the reference current source to the current input 418 output. The value of the small current is a minimum value, which is the range of the smallest detectable signal (MDS) of the current comparator 400 but is a negative current as opposed to the positive current in the second phase 572 ,
  • A sixth phase 580 takes place when the comparator turn-on signal 560 is brought to a high level, which makes it the voltage comparator circuit 408 is allowed to read the inputs. The output of the voltage comparator circuit 408 at the exit 410 should be zero, indicating a negative current comparison with the leakage current.
  • The phases 570 . 572 . 574 . 576 . 578 and 580 are repeated. By adjusting the value of the bias current, the magnitude of the variation in the valid output voltage between one and zero finally reaches a maximum value, indicating an optimum bias current value.
  • 6 is a block diagram of the compensation components of the controller 112 of the display system 100 in 1 , The compensation components comprise an aging extraction unit 600 , a backplane aging / adjustment module 602 , a color / proportion gamma correction module 604 , an OLED aging memory 606 and a compensation module 608 , The back wall with the electronic components for driving the display system 100 may be any technology including, but not limited to, amorphous silicon, polysilicon, crystalline silicon, organic semiconductors, oxide semiconductors. In addition, the display system 100 any (any) display material (or device) including (but not limited to) LEDs or OLEDs.
  • The aging extraction unit 600 is coupled to output data from the array 102 based on inputs to the array pixels and corresponding outputs for testing the effects of aging on the device 102 to recieve. The aging extraction unit 600 uses the output of the column reference pixels 130 as a baseline for comparison with the output of the active pixels 104a -D, to reduce the aging effects on each pixel 104a -D in each of the columns to determine which the corresponding column reference pixels 130 include. Alternatively, the average of the pixels in the column may be calculated and compared to the value of the reference pixel. The color / proportion gamma correction module 604 also pulls data from the column reference pixel 130 to determine appropriate color corrections to compensate for aging effects on the pixels. The baseline for comparing the measurements for comparison may be in lookup tables in memory 606 be saved. The backplane aging / adjustment module 602 calculates adjustments for the backplane components and display electronics. The compensation module 608 receives input from the extraction unit 600 , the backplane / adaptation module 602 and the color / proportion gamma correction module 604 to get programming voltages to the pixels 104a -D in 1 to modify to compensate for aging effects. The compensation module 608 access the lookup table to get the basic data for each of the pixels 104a -D in the arrangement 102 to be used with calibration data. The compensation module 608 modifies the programming voltages to the pixels 104a -D according to the values in the look-up table and the data coming from the pixels in the display layout 102 were obtained.
  • The control 112 in FIG. measures the data from the pixels 104a -D in the ad arrangement 102 in 1 to properly normalize the data obtained during the measurement. The column reference pixel 130 supports these functions of the pixels in each of the columns. The column reference pixel 130 may be outside of the active viewing area that passes through the pixels 104a -D in 1 but such reference pixels may also be embedded in the active viewing areas. The column reference pixels 130 are maintained with a controlled state as unaged or aged in a certain manner to provide offset and cancellation information for pixel measurement data 104a -D in the ad arrangement 102 provide. This information helps the controller 112 , Common mode noise from external sources such. Room temperature, or within the system itself as leakage currents from other pixels 104a -D wipe out. Using a weighted average of several pixels in the array 102 Also, information about overall screen characteristics can be provided to solve problems such as voltage drop due to resistance in the screen, ie, a current / resistance (IR) drop. Information from the column reference pixel 130 , which is loaded by a known and controlled source, can be used in a compensation algorithm provided by the compensation module 608 is run to reduce compensation errors due to divergences. Different column reference pixels 130 can be selected using the data obtained from the initial baseline measurement of the screen. Bad reference pixels are identified, and alternative reference pixels 130 can be selected to ensure further reliability. Of course, it is understood that the line reference pixels 132 instead of the column reference pixels 130 and the row can be used instead of the columns for calibration and measurement.
  • In displays that use external readout circuits to compensate for the deviation of pixel characteristics, the readout circuits read at least one of the current, voltage, and charge of the pixels as the pixels are supplied with known input signals over time. The readout signals are converted to the deviation of the pixel parameters and used to compensate for the change in pixel characteristics. These systems are primarily susceptible to shifting in the readout circuit variations due to various phenomena such as temperature variation, aging, leakage, and others. As in 10 The line of reference pixels (the dashed pixels in 10 ) can be used to remove these effects from the readout circuit, and these reference lines can be used in the display layout. These lines of reference pixels are biased in such a way that they are substantially immune to aging. The readout circuits read these lines as well as normal display lines. Thereafter, the readings of the normal lines are finely adjusted by the reference values to eliminate the undesired effects. Since each column is connected to a readout circuit, a practical way to use the reference pixels in a column is to tune their normal pixels.
  • The biggest change is caused by overall effects on the screen, such as: Temperature, which affects both reference pixel and normal pixel circuits. In this case, the effect is deleted from the compensation value, so there is a separate compensation for such phenomena.
  • To compensate for overall phenomena without additional compensation factors or sensors, the effect of overall phenomena is subtracted from the reference pixels. There are different methods for calculating the effect of the total phenomena. The direct effects, however, are:
  • Mean reference value: Here, the mean value of the reference pixel values is used as the effect of an overall phenomenon. This value can then be subtracted from all reference pixels. As a result, when the reference values are modified with an overall phenomenon, it is subtracted therefrom. Thus, when the measured pixel values are finely adjusted by the reference values, the overall effect in the pixel values remains intact. Consequently, it is possible to compensate for such an effect.
  • Master reference pixel: Another method is to use master reference pixels (the master references may be a subset of the reference pixels or completely different). Similar to the previous method, the mean of the master references is subtracted from the reference pixel circuits, resulting in the effect of overall phenomena remaining in the measured pixel values.
  • There are different compensation methods that use the column reference pixels 130 in 1 use. For example, in the measurement of thin film transistors, the data value corresponding to the column reference pixel 130 required to output a stream, the data value of a pixel 104a -D in the same column of pixels in the active area (the pixel array 102 ) to output the same current. The measurement of the column reference pixels 130 and the pixel 104a -D can be done very quickly, z. During the same frame of a video. Any difference in the current shows the effects of aging on the pixels 104a -D. The resulting value may be from the controller 112 used to make the appropriate adjustment for the programming voltage to the pixels 104a -D to maintain the same luminance throughout the life of the display. Another application of a column reference pixel 130 is the provision of a reference current for the other pixels 104 which serves as the baseline, and in determining the aging effects on the current output of these pixels. The reference pixels 130 can simplify the data handling because part of the common mode noise cancellation is inherent in the measurement because the reference pixels 130 have the same data and supply lines as the active pixels 104 , The line reference pixels 132 can be measured regularly to verify that luminance curves are correct for the pixels stored during display production to use the controller for compensation.
  • A measurement of the drive transistors and OLEDs of all driver circuits, such. B. the driver circuit 200 in 2 , on a display before shipping the display takes 60-120 seconds on a 1080p display and detects any shorted and broken drive transistors and OLEDs (leading to stuck or unlit pixels). Also, nonuniformities in the performance of the driving transistor or OLEDs (leading to luminance nonuniformities) are detected. This technique can replace optical inspection with a digital camera, eliminating the need for this expensive component of the production facility. AMOLEDs, which uses color filters, can not be fully tested electrically because color filters are a purely optical component. In this case, technology that compensates for aging, such as. Ignis' MAXLIFE , in combination with an optical inspection step, providing additional diagnostic information and possibly reducing the complexity of the optical inspection.
  • These measurements provide more data than an optical test can provide. Knowing whether a point is defective due to a shorted or interrupted driver transistor or a shorted or broken OLED can help identify the cause or failure in the production process. For example, the most common cause of a shorted OLED is particulate contamination that lands on the glass during processing, thereby shorting the anode and cathode of the OLED. An increase in OLED counts could indicate that the production line should be shut down for chamber cleaning, or a search for new particle sources (changes in processes, equipment, personnel, or materials) could be initiated.
  • A relaxation system to compensate for aging effects such. As the system MAXLIFE , can compensate for process nonuniformity, which increases the yield of the display. However, the relationship between the measured current and the measured voltage or characteristics in the TFT or in the OLED is also useful for diagnostic purposes. For example, the shape of an OLED current-voltage characteristic may indicate increased resistance. A probable cause could be variations in contact resistance between transistor source / drain metal and the ITO (in a bottom emission AMOLED). If OLEDs have a different current-voltage characteristic in a corner of a display, a probable cause could be mask mismatch in the manufacturing process.
  • A stripe or circle area on the display with different OLED current-voltage characteristics could be due to defects in the manifolds used to disperse the organic vapor in the manufacturing process. In one possible scenario, a small particle of OLED material may flake off of an overlying plate and land on the manifold, partially occluding the opening. The measurement data would show the different OLED current-voltage characteristics in a specific pattern that would aid in rapid diagnosis of the problem. Due to the accuracy of the measurements (for example, the 4.8-inch display measures current with a resolution of 100 nA) and the measurement of the OLED current-voltage characteristic itself (instead of the luminance), variations can be detected can not be detected by optical inspection.
  • This highly accurate data can be used for statistical process control, which identifies when a process has begun to leave the control boundaries. This may allow early corrective action (either in the OLED or drive transistor (TFT) fabrication process) before defects in the finished product are detected. The measurement sample is maximized as each TFT and OLED is probed on each display.
  • If both the drive transistor and the OLED are functioning properly, a reading will be output in the expected range for the components. The pixel drive circuit requires that the OLED be turned off when the drive transistor is being measured (and vice versa), because if the drive transistor or OLED is shorted, the measurement of the other will be distorted. If the OLED is a shorted circuit (so that the current reading is MAX), the data shows that the drive transistor is an open circuit (current read MIN), but in fact the drive transistor could be operational or an open circuit. If additional data is required for the drive transistor, a temporary disconnect from the power supply (EL_VSS) to allow it to float results in a correct drive transistor reading indicating whether the TFT is actually operational or is an open circuit.
  • Likewise, if the drive transistor is a shorted circuit, the data indicates that the OLED is a broken circuit (but the OLED could be operationally operational or an open circuit). When additional data is required via the OLED, disconnecting it from the power supply (EL_VDD) and floating allows a correct OLED measurement, indicating whether the OLED is actually operational or in a broken circuit.
  • If both the OLED and the TFT in a pixel behave as a short circuit, one of the pixels (probably the contact between TFT and OLED) will quickly burn out during the measurement, causing a broken circuit and a transition to another state. These results are summarized in the following Table 1.
  • Figure DE112014002117T5_0002
    TABLE 1
  • 7 shows a system diagram of a control system 700 to control the brightness of a display 702 over time based on different aspects. The ad 702 may consist of an array of OLEDs or other pixel-based display devices. The system 700 includes a profile generator 704 and a decision-making machine 706 , The profile generator 704 receives characteristics from an OLED characteristic table 710 a backwall characteristic table 712 and a display specification file 714 , The profile generator 704 produces different luminance profiles 720a . 720b ... 720n for different conditions. To improve the power consumption, the life of the display and the picture quality, the different brightness profiles can be used 720a . 720b ... 720n be defined based on OLED and backplane information. Based on different applications, different profiles can also be obtained from the luminance profiles 720a . 720b ... 720n to be selected. For example, a profile with low brightness over time may be used to display video output such as movies, while for brighter applications brightness may decrease at a defined rate. The decision-making machine 706 can be software or hardware based and application inputs 730 , Environmental parameters inputs 732 , Backplane aging data inputs 734 and OLED aging data inputs 736 , which are factors for programming voltage adjustments, to match the brightness of the display 702 sure.
  • To perfectly compensate for ad aging, the short-term and long-term changes in ad characteristics are broken. One possibility is to measure a few points in the display at shorter measuring distances. As a result, the sampling performed at shorter intervals may show the short-term effects, while the normal aging extraction may show the long-term effects.
  • The previous implementation of compensation systems uses a normal drive scheme in which one frame has always been shown on the display and the OLED and TFT circuits were constantly under electrical stress. The calibration of each individual pixel took place during a frame by changing the grayscale value of the active pixel to a desired value, resulting in a visual artifact in which the measured subpixel was seen during calibration. If the frame rate of the video is X, then with normal video drive, each frame will be on the pixel array 102 in 1 1 / X seconds shown and the screen always shows a single image. In contrast, the relaxation video driver of the present example divides the frame time into four sub-frames, as in FIG 8th is shown. 8th is a timing diagram of a frame 800 That a video part single image 802 , a dummy part picture 804 , a relaxation part single image 806 and a spare part picture 808 includes.
  • The video part image 802 is the first sub-frame, which is the actual frame. The frame is created in the same way as with normal video control, around the entire pixel array 102 in 1 to program with the video data received from the program inputs. The dummy part picture 804 is an empty sub-frame with no real data about the pixel layout 102 be sent. The dummy part picture 804 serves the same frame for a while on the screen 102 before the relaxation part frame 806 is applied. This increases the luminance of the screen.
  • The relaxation part single image 806 is the third sub-frame and is a black frame with a gray scale value of zero for all red-green-blue-white (RGBW) subpixels in the pixel array 102 , This makes the screen black and offsets all pixels 104 in a predetermined state in which they are ready for calibration and insertion of the next video sub-frame. The spare parts picture 808 is a short sub-frame that is created for calibration purposes only. If the relaxation part single image 806 is complete and the screen is black, the data replacement phase begins for the next frame. No video or dummy data is sent to the pixel array during this phase 102 sent, with the exception of the lines with replacement data. For the non-replacement rows, only the clock of the gate driver is toggled to move the token throughout the gate driver. This is done to speed up the scanning of the entire screen and to be able to take multiple measurements per frame.
  • Another technique is used to plot the visual artifact of the measured subpixel during the spare part frame 808 to reduce. This was done by reprogramming the measured line with black once the calibration was complete. Thus, the subpixel returns to the same state as it did during the relaxation sub-frame 806 was. However, there is still a small amount of current flowing through the OLEDs in the pixels, causing the pixel to light up and become visible to the outside world. Therefore, to redirect the current flowing through the OLED, the control becomes 112 programmed with a nonzero value to derive the current from the pixel's drive transistor and to keep the OLED turned off.
  • Is a spare part single picture 808 This has the disadvantage that the measurement duration is limited to a small part of the entire frame. This limits the number of subpixel measurements per frame. This limitation is during operation of the pixel array 102 acceptable. However, for a quick basic measurement of the screen, it would be a tedious task to measure the entire display because each pixel has to be measured. To overcome this problem we have added a basic mode to the relaxation control scheme. 8th also shows a basic frame 820 for the drive scheme during the basic metering mode for the display. The basic measurement image 820 includes a video sub-picture 822 and spare parts picture 824 , When the system is switched to the basic mode, the driving scheme changes to include only two sub-frames in a basic frame, such as a frame. B. the single image 820 , gives. The video part image 822 includes the normal programming data for the image. In this example, the replacement (measurement sub-image) indicates 824 longer duration than the normal replacement frame, as in 8th is shown. The longer sub-frame enormously increases the total number of measurements per frame and allows for more accurate measurements of the screen, as more pixels can be measured during frame time.
  • The steep curve of the ΔV shift (electrical aging) in the early OLED loading time results in an efficiency decay curve above the ΔV shift, which behaves differently for the low ΔV value than at high ΔV values. This can give a highly nonlinear Δη-ΔV curve which is very sensitive to initial OLED aging or OLED pre-aging process. In addition, can the shape (duration and slope) of the early ΔV shift drop varies greatly from screen to screen due to process variations.
  • The use of a reference pixel and a corresponding OLED is explained above. The use of such a reference pixel eliminates the thermal effects on the ΔV measurements since the thermal effects have the same effect on the active and reference pixels. Instead of using an OLED that does not age (zero load) as a reference pixel, such as For example, the column reference pixel 130 in 1 , a reference pixel can be used with a low-stress OLED. The thermal effect of the stress is similar to that of a low stress OLED, and therefore the low stress OLED can still be used to remove the measurement noise due to thermal effects. Nevertheless, due to the similar fabrication condition as the rest of the OLED based devices on the same panel, the low load OLED can serve as a good reference for canceling out the effects of process variations on the Δη ΔV curve for the active pixels in a column. The steep early ΔV shift is also mitigated when such an OLED is used as a reference.
  • To use a loaded OLED as a reference, the reference OLED is loaded with a constant low current (1/5 to 1/3 of the full current), and its voltage (for a given applied current) must be used to calculate the thermal and Process problems of pixel OLEDS should be wiped out as follows:
    Figure DE112014002117T5_0003
    In this equation, W is the relative electrical aging based on the difference between the voltage of the active pixel OLED and the reference pixel OLED divided by the voltage of the reference pixel OLED. 9 is a diagram that is a plot 902 of points for a load current 268 uA based on the W value. As by the diagram 900 As shown, the W value is almost linearly related to the luminance drop of the pixel OLEDs as shown in a high load OLED.
  • 11 is a timing diagram 1100 for pixel compensation, comprising resetting the pixel circuit from programming. Depending on the process parameters, the pixel circuits may have disadvantageous artifacts after the triggering, such as, for. B. charge trapping or fast light transitions. Amorphous or polysilicon processes, for example, may lead to charge trapping in which the pixel circuit retains residual amounts of charge after the drive cycle in the storage capacitor. Metal oxide processes may cause the pixel circuits to respond better to light transitions in which the pixels change rapidly, such as in the case of light transitions. B. in fast video sequences. Before the pixel current is measured (to compensate for aging, process nonuniformities, or other effects), these artifacts can affect the calibration of the pixel circuits. To compensate for these artifacts, assign the timing sequence 1100 a reset cycle 1102 on. During the reset cycle 1102 For example, the pixel circuit to be measured is programmed with a reset voltage value corresponding to a maximum or minimum voltage value that depends on the process used in the manufacture of the display assembly. For example, in a display device manufactured according to an amorphous or polysilicon process, the reset voltage value may correspond to a full black value (a value that causes the pixel circuit to display black). For example, in a display fabricated using a metal oxide process, the reset voltage value may correspond to a full white value (a value that causes the pixel circuit to display white).
  • During the reset cycle 1102 the effect of the prior measurement of the pixel circuit (e.g., trapped residual charge in the pixel circuit) is removed, as well as any effects due to short term changes in the pixel circuitry (eg, rapid light transitions). After the reset cycle 1102 becomes the pixel circuit during a calibration cycle 1104 programmed with a calibration voltage based on previously extracted data or parameters for the pixel circuit. The calibration voltage may also be based on a predetermined current, voltage or brightness. During the calibration cycle 1104 Then, the pixel current of the pixel circuit is measured, and the extracted data or parameters for the pixel circuit are updated based on the measured current.
  • During a programming cycle 1106 after the calibration cycle 1104 For example, the pixel circuit is programmed with video data calibrated with the updated extracted data or parameters. Then, the pixel circuit becomes during a drive cycle 1108 driven on the programming cycle 1106 follows to emit light based on the programmed video data.
  • 12A shows a pixel circuit with IR waste compensation. V monitoring and V data can be the same line (or interconnected) because V monitoring does not matter during programming and V data does not matter during the measuring cycle. The transistors Ta and Tb can be shared by rows and columns. The signal line EM (emission) can be shared by columns.
  • 12B is a timing diagram showing a normal operation of the in 12A shown pixel circuit shows. The signal WR is active and the programming data (V P ) are written in the capacitor K S. At the same time, the signal line EM is turned off, so that the other side of the capacitor K S is connected to a reference voltage V Ref . Thus, the voltage stored in the capacitor C S (V Ref -V P ). During the drive (emission) cycle, the signal line EM is active and WR is off. Thus, the gate-source voltage V Ref becomes -V P and is independent of V DD .
  • 12C is a timing diagram for a direct TFT readout of the circuit 12A , The pixel circuit is programmed with a calibrated voltage for a known target current. During the second cycle RD is active and the pixel current is read out by monitoring V. The voltage V monitoring during the second cycle should be low enough so that the OLED is not turned on. The calibrated voltage is modified until the pixel current is the same as the target current. The modified calibrated voltage is used as a point in the TFT current-voltage characteristics to extract its parameter. Also, a current through V monitoring may be applied to the pixel while WR is active and V data is set to a fixed voltage. At this point, the voltage generated on V monitoring is the TFT gate voltage for the corresponding current.
  • 12D FIG. 11 is a timing diagram for direct OLED reading in the circuit of FIG 12A , The pixel circuitry is programmed with an OFF voltage so that the TFT does not provide power. During the second cycle, RD is active and the OLED current is read out by V monitoring . The voltage V monitoring is pre-calibrated based on a known target current. The voltage V monitoring is modified until the OLED_stream becomes equal to the target current. The modified voltage V monitoring is used as a point in the OLED current-voltage characteristic to extract its parameters. The signal line EM can remain off until the end of the readout cycle while the write line WR is kept active. In this case, the remaining pixel operations for reading out the OLED are the same as in the previous steps. It may be applied by monitoring V a current to the OLED. At this point, the voltage generated on V monitoring is the TFT gate voltage for the corresponding current.
  • 13A shows a pixel circuit with charge-based compensation. The V monitor readout line can be shared by adjacent columns, and the transistors Ta and Tb can be shared between lines. The V monitoring -Leitung it can be connected to the same line, the V data -Leitung. In this case, the V data line may have a fixed voltage (V Ref ).
  • 13B is a timing diagram showing a normal operation of the in 13A shown pixel circuit shows. While the WR (write) and RD (read) lines are active, the programming voltage V P and the reference voltage V Ref are applied to the pixel circuit via the V data line and the V monitor line . The reference voltage V ref should be low enough so that the OLED does not turn on. The readout line RD can be switched off earlier than the write line WR. In this time gap, transistor T1 begins to charge the V OLED and thus compensate for some of the TFT fluctuation because the charge generated is a function of a TFT parameter. The pixel is also independent of an IR drop because the source of the transistor T1 is disconnected from the power supply voltage V dd during the program cycle .
  • A direct TFT readout is in the timing diagram of 13C shown. The pixel circuit is calibrated with a calibrated voltage for a known target current. During the second cycle, RD is active and the pixel current is read out by the V monitor line . The V monitoring voltage during the second cycle should be low enough that the OLED is not turned on. The calibrated voltage is modified until the pixel current is the same as the target current. The modified calibrated voltage is used as a point in the TFT current-voltage characteristics to extract its parameters. Also, a current through V monitoring may be applied to the pixel while the write line WR is active and the data line V data is set at a fixed voltage. At this point, the voltage generated on V Monitor is the TFT gate voltage for the corresponding current.
  • A direct OLED readout cycle is in the timing diagram of 13D shown. The pixel circuit is programmed with an off voltage so that TFT-T1 does not provide any power. During the second cycle, the readout line RD is active and the OLED current is read out by the V monitoring line . The V monitoring voltage during the second cycle is pre-calibrated for a known target current. The V monitoring voltage is modified until the OLED current is the same as the target current. The modified V monitoring voltage is used as a point in the OLED current-voltage characteristics to extract its parameter. The emission line EM can be left off until the end of the readout cycle and WR left active. In this case, the remaining pixel operations to read the MONEY are the same as previous steps. A current can also be applied to the OLED through V monitoring . At this point, the voltage generated on V Monitor is the TFT gate voltage for the corresponding current.
  • An indirect OLED readout is in the timing diagram of 13E shown. Here, the pixel stream is read out in a similar way to the operation in 12 is shown. The only difference is that during programming RD is off and the gate voltage of the transistor T1 is set to the OLED voltage. Thus, the calibrated voltage must take into account the effect of the OLED voltage and the TFT parameter to equalize the pixel current to the target current. This calibrated voltage and the voltage extracted from the direct TFT readout to extract the OLED voltage may be used. For example, subtracting the calibrated voltage extracted by this process from the calibrated voltage extracted from the direct TFT readout results in the effect of the OLED when two target currents are equal.
  • 14 FIG. 12 shows a pre-electrified pixel circuit in which a second reference voltage Vref2 may be equal to the power supply voltage V dd , where the transistors Ta and Tb may be shared with columns and rows, the transistors Td and Tc may be shared with rows, and the pixel monitor line V may be monitored with Columns can be shared. During normal operation, the write line WR and the readout line RD are active and the emission line EM is turned off, the pixel voltage monitoring line V monitoring is connected to a reference current I ref and the data line V data is connected to a programming voltage from the second source driver. the gate of T1 is charged to a bias voltage associated with the reference current such that the voltage stored in capacitor C S is a function of V P and a bias voltage.
  • The systems described herein may be used to analyze screens at various stages of manufacture to detect faults. The main detection steps may be performed after backplane fabrication, after OLED fabrication, and / or after complete assembly. At each stage, the information provided by the systems described above may be used to identify the defects, which may then be analyzed using different methods, such as the following: As laser repair, can be repaired.
  • 15A shows a pixel circuit with a signal line connected to the OLED and the TFT, and 15B shows a pixel circuit and an ITO electrode, which is structured as a signal line. For the screen to be measured, there should either be a direct path to each pixel to measure the pixel stream, as in 15A or a partial electrode patterning can be used for the measurement path. In the latter case, the electrode (eg, ITO or any other material) is first patterned as vertical lines, as in FIG 15B is shown, and then the electrode is formed on pixels after the measurement is completed.
  • 16 shows a typical arrangement of a screen and its signals during a test. Every other signal is connected to a block by a standard level multiplexer which connects the signal to a standard value. Each signal may be selected by the multiplexer to program the screen or to measure the current / voltage / charge of the pixel.
  • 17 shows pixel circuitry that can be used for a factory test to detect defects in the pixels after the backplane has been fabricated. The following tests are based on the in 17 but similar tests can be performed with other pixel circuits as well.
  • In a first test:
    WR is high (data = high and data = low and Vdd = high).
  • Figure DE112014002117T5_0004
  • I th_lower here is the least acceptable current allowed for Data = low, and I th_high is the highest acceptable current for data = high.
  • In a second test:
    Static: WR is high (Data = high and Data = low);
    Dynamic: WR goes high and after programming it goes low (Data = low to high and Data = high to low).
  • Figure DE112014002117T5_0005
  • I th_hoch_dyn is the highest acceptable stream for high data with dynamic programming.
  • I th_high_lower is the highest acceptable current for high data with static programming.
  • The following pattern can also be used:
    Static: WR is high (Data = low and Data = high);
    Dynamic: WR goes high and after programming it goes low (Data = high to low).
  • 18 is an exemplary pixel circuit that can be used to test the entire display. When testing the entire ad:
    T1 and OLED currents are measured by the V monitoring line ;
    Condition 1: T1 is OK according to the back wall test.
  • Figure DE112014002117T5_0006
  • I tft_high is the highest possible current for the TFT current for a specific data value.
  • I tft_high is the lowest possible current for the TFT current for a specific data value.
  • I oled_hoch is the highest possible current for the OLED-Storm for a specific OLED voltage.
  • I oled_lower is the lowest possible current for the OLED current for a specific OLED voltage.
  • In another test:
    Measuring T1 and OLED current through monitoring;
    Condition 2: T1 is interrupted according to the back wall test.
  • Figure DE112014002117T5_0007
  • In another test:
    Measuring T1 and OLED current through monitoring;
    Condition 3: T1 is shorted according to the backplane test.
  • Figure DE112014002117T5_0008
  • Detected defects can be corrected by compensating adjustments in the display. For defects darker than the surrounding pixels, surrounding pixels can be used to provide the extra brightness necessary for the video (s). There are several ways to provide this extra brightness, such as:
    • (1) Using all the pixels directly surrounding, dividing the additional brightness by them. The challenge with this method in most cases is that the part associated with each pixel is not accurately generated by that pixel. Since the error generated by each surrounding pixel is added to the total error, the error becomes very large, thereby reducing the effectiveness of the correction.
    • (2) Using one or two of the surrounding pixels to generate the additional brightness needed by the defective pixel, the position of the active pixels can be swapped to compensate for minimizing the localized artifact.
  • During the life of the display, a soft defect can create stuck (always bright) pixels that are very annoying to the user. The real time measurement of the panel can identify the newly created stuck pixel, and then additional voltage can be applied through the monitor lead to destroy the OLED and turn it into a dark pixel. In addition, the compensation method described above can be used to reduce the visual effect of the dark pixels.
  • The methods described above for extracting base measurements of the pixels in the array may be performed by a processing device as in FIG 1 or any other such device, most preferably using one or more general purpose computing systems, microprocessors, digital signal processors, micro-controllers, application specific integrated circuits (ASIC), programmable logic devices (PLD), field programmable logic devices (FPLD), field programmable gate arrays (FPGA) and the like, which are programmed in accordance with the teachings described and illustrated herein, as will be understood by those skilled in the computer, software, and networking arts.
  • In addition, two or more computing systems or devices may be substituted for any of the controllers described herein. Accordingly, principles and advantages of distributed processing, such as e.g. Redundancy, replication, and the like, if desired, may also be implemented to improve the robustness and performance of the controllers described herein.
  • The operation of the example basic data determination methods may be based on machine-readable instructions. In these examples, the machine-readable instructions include an algorithm for execution by: (a) a processor, (b) a controller, and / or (c) one or more suitable processing apparatus (s). The algorithm may be embodied in software stored on a physical medium, such as: A flash memory, a CD-ROM, a floppy disk, a hard disk, a digital (universal) video disk (DVD) or other storage device, but those skilled in the art will generally recognize that the entire algorithm and / or parts Alternatively, it may be performed by a device other than a processor and / or may be implemented in a well-known manner in firmware or dedicated hardware (eg, through an application specific integrated circuit (ASIC), a programmable logic device (PLD), a field programmable logic device (FPLD), a field programmable gate array (FPGA), discrete logic, etc.). For example, one or all of the components of the basic data determination methods may be implemented by software, hardware, and / or firmware. In addition, some or all of the illustrated machine readable instructions may be manually implemented.
  • 19 FIG. 12 shows a system in which the brightness of the individual subpixels is adjusted based on the aging of at least one of the subpixels in each pixel to produce a substantially constant display white point over time, e.g. B. over the operating life of a display, z. B. 75,000 hours to maintain. For example, in an RGBW display, if the white OLED in one pixel loses part of its blue color component and thus produces a warmer white than desired, the blue OLED in the same pixel may be turned on together with the white OLED in the same pixel when displayed in white , Similarly, in an RGB display, the brightness levels of red, green and blue OLEDs may be dynamically adjusted over time in response to deterioration behaviors of individual OLEDs to maintain the display's white point substantially constant. In any case, the amount of change required in the brightness of the individual subpixels can be extracted from the shift in the color coordinates of one or more of the subpixels. This may be done by a series of calculations or by the use of a look up table containing precalculated values to determine the correlation between shifts in voltage or current supplied to a subpixel and / or the brightness of the light emitting material therein To determine subpixels.
  • Fixed initial color dots of the subpixels can be used to calculate the brightness levels of the subpixels in each subpixel. Then, during operation of the display, a correction unit determines a correction factor for each subpixel, e.g. By using a look-up table. In 19 Then, the initial subpixel color dots and the video input signal for the display become an initial brightness proportion calculating unit 1910 which calculates the brightness components of the red, green, blue and white subpixels. These brightness components are then adjusted by the respective values ΔR, ΔG, ΔB and ΔW derived from a signal ΔW OLED representing the aging of the white sub-pixel. The adjusted brightness components become a compensation unit 1911 which adjusts the video signal according to the adjusted brightness levels and the adjusted video signals to a driver 1912 sends that to an OLED display 1913 connected. The driver 1912 generates the signals representing the various subpixels in the display 1913 energize to produce the desired luminance of each subpixel.
  • There are different standards for characterizing colors. An example is the CIE standard 1931 , which characterizes colors by a luminance (brightness) parameter and two color coordinates x and y. The coordinates x and y specify a point in a CIE chromaticity diagram, as in FIG 20 representing the mapping of human color perception with respect to the two CIE parameters x and y. The colors that can be obtained by combining a given set of three primary colors, such as red, green, and blue, are in 20 represented by the triangle T which indicates the coordinates of the three colors in the CIE chromaticity diagram of 20 combines.
  • 21 FIG. 10 is a flowchart of a method of determining the brightness levels for the subpixels in an RGBW display of initial subpixel color dots and the video input signal for the image to be displayed, which are two inputs to the initial brightness component calculation unit 1910 in 19 is. The procedure off 21 starts at step 2101 by selecting two subpixels from the red, green and blue subpixels so that the desired display white point is within a triangle that can be formed with the color dots of the two selected subpixels and the white subpixel. For example, the triangle T in 20 defined by a red, green, and white subpixel value from the following set of chrominance coordinates of four RGBW subpixels and one display white point:
    Blue subpixel = [0.154, 0.149]
    Red subpixel = [0.67, 0.34]
    Green Subpixel = [0.29, 0.605]
    White subpixel = [0.29, 0.31]
    Display White Point = [0.3138, 0.331]
  • After selecting two subpixels at step 2101 it is assumed that the white subpixel is the third primary color, and then at step 2102 the chromaticity coordinates of the red, green, and blue subpixels (at which stage the blue and white subpixels are the same) are converted to tristimulus parameters to facilitate the calculation of the brightness levels of the red, green, and blue subpixels to achieve the desired display whitening point. Any color in a CIE chromaticity diagram can be thought of as a mixture of three CIE primaries, represented by three numbers X, Y, and Z, which can be specified as tristimulus values. The tristimulus values X, Y, and Z uniquely represent perceptible hue, and various combinations of light wavelengths yielding the same set of tristimulus values are indistinguishable to the human eye. Converting chromaticity coordinates to tristimulus values allows the use of linear algebra to compute a set of brightness levels for the red, green, and blue subpixels to achieve the desired display white point.
  • step 2103 uses the tristimulus values to calculate the brightness levels for the red, green, and blue subpixels to get the desired display white point. For the exemplary set of chromaticity coordinates and the desired display white point, as described above, the brightness ratios of the red, green and blue subpixels are B RW = 6.43%, B GW = 11.85% and B WW = 81.72%, respectively. The same calculation can be used to calculate the brightness components B R , B G and B B for the red, green and blue subpixels in an RGB display.
  • step 2104 assigns to the white subpixel the brightness component calculated for the blue subpixel, and these brightness components give the desired display white point in an RGBW system. However, video signals are typically based on an RGB system, so step 2105 the video signals R rgb, G rgb and B rgb in modified RGBW value W m, R m, G m, and B m converts by W m rgb possible with the minimum of R, G rgb and B is set RGB and the white portion the red, green and blue pixels are subtracted from the values of the signals R rgb , G rgb and B rgb as follows: W m = minimum of R rgb , G rgb and B rgb R m = R rgb - W G m = G rgb - W B m = B rgb - W
  • step 2106 then uses the calculated brightness ratios for B RW , B GW, and B WW to convert the modified values W m , R m , G m , and B m into actual values W, R, G, and B for the four RGBW subpixels as follows : W = W m .B WW R = R m + W m × B RW / B R G = G m + W m * B GW / B G B = B m + W m * B BW / B B
  • step 2103 uses the tristimulus values to calculate the brightness levels for the red, green, and blue subpixels to get the desired display white point. For the exemplary set of chrominance coordinate data and the desired display white point as set forth above, the brightness ratios of the red, green and blue subpixels are B RW = 6.43%, B GW = 11.85% and B WW = 81.72%, respectively. The same calculation can be used to calculate the brightness components B R , B G and B B for the red, green and blue subpixels in an RGB display.
  • 22A and 22B Figures are diagrams of actual measurements of the brightness of two white OLEDs aged by passing constant currents through the OLEDs. The currents applied to the two OLEDs were different to simulate two different loading conditions # 1 and # 2, as in 22A and 22B shown. As the OLED material ages, the resistance of the OLED increases and the voltage required to maintain a constant current through the OLED increases. For the curves of 22A and 22B For example, the voltage applied to each aging OLED to maintain a constant current was measured at successive intervals and compared to the voltage measured on an unaged reference OLED to which the same current was applied and the voltage exposed to the same environmental conditions as the aged OLED.
  • The numbers on the horizontal axis of 22A and 22B ΔVOLED represents what is the difference between the voltages measured for the aging OLED and the corresponding reference LED. The numbers on the vertical axes of 22A and 22B represent the corresponding chromaticity coordinates Cx and Cy of the measured brightness values of the aging white OLEDs.
  • To compensate for the brightness loss of a white subpixel as the white subpixel ages, the brightness ratios of the red, green and blue subpixels at ΔVOLED = 0.2 can be B RW = 7.62%, B GW = 8.92% and B WW, respectively = 83.46%; at ΔVOLED = 0.4 on B RW = 8.82%, B GW = 5.95% and B WW = 85.23%, respectively; and at ΔVOLED = 0.6 to B RW = 10.03%, B GW = 2.96% and B WW = 87.01%, respectively. These adjustments of the brightness components of the subpixels are in the compensation unit 1922 used to the driver 1919 provide compensated video signals, the consecutive subpixel groups in the display 1913 controls.
  • 24 For example, a compensation system makes use of OLED data that comes from a display 2400 (either in the form of an OLED voltage, an OLED current or an OLED luminance) and color shifts corrected. This system can be used for dynamic brightness component calculations in which the chrominance coordinates of the subpixels are not fixed, but rather are adjusted from time to time to compensate for changes in the color point of each subpixel over time. These calculations can be done in advance and included in a lookup table.
  • 24 represents a system in which OLED data such. B. an OLED voltage, an OLED current or an OLED luminance from an OLED display 2400 are extracted and used to compensate for color shifts as the OLEDs age to maintain a substantially constant display white point over time. A display measuring unit 2401 measures both OLED data 2402 as well as back wall data 2403 , and the back wall data 2403 For use in the compensation of the aging of backplane components such. B. driving transistors to a compensation unit 2406 Posted. The OLED data 2402 are sent to a sub-pixel color point unit 2404 , a subpixel efficiency unit 2405 and a compensation unit 2406 Posted. The sub-pixel color dot unit determines new color dots for each sub-pixel based on the OLED data (for example, by using a look-up table), and the new color dots become a sub-pixel brightness proportion calculation unit 2407 which also receives the video input signal for the display. The brightness components can be calculated in the same way as described above and then in the compensation unit 2406 used to make compensating adjustments to the signals applied to the four subpixels in each pixel. Lookup tables can be used for easier implementation, and lookup tables for the color points and the color parts can even be grouped into a single lookup table.
  • To compensate for the optical aging of the individual subpixels, the gray scales can be adjusted using the following value ΔV CL_w as the compensation adjustment for the white pixels: ΔV CL_W = G mW (W) · K CL_W in which G mW (W) = d / dν1 have pixel (W)
  • K CL_W is a brightness correction factor for the white subpixels and may be from the in 22A and 22B shown, empirically derived dependency curves that relate the OLED color shift with ΔVOLED. These measured data can be used to display the graph in 23 which represents the brightness correction factor K CL_W as a function of ΔVOLED for a white pixel. Assuming that any color shifts in the red, green and blue OLEDs are negligible, then brightness correction factors K b , K r and Kg are calculated from the K CL_W curve using the same red, green and blue brightness components as those described above become. The compensation adjustments for the red, green and blue OLEDs can then be calculated as follows: ΔR = K r (R) · ΔV CL_W ΔG = K g (G) · ΔK CL_W .DELTA.B = K b (B) · .DELTA.K CL_W
  • The final adjusted values of the gray scales for the red, green and blue OLEDs are calculated by adding the above values ΔR, ΔG and ΔB to the values derived from the original gray scale values.
  • 25 is a diagram of an exemplary display system 2550 , The display system 2550 includes an address driver 2508 , a data driver 2504 , a controller 2502 , a data store 2506 , and a display screen 2520 , The display screen 2530 includes a pixel array 2510 , which is arranged in rows and columns. Each of the pixels 2510 is individually programmable to emit light with individually programmable luminance values. The control 2502 receives digital data indicating the information displayed on the display screen 2520 to be displayed. The control 2502 sends signals 2532 to the data driver 2504 and activation signals 2534 to the address drivers 2508 to the pixels 2510 in the display screen 2520 to display the specified information. The variety of pixels 2510 which is the display screen 2520 therefore, includes a display assembly ("display screen") adapted to receive information in accordance with the digital input data provided by the controller 2502 are received, dynamically display. The display screen may represent, for example, video information from a video data string received from the controller 2502 was received. The supply voltage 2514 may provide a fixed voltage, or may be an adjustable voltage supply, by means of signals from the controller 2502 is controlled. The display system 2550 may also include features from a power source or sink (not shown) to the pixels 2510 in the display screen 2520 Provide bias currents, thereby the programming time for the pixels 2510 to reduce.
  • For illustrative purposes, the display system becomes 2550 in 25 with only four pixels 2510 in the display screen 2520 shown. It is believed that the display system 2550 can be implemented with a display screen comprising an array of similar pixels, e.g. For example, the pixels 2510 , and that the display screen is not limited to a certain number of rows and columns of pixels. For example, the display system 2550 with a display screen having a number of rows and columns of pixels commonly available in displays for mobile devices, televisions, digital cameras, or other monitor-based devices and / or projection devices.
  • The pixel 2510 is driven by a drive circuit ("pixel circuit"), which generally comprises a drive transistor and a light-emitting device. The following may be the pixel 2510 pertain to the pixel circuit. Optionally, the light emitting device may be an organic light emitting diode, but implementations of the present disclosure relate to pixel circuits with other electroluminescent devices, including current driven light emitting devices. The driving transistor in the pixel 2510 may optionally be an amorphous or polysilicon n-type or p-type thin film transistor, but implementations of the present disclosure are not limited to pixel circuits having a particular transistor polarity or limited to pixel circuits with thin film transistors. The pixel circuit 2510 may also include a storage capacitor to store programming information and the pixel circuit 2510 to allow it to drive the light-emitting device after it has been addressed. Therefore, the display screen 2520 be an active matrix display device.
  • As in 25 represented, is the pixel 2510 , which is the left upper pixel in the display screen 2520 is shown with a selection line 2524j , a supply line 2526j , a data line 2522i , and a monitoring line 2528i coupled. In one implementation, the supply voltage 2514 also a second supply line to the pixels 2510 provide. For example, each pixel may be coupled to a first supply line that has been Vdd-charged and a second supply line coupled to Vss, and the pixel circuits 2510 may be disposed between the first and second supply lines to facilitate driving a current between the two supply lines during an emission phase of the pixel circuit. The upper left pixel 2510 in the display screen 2520 may be a pixel in the display screen in a "jth" row and "ith" column of the display screen 2520 correspond. Similarly, the right upper pixel represents 2510 in the display screen 2520 a "jth" row and "mth"column; the lower left pixel 2510 represents an "nth" row and "ith"column; and the bottom right pixel 2510 represents an "nth" row and "ith" column. Each of the pixels 2510 is with suitable selection lines (eg, the selection lines 2524j and 2524n ), Utility lines (eg the utility lines 2526j and 2526n ), Data lines (eg the data lines 2522i and 2522m ), and monitoring lines (eg the monitoring lines 2528i and 2528m ) coupled. It is noted that aspects of the present disclosure provide pixels with additional connections, such as e.g. B. compounds with additional select lines and pixels with fewer connections such. B. pixels without connection with a monitoring line concern.
  • With reference to the upper left pixel 2510 in the display screen 2520 is shown, the selection line 2524j from the address driver 2508 and may be used to, for example, program a pixel operation 2510 to activate by activating a switch or transistor to connect it to the data line 2522i to allow the pixel 2510 to program. The data line 2522i transmits programming information from the data driver 2504 to the pixel 2510 , For example, the data line 2522i be used to apply a programming voltage or a programming current to the pixel 2510 create the pixel 2510 to program so that it emits a desired amount of luminance. The programming voltage (or the programming current) provided by the data driver 2504 over the data line 2522i is a voltage (or current) suitable for causing the pixel to emit light having a desired amount of luminance in accordance with the digital data received from the controller 2502 be received. The programming voltage (or programming current) may be during a programming operation of the pixel 2510 to the pixel 2510 be created to a storage device such. B. a storage capacitor within the pixel 2510 charge and thereby the pixel 2510 to activate so that it emits light with the desired amount of luminance during an emission process, which follows the programming process. For example, the storage device may be in the pixel 2510 during a programming operation to apply a voltage to one or more of a gate or a source of the drive transistor during the emission process, thereby causing the drive transistor to transmit the drive current through the light emitting device in accordance with the voltage stored on the storage device.
  • In general, the drive current is in the pixel 2510 which is transmitted by the driving transistor through the light-emitting device during the emission process, a current coming from the first supply line 2526j is provided and to a second supply line (not shown) is passed. The first supply line 2522j and the second supply line are connected to the power supply 2514 coupled. The first supply line 2526j may provide a positive supply voltage (eg, the voltage that is commonly referred to in the circuit design as "Vdd"), and the second supply line may provide a negative supply voltage (eg, the voltage commonly used in circuit design). Vss "is called). Implementations of the present disclosure may be practiced in which one or the other of the supply lines (eg, the utility line 2526j ) are set to a ground voltage or other reference voltage.
  • The display system 2550 also includes a monitoring system 2512 that monitored or measured or extracted information about individual pixels via a corresponding monitoring line 2528 receives. Again with reference to the upper left pixel 2501 in the display screen 2520 connects the monitoring line 2528i the pixel 2510 with the surveillance system 2512 , The monitoring system 2512 can in the data driver 2504 be integrated or can be a separate single system. In particular, the monitoring system 2512 optionally implemented by the current and / or the voltage of the data line 2522i during a monitoring process of the pixel 2510 is monitored, and the monitoring line 2528i can be completely omitted. In addition, the display system 2550 without the monitoring system 2512 or the monitoring line 2528i be implemented. The monitoring line 2528i allows the monitoring system 2512 to measure a current or voltage that is the pixel 2510 is assigned, and thereby extract information indicating a deterioration of the pixel 2510 specify. For example, the monitoring system 2512 over the monitoring line 2528i extract a current that passes through the drive transistor within the pixel 2510 and thereby determine a threshold voltage of the drive transistor or a shift thereof based on the measured current and based on the voltages applied to the drive transistor during the measurement.
  • The monitoring system 2512 may also extract an operating voltage of the light-emitting device (eg, a voltage drop across the light-emitting device while the light-emitting device is operated to emit light). The monitoring system 2512 then can the signals 2532 to the controller 2502 and / or the memory 2506 communicate to the display system 5250 to allow the extracted degradation information in memory 2506 save. During subsequent programming and / or emission processes of the pixel 2510 the deterioration information will be from the controller 2502 about the memory signals 2536 from the store 2506 retrieved, and the controller 2502 then compensates for the extracted degradation information in subsequent programming and / or emission operations of the pixel 2510 , For example, as soon as the Deterioration information was extracted, the programming information, over the data line 2522i to the pixel 2510 during a subsequent programming operation of the pixel 2510 be suitably adjusted so that the pixel 2510 Light emitted with a desired amount of luminance, regardless of the deterioration of the pixel 2510 is. In one example, an increase in the threshold voltage of the drive transistor may be within the pixel 2510 be compensated by the programming voltage applied to the pixel 2510 is created, is increased in a suitable manner. The compensation is as described below and with reference to 26 - 28 shown determined.
  • Integrated data path
  • According to one aspect of the present disclosure, a method relates to simultaneously compensating for a plurality of degradation phenomena, wherein the degradation phenomena include luminance performance of current driven pixels (eg, the pixels 2510 in 25 ) in an active matrix display (eg, the display screen 2520 ) influence negatively. Each of the pixel circuits includes a light emitting device (such as an organic light emitting diode or OLED) that is driven by a driving transistor. Deterioration phenomena include a phenomenon of unevenness (caused by process nonuniformity), a temperature phenomenon, a hysteresis phenomenon, a time-dependent aging phenomenon, and a dynamic effect phenomenon that may be caused by a shift of a threshold voltage of a driving transistor of a pixel circuit. Sometimes these phenomena can also be referred to as pixel "parameters" in the OLED technique.
  • By using a generic pixel stream compensation equation, one can identify the effect of each phenomenon (eg, the aging of OLEDs and TFTs, nonuniformities, and so on) on each parameter. As a result, all parameters affected by a phenomenon are updated when a phenomenon is measured.
  • An example of this implementation is based on
    Figure DE112014002117T5_0009
  • I p is the pixel current obtained from a particular row and column (i, j) of the active matrix display. V T (i, j) = V T0 (i, j) - ΔV T0 (i, j) - K dyn V OLED (i, j) and k '(i, j) = k comp (i, j). β (i, j). Here, V T0 (i, j) is an initial unevenness offset, ΔV T0 (i, j) is an aging offset, K dyn is a dynamic effect of V OLED on the offset, k comp (i, j) is an effect of OLED efficiency deterioration to the scaling factor, and β (i, j) is the effect of pixel unevenness on the scaling factor. For example, the pixel current increases by 10% as the OLED efficiency deteriorates by 10% to compensate for the loss of efficiency, which means that K comp becomes 1.1. The letters i and j denote the row or column of the measured pixel.
  • Computing V g (i, j) from (1) yields
    Figure DE112014002117T5_0010
    In the equation (2), k (i, j) = (1 / k '(i, j)) 1 / α' (i, j), α (i, j) = 1 / α '(i, j ).
  • In 26 concerns the performance LUT 2606 (Lookup table) a power factor table which stores performance factors to a phenomenon of unevenness 2600 which is related to process irregularities in the manufacture of the active matrix display. The scaling LUT 2608 refers to a scale factor table that stores multiple scale factors to provide a time dependent aging phenomenon 102 the light emitting device and / or the driving transistor of a pixel circuit of the active matrix display to compensate. The displacement LUT 2610 relates to an offset factor table which stores a plurality of offset factors to a dynamic effect phenomenon 2604 which is caused at least by a shift of the threshold voltage V T of the drive transistor of a pixel circuit of the active matrix display. The measurement of a current and / or a voltage is, for example, in the blocks 2612 . 2614 . 2616 shown. In 26 For example, the asterisk (*) refers to a representation of the measured / extracted signal (eg, a voltage, current, or charge) from one of the monitor lines 2528 that was influenced by one or more of the phenomena described here.
  • A characteristic of a selected one of the pixel circuits that is affected by one or more of the degradation phenomena is measured. This characteristic may be, for example, a current consumed by the driving transistor, or a voltage at the driving transistor, a current consumed by the light-emitting device, or a voltage at the light-emitting device, a threshold voltage of the driving transistor. Some measures for deterioration monitoring are disclosed in US Patent Application No. 2012/0299978 (Serial No. 058161-57USPT) and US Patent Application No. 13 / 291,486 filed on Nov. 8, 2011 (Serial No. 058161-53USPT ), both of which are incorporated in their respective entireties.
  • Using the above equations, the measured characteristic is used to determine a new value to produce a fitted value that produces a new power factor, scaling factor, and / or offset factor. Regardless of which factor is adjusted, the other two factors are adjusted automatically and simultaneously using the equations above. The adjusted factors are stored in the respective performance, scaling, and offset factor tables. The compensated pixel is driven according to a current based on the adjusted values and a programming current or voltage.
  • Alternatively, and / or optionally, the order of measured phenomena may vary in determining the new value, such that any combination of orders based on the power LUT 2606 , the scaling LUT 2608 and the displacement LUT 2610 certain factors is possible. The new scale factor based on the scale LUT 2608 For example, first, the new power factor is based on the power LUT 2606 second and the new offset factor based on the offset LUT 2610 determined as third. In another example, the new displacement factor is first determined, the new power factor is determined second, and the new scaling factor is determined to be third.
  • According to a further alternative and / or optional feature, the cause of the change of each parameter may be in addition to or instead of the one in 26 include other parameters. For example, any one or more of the causes of unevenness, temperature, hysteresis, OLED aging, and the dynamic effect may be used in determining any of the factors that are in accordance with the power LUT 2606 , the scaling LUT 2608 and / or the displacement LUT 2610 be determined to be included. For example, in addition to or instead of the non-uniformity phenomenon, one or more of the temperature, hysteresis, OLED aging, and dynamic effect phenomena are used to determine the new power factor for the power LUT 2606 to determine.
  • According to yet another alternative and / or optional feature, each parameter level is divided into several levels. For example, the step of determining the new scale factor for the scaling LUT 2606 two or more substages with several new scaling factors. Accordingly, as a concrete example, a first scaling substatus determines a first new scaling factor based on the unevenness, a second scaling substatus determines a second new scaling factor based on the temperature, a third scaling substract determines a third new scaling factor based on the Hysteresis, etc. Alternatively, the new scaling factors are determined in order with reference to the above concrete example. For example, the third new scale factor is first determined based on the hysteresis, and the first new scale factor based on the non-uniformity is determined second.
  • According to yet another alternative and / or optional feature, additional stages are in addition to or instead of those in FIG 26 comprising stages for determining the new performance, scaling and dislocation factors. For example, in addition to the stages for determining the new line scaling and offset factors, one or more stages for determining a brightness control factor, a contrast control factor, etc. are included.
  • Gamma adjustment
  • For both the measurement and the compensation, a higher resolution with a low gray scale is desired. While using a non-linear gamma curve is common in driving liquid crystal display (LCD) screens, it is usually not needed due to non-linear pixel behavior in OLEDs. As a result, OLED displays provide a unique opportunity to avoid nonlinear gamma, which simplifies the system. A nonlinear gamma 2820 but it is an intended method to increase resolution at low gray levels, as in 27 shown.
  • With external compensation, the design requires a larger modulation range for the source drive voltage. While a lower peak voltage is needed at the beginning of the screen aging (i.e., the active matrix display) to achieve a target luminance, the peak voltage must increase as the screen ages, but at the same time the maximum voltage for the target black increases due to the offset offset.
  • Therefore, a compressed range of the source driver voltage is used, which is smaller than the source driver voltage. This area can, as in 28 shown and described below by way of example, be moved up or down depending on the screen state.
  • With reference to 28 a compressed-linear gamma curve uses a bit allocation. The dashed line 2830 represents the available range of source driver voltage from the GND (ground) to the VDD (power supply) of the source driver (SDVDD). The bold line 2832 represents the range set by configuring the reference voltage of the source driver so that a 10-bit scale in the bold area is used. If necessary, the non-linear gamma 2820 Procedure off 27 and the compressed-linear gamma method 28 interconnected to provide a combination in which at least a portion of the bit allocation with the non-linear gamma curve 2820 is consistent and at least a part with the compressed-linear gamma curve 2830 . 2832 is consistent.
  • Some or all of those in the 26 - 28 The blocks shown by way of example herein represent one or more algorithms corresponding to at least some instructions executed by one or more controllers to perform the disclosed functions or steps. Any of the methods, algorithms or functions described herein may include machine or computer readable instructions to be executed by: one or more processors or controllers and / or any other suitable processing device. Any algorithm, software, or method disclosed herein may be embodied as a computer program product having one or more nonvolatile physical media or media, such as a flash memory, a CD-ROM, a floppy disk, a hard disk, a Digital Versatile Disc (DVD), or other storage devices (such as the memory 2506 out 25 Alternatively, those of ordinary skill in the art will readily recognize that the entire algorithm and / or portions thereof may alternatively be implemented by a device other than a controller and embedded in firmware or dedicated hardware (eg, by means of an application specific integrated circuit (ASIC), a programmable logic device (PLD), a field programmable logic device (FPLD), a discrete logic device, etc.). The methods, algorithms and / or functions may include, for example, machine or computer readable instructions issued by the controller 2502 and / or the monitoring system 2512 which is referred to above with reference to 25 has been illustrated and described.
  • Generally on 29 Referring to, a display system generally relates to portable devices such. B. Mobile phones and tablets, which already have a graphics processing unit (GPU) and a processing unit. At least some of the functions (eg, compensation, measurement, etc.) that are typically performed by components on the edge of a substrate (eg, for a television) are instead provided by the processing device of the portable device (eg, the processing unit a mobile phone). For example, a mobile phone includes a GPU that performs part of the compensation, measurement, and / or other functions. In other examples, the processing unit performs part of the compensation, measurement, and / or other functions.
  • As exemplified in the following table, a system level simplification includes a variety of possible modifications and simplifications according to a feature of the display system:
    Figure DE112014002117T5_0011
  • While the display provided blocks for all functions such. For example, computing the compensation values and controlling the measurement scheduler may share some of the blocks with system level resources to simplify the overall integrated system. With reference to 29 a system configuration is displayed in connection with displays. According to the example in 29 For example, a common system includes multiple processing units such as Generic processors, graphics processors, etc. Additionally, multiple memory blocks are used in a common system. The data can be sent by the system through interface blocks to one or more displays. Additional exemplary interface modules are described above with reference to the pixel circuits in FIG 15A and 15B shown and described.
  • The display may include a compensation block, a timing controller, a memory unit, and a measurement unit interfaced with other interface modules, such as a memory module. B. a touch screen can be shared include. The compensation block and / or the central processing unit can, for example, at least in the compensation module 608 , which with reference to 6 shown above and described in the control system 700 , which with reference to 7 has been described and described above, and / or in the compensation feature described with reference to 26 is shown and described above, or include these. In another example, the measuring unit may be at least in a voltage comparator circuit 408 referring to above 4A has been shown and described include or include. In yet another example, the controller performs at least one function of the programming described with reference to the timing diagram 100 in 11 has been shown and described above.
  • During off-line operation of the device, the system processing and storage units may be used to perform display measurements and calculate new compensation parameters. Additionally, at least one or more of the measurements may be made using system resources or display resources during online operation of the device.
  • The interface between the system block diagram and the display memory for updating some of the parameters may be achieved through the main memory bus or through the display video interface. When the display is in compensation mode, the main video interface can be used to transfer the parameters to the display memory or to receive the readings from the display. In addition, some of these interfaces may work with other blocks, such as B. a touch screen can be used.
  • To reduce power consumption during display calibration, only resources required for calibration remain ON, with the reset going into a power-saving mode (where the resources in question operate at a lower operating frequency or lower operating voltage) or completely shut down ,
  • In addition, the available resources such. For example, the battery area may be a factor to enable the display calibration. For example, if the battery level is less than a threshold, the display calibration may be paused until the battery is charged or the corresponding device is charged. As another example, a multi-layered compensation system depends on the available resources, which include a lower battery compensation (or calibration) priority, which may be deferred.
  • The compensation / calibration priority can be set based on one or more parameters, ranges, colors, or the time of the last calibration. For example, with respect to emissive displays, blue OLED pixels age faster than other subpixels and, therefore, blue OLEDs may have a higher priority than other subpixels (to which correspondingly lower priorities are assigned).
  • According to another feature, priorities are assigned based on static images. For example, some areas in a display are displaying static images most of the time. These ranges may have a higher priority for calibration (compensation) purposes.
  • Implementation A1
  • A method of maintaining a substantially constant display white point over an extended period of operation of a color display formed by an array of many pixels, each of the pixels comprising a plurality of subpixels having different colors, and wherein each of the subpixels comprises a light emitting device Method includes:
    generating a display by energizing sub-pixels of successively selected pixels,
    controlling the color of each selected pixel by controlling the relative power supply levels of the subpixels in the selected pixel,
    determining the degradation behavior of the subpixels in each pixel, and
    adjusting the relative power supply levels of the subpixels in each pixel to adjust the brightness levels of the subpixels to compensate for the degradation of the subpixels, wherein the brightness levels are adjusted to maintain a substantially constant display white point.
  • Implementation A2
  • Implementation method A1, in which the degradation behavior is a shift of the color coordinates of the subpixels of a selected pixel.
  • Implementation A3
  • Implementation method A2, in which the selected pixel is a white pixel.
  • Implementation A4
  • Implementation method A1, in which the light-emitting device is an OLED.
  • Implementation A5
  • Implementation method A1, in which the display is an RGBW display.
  • Implementation A6
  • Implementation method A1, in which the extended period of operation is at least 75,000 hours.
  • Implementation A7
  • Implementation method A1, in which the deterioration behavior is detected by measuring the voltage at the light-emitting device.
  • Implementation B
  • A method of maintaining a substantially constant display white point over an extended period of operation of a color OLED display formed by an array of multiple pixels, each of the pixels comprising red, green, blue, and white subpixels, the method comprising:
    generating a display by energizing sub-pixels of successively selected pixels,
    controlling the color of each selected pixel by controlling the relative power supply levels of the subpixels in the selected pixel,
    determining the shift of the color coordinates of the subpixels in each pixel as the subpixels age, and
    adjusting the relative power supply levels of the subpixels in each pixel to adjust the brightness levels of the subpixels to compensate for the shift of the color coordinates of the subpixels, the brightness levels being adjusted to maintain a substantially constant display white point.
  • Implementation C1
  • A system for maintaining a substantially constant display white point over an extended period of operation of a color display, the system comprising:
    a color display formed by an array of multiple pixels, each of the pixels comprising a plurality of subpixels having different colors, and each of the subpixels including a light emitting device,
    Drive circuits for energizing the subpixels of successively selected pixels and controlling the color of each selected pixel by controlling the relative power supply levels of the subpixels in the selected pixel, and
    a controller which monitors the degradation behavior of the subpixels in each pixel and adjusts the relative power supply levels of the subpixels in each pixel to adjust the brightness levels of the subpixels to compensate for the degradation of the subpixels, the brightness levels being adjusted to be substantially constant Maintain Ad Whitening Point.
  • Implementation C2
  • Implementation method C1, in which the degradation behavior is a shift in the color coordinates of the subpixels of a selected pixel.
  • Implementation C3
  • Implementation method C2 in which the pixel is a white pixel.
  • Implementation C4
  • Implementation method C1, in which the light-emitting device is an OLED.
  • Implementation C5
  • Implementation method C1 in which the display is an RGBW display.
  • Implementation C6
  • Implementation procedure C1, in which the extended period of operation is at least 75,000 hours.
  • Implementation C7
  • Implementation method C1, in which the deterioration behavior is detected by measuring the voltage at the light-emitting device.
  • Implementation D1
  • A method of compensating for a plurality of degradation phenomena that adversely affect the luminance performance of current driven pixel circuits in an active matrix display, each of the pixel circuits comprising a light emitting device driven by a drive transistor, the method comprising:
    storing a plurality of first factors in a first table using one or more controllers to compensate for a first phenomena of the degradation phenomena;
    storing a plurality of second factors in a second table using at least one of the controllers to compensate for a second phenomena of the deterioration phenomena;
    measuring a characteristic of a selected one of the pixel circuits affected by a detected phenomenon from the first phenomenon and the second phenomenon using at least one of the controllers;
    determining a new value for a corresponding first factor and second factor for the detected phenomenon in response to the measurement to produce a first adjusted value;
    automatically calculating the other of the first factor and the second factor in response to determining the new value to produce a second adjusted value;
    storing the first adjusted value and the second adjusted value in respective tables from the first table and the second table using at least one of the controllers; and
    subsequently driving the selected pixel circuit according to a pixel switching characteristic based on the first adjusted value and the second adjusted value in response to storing the first adjusted value and the second adjusted value using at least one of the controllers.
  • Implementation D2
  • Implementation method D1, wherein the pixel-switching characteristic comprises one or more of a current consumed by the driving transistor, a voltage at the driving transistor, a threshold voltage of the driving transistor, a current consumed by the light-emitting device, and a voltage at the light-emitting device.
  • Implementation D3
  • Implementation Method D1, wherein the deterioration phenomena include an unevenness phenomenon, a time-dependent aging phenomenon, a dynamic effect phenomenon, and a temperature phenomenon.
  • Implementation D4
  • Implementation method D1, wherein the first table and the second table are selected from a group consisting of a power factor table, a scale factor table, and an offset factor table.
  • Implementation D5
  • Implementation method D4, further comprising storing performance factors in the power factor table using at least one of the controllers to compensate for a phenomenon of non-uniformity associated with process nonuniformity in the manufacturing active matrix display.
  • Implementation D6
  • Implementation method D4, further comprising storing scale factors in the scale factor table using at least one of the controllers to compensate for a time dependent aging phenomenon of at least one of the light emitting device and the drive transistor.
  • Implementation D7
  • Implementation method D4, further comprising storing offset factors in the offset factor table using at least one of the controls to compensate for a dynamic effect phenomenon caused by at least a shift of a threshold voltage of the drive transistor.
  • Implementation D8
  • Implementation method D1, further comprising increasing a resolution according to a non-linear gamma curve using at least one of the controllers.
  • Implementation D9
  • Implementation method D1, further comprising selecting a compressed region of a source driver voltage using at least one of the controllers, wherein the compressed region is along a compressed-linear gamma curve.
  • Implementation D10
  • Implementation method D1, further comprising configuring reference voltages of a source driver using at least one of the controllers to include bit allocation along a portion of one of a non-linear gamma curve and a compressed-linear gamma curve.
  • Implementation E1
  • A method of compensating for a plurality of degradation phenomena that adversely affect luminance performance of current driven pixel circuits in an active matrix display, each of the pixel circuits comprising a light emitting device driven by a drive transistor, the method comprising:
    storing a plurality of power factors in a power factor table using one or more controllers to compensate for a phenomenon of non-uniformity of the deterioration phenomena at each of the pixel circuits, the unevenness phenomenon being associated with process nonuniformities in the fabrication of the active matrix display;
    storing a plurality of scaling factors in a scale factor table using at least one of the controllers to compensate for at least one time-dependent aging phenomenon of the deterioration phenomena of one or more of each of the light-emitting devices and the driving transistors of the pixel circuits;
    storing a plurality of offset factors in an offset factor table using at least one of the controls to compensate for at least one dynamic effect phenomenon of the degradation phenomena caused at least by a shift of a threshold voltage of the drive transistor of each of the pixel circuits;
    measuring a characteristic of a selected one of the pixel circuits that is affected by a detected phenomenon from the unevenness phenomenon, the aging phenomenon, or the dynamic effect phenomenon using at least one of the controllers;
    determining a new value for a corresponding power factor, scaling factor or displacement factor for the detected phenomenon using at least one of the controls in response to the measurement to produce a first adjusted value;
    automatically calculating the other two of the power factor, the scale factor, and the offset factor using at least one of the controllers in response to determining the new value to produce a second adjusted value and a third adjusted value;
    storing the first, second and third adjusted values in a corresponding one of the power factor table, the scale factor table and the offset factor table using at least one of the controllers; and
    subsequently driving the selected pixel circuit using at least one of the controllers in response to storing the first, second and third adjusted values in accordance with a current based on the first, second and third adjusted values.
  • Implementation E2
  • Implementation method E1 in which the current is at least one of a current consumed by the driving transistor and a current consumed by the light-emitting device.
  • Implementation E2
  • An implementation method E1, further comprising driving the selected pixel circuit according to one or more pixel circuit characteristics selected from a group consisting of a driving transistor consumed current, a voltage across the driving transistor, a threshold voltage of the driving transistor, a current consumed by the light emitting device, and a voltage at the light emitting device is selected using at least one of the controllers in response to storing the first, second and third adjusted values.
  • Implementation E3
  • Implementation method E1 further comprising increasing a resolution according to a non-linear gamma curve using at least one of the controllers.
  • Implementation E4
  • Implementation method E1, further comprising selecting a compressed region of a source driver voltage using at least one of the controllers, wherein the compressed region is along a compressed-linear gamma curve.
  • Implementation E5
  • Implementation method E1, further comprising configuring reference voltages of a source driver using at least one of the controllers to achieve bit allocation along a portion of one or more of a non-linear gamma curve and a compressed-linear gamma curve.
  • Implementation F1
  • A display system for compensating for deterioration phenomena that adversely affect luminance performance, the system comprising:
    an active matrix with current driven pixel circuits, each of the pixel circuits comprising a light emitting device driven by a drive transistor;
    a processor; such as
    a memory device with stored instructions which, when executed by the processor, cause the system to:
    in a first table stores a plurality of first factors to compensate for a first phenomena of the deterioration phenomena;
    in a second table stores a plurality of second factors to compensate for a second phenomena of the deterioration phenomena;
    measures a characteristic of a selected one of the pixel circuits that is affected by a detected phenomenon of the first phenomenon and the second phenomenon;
    determine a new value for a corresponding first factor and second factor for the detected phenomenon in response to the measurement to produce a first adjusted value;
    automatically, in response to determining the new value, calculate the other of the first factor and the second factor to produce a second adjusted value;
    stores the first adjusted value and the second adjusted value in respective tables from the first table and the second table; and
    subsequently driving the selected pixel circuit in accordance with a pixel switching characteristic based on the first adjusted value and the second adjusted value in response to storing the first adjusted value and the second adjusted value.
  • Implementation F2
  • An implementation system F1, wherein the pixel switching characteristic comprises one or more of a current consumed by the driving transistor, a voltage at the driving transistor, a threshold voltage of the driving transistor, a current consumed by the light emitting device, and a voltage at the light emitting device.
  • Implementation F3
  • Implementation system F1, wherein the deterioration phenomena include an unevenness phenomenon, a time-dependent aging phenomenon, a dynamic effect phenomenon, and a temperature phenomenon.
  • Implementation F4
  • Implementation system F1, wherein the first table and the second table are selected from a group consisting of a power factor table, a scale factor table, and an offset factor table.
  • Implementation E
  • System comprising:
    a display module integrated with a portable device and having a display communicatively coupled to one or more of a driver unit, a measurement unit, a timing controller, a compensation sub-module, and a display memory unit; and
    a system module communicatively coupled to the display module and having one or more interface modules, one or more processing units, and one or more system memory units, wherein at least one of the processing units and the system memory units are programmable to provide new compensation parameters during off-line operation calculate the display module.
  • Implementation F
  • A method of compensating an IR drop in a pixel circuit, comprising:
    activating a write line to cause a program voltage to be stored in a storage capacitor in the pixel circuit;
    connecting the storage capacitor to a reference voltage at the same time as activating, such that a voltage stored in the storage capacitor is a function of the reference voltage and the program voltage; and
    driving the pixel circuit by activating a driving transistor so that its gate-source voltage corresponds to the voltage stored in the storage capacitor and is independent of a power supply voltage to which the driving transistor is connected.
  • Implementation G
  • A method for directly reading a parameter of a driving transistor in a pixel circuit, comprising:
    programming the pixel circuit with a calibrated voltage for a predetermined target current;
    reading out the pixel current flowing through the drive transistor via a monitor line without turning on a light emitting device of the pixel circuit;
    modifying a calibration voltage on the monitor line until the pixel current equals the predetermined target current; and
    extracting a parameter of the current-voltage characteristics of the drive transistor using the modified calibration voltage.
  • Implementation H
  • A method of directly reading a characteristic of a light-emitting device in a pixel circuit, comprising:
    turning off a drive transistor in the pixel circuit;
    reading a current flowing through the light-emitting device via a monitor line by applying a pre-calibrated voltage to the monitor line based on a predetermined target current;
    modifying the voltage on the monitor line until the current through the light emitting device equals the target current; and
    extracting a parameter of the current-voltage characteristics of the drive transistor using the modified voltage on the monitor line.
  • Implementation I
  • A method for charge-based compensation of a pixel circuit comprising:
    simultaneously applying a reference voltage from a monitor line to a storage capacitor in the pixel circuit by activating a readout transistor during a program cycle while also applying a programming voltage from a data line to the storage capacitor by activating a write transistor, the reference voltage being selected to be a light-emitting element of the pixel circuit is not turned on during the programming cycle;
    deactivating application of the reference voltage during the programming cycle before deactivating the application of the programming voltage to allow the drive transistor to charge a voltage at the light emitting device according to a parameter of the current-voltage characteristics of the drive transistor,
    wherein during the programming cycle, a source of the driving transistor is disconnected from a power supply voltage.
  • Implementation J
  • A method for directly reading a parameter of a driving transistor in a pixel circuit, comprising:
    programming the pixel circuit with a programming voltage calibrated for a predetermined target current;
    activating a readout transistor during a monitoring cycle to read a pixel current flowing through the drive transistor via a monitor line having a monitor voltage that does not cause a light emitting device of the pixel circuit to be turned on;
    calibrating the monitor voltage until the pixel current equals the target current; and
    extracting a parameter of the current-voltage characteristics of the driving transistor using the calibrated monitoring voltage corresponding to the target current.
  • Implementation K
  • A method of directly reading out a parameter of a light-emitting device of a pixel circuit, comprising:
    deactivating a driving transistor of the pixel circuit so that no current flows through the driving transistor;
    reading a current during the readout cycle flowing through the light-emitting device in response to the deactivation by applying an initially pre-calibrated monitor voltage to a monitor line coupled to the light-emitting device, the pre-calibrated monitor voltage to a predetermined target current the light-emitting device corresponds;
    calibrating the monitor voltage during the readout cycle until a pixel current through the light emitting device equals the target current; and
    extracting a parameter of the current-voltage characteristics of the light-emitting device using the calibrated monitor voltage corresponding to the target current.
  • Implementation L
  • Method for indirectly reading out a parameter of a light-emitting device of a pixel circuit, comprising:
    programming the pixel circuit with a programming voltage that is calibrated for a predetermined target current and setting a gate voltage of a drive transistor of the pixel circuit to a voltage across the light-emitting device;
    activating a readout transistor during a monitoring cycle to read out a pixel current flowing through the drive transistor via a monitor line having a monitor voltage that does not cause a light emitting device of the pixel circuit to be turned on;
    calibrating the monitor voltage until the pixel current equals the target current; and
    extracting a parameter of the current-voltage characteristics of the driving transistor using at least the calibrated monitoring voltage corresponding to the target current.
  • Implementation M
  • A method of applying a bias voltage to a pixel circuit, comprising:
    connecting a voltage monitoring line to a reference current and a voltage data line to a programming voltage; and
    charging a gate of a drive transistor of the pixel circuit to a bias voltage associated with the reference current such that a voltage stored in a storage capacitor of the pixel circuit is a function of the program voltage and the bias voltage.
  • While particular embodiments and applications of the present disclosure have been illustrated and described, it is to be understood that the present disclosure is not limited to the precise layouts and compositions disclosed herein, and that various modifications, changes, and variations may be apparent from the foregoing descriptions to depart from the spirit and scope of the invention, which is defined in the appended claims.

Claims (20)

  1. A voltage programmed display screen that enables the measurement of pixel effects on the screen, comprising: a plurality of active pixels for displaying an image under an operating condition, wherein the active pixels are each coupled to a supply line and a programming line; a plurality of reference pixels included in the display area and coupled to the supply line and the programming line, the reference pixels being controlled so that they do not undergo significant changes due to aging and operating conditions over time; and a readout circuit coupled to the active pixels and the reference pixels for reading at least one of current, voltage and charge from the pixels when the pixels are supplied with known input signals, the readout circuit being subject to changes due to aging and operating conditions over time , and the readings from the active pixels are adjusted using the readout values from the reference pixels.
  2. The system of claim 1, wherein the operating conditions include temperature.
  3. The system of claim 1, wherein the effect of an overall phenomenon affecting both the active pixels and the reference pixels is determined by the reference pixels and then subtracted from the readings of the reference pixels.
  4. The system of claim 3, wherein the effect of an overall phenomenon is determined by averaging the readings from the reference pixels.
  5. The system of claim 3, wherein the effect of an overall phenomenon is determined by averaging the readings from a set of master pixels within the reference pixels.
  6. A method of voltage programming a pixel circuit of a display screen, comprising: during a reset cycle, programming the pixel circuit with a reset voltage value corresponding to a maximum or minimum voltage value; in response to the reset cycle, during a calibration cycle, programming the pixel circuit with a calibration voltage based on the previously extracted data for the pixel circuit, measuring a pixel current of the pixel circuit, and updating the extracted data for the pixel circuit based on the measured pixel current; in response to the calibration cycle, during a program cycle, programming the pixel circuit with video data calibrated with the updated extracted data; and in response to the programming cycle, during a drive cycle, driving the pixel circuit in accordance with the programmed video data.
  7. The method of claim 6, wherein the maximum voltage value corresponds to at least a wholly white value, and wherein the minimum value corresponds to a wholly black value.
  8. A method of compensating an IR drop in a pixel circuit, comprising: Activating a write line to cause programming voltage to be stored in a storage capacitor in the pixel circuit; simultaneously with activating, connecting the storage capacitor to a reference voltage such that a voltage stored in the storage capacitor is a function of the reference voltage and the programming voltage; and Driving the pixel circuit by activating a drive transistor such that its gate-source voltage corresponds to the voltage stored in the storage capacitor and is independent of a power supply voltage to which the drive transistor is connected.
  9. A method for directly reading out a parameter of a driving transistor in a pixel circuit, comprising: Programming the pixel circuit with a calibrated voltage for a predetermined target current; Reading the pixel current flowing through the drive transistor through a monitor line without turning on a light-emitting device of the pixel circuit; Modifying a calibration voltage on the monitor line until the pixel current corresponds to the predetermined target current; and Extracting a parameter of the current-voltage characteristics of the drive transistor using the modified calibration voltage.
  10. A method of directly reading out a characteristic of a light-emitting device in a pixel circuit, comprising: Turning off a driving transistor in the pixel circuit; Reading a current flowing through the light-emitting device through a monitor line by applying a pre-calibrated voltage based on a predetermined target current to the monitor line; Modifying the voltage on the monitor line until the current through the light emitting device corresponds to the target current; and Extracting a parameter of the current-voltage characteristics of the drive transistor using the modified voltage on the monitor line.
  11. A method for charge-based compensation of a pixel circuit, comprising: during a programming cycle, simultaneously applying a reference voltage from a monitor line to a storage capacitor in the pixel circuit by activating a readout transistor while also applying a programming voltage to the storage capacitor from a data line by activating a write transistor, the reference voltage being selected to be a Light-emitting element of the pixel circuit does not turn on during the programming cycle; and Deactivating application of the reference voltage during the programming cycle prior to deactivating the application of the programming voltage to give the drive transistor time to begin charging a voltage to the light emitting device in accordance with a current-voltage characteristic parameter of the drive transistor; wherein a source of the driving transistor is disconnected from a power supply voltage during the programming cycle.
  12. A method of directly reading a parameter of a driving transistor in a pixel circuit, comprising: programming the pixel circuit with a programming voltage calibrated for a predetermined target current; during a monitoring cycle, activating a readout transistor for reading out a pixel current flowing through the drive transistor by means of a monitor line having a monitor voltage which does not cause a light emitting device of the pixel circuit to turn on; Calibrating the monitor voltage until the pixel current equals the target current; and Extracting a parameter of the current-voltage characteristics of the driving transistor using the calibrated monitoring voltage corresponding to the target current.
  13. A method for directly reading out a parameter of a light-emitting device of a pixel circuit, comprising: Turning off a drive transistor of the pixel circuit so that no current is provided by the drive transistor; in response to turning off, during a readout cycle, reading a current flowing through the light emitting device by applying an initially pre-calibrated monitor voltage to a monitor line coupled to the light emitting device, wherein the pre-calibrated monitor voltage is a predetermined target current for the monitor Light emitting device corresponds; Calibrating the monitor voltage during the read cycle until a pixel current through the light emitting device corresponds to the target current; and Extracting a parameter of the current-voltage characteristics of the light-emitting device using the calibrated monitor voltage corresponding to the target current.
  14. Method for indirectly reading out a parameter of a light-emitting device of a pixel circuit, comprising: Programming the pixel circuit with a programming voltage calibrated for a predetermined target current such that a gate voltage of a drive transistor of the pixel circuit is set to a voltage at the light emitting device; during a monitoring cycle, activating a readout transistor for reading out a pixel current flowing through the drive transistor by means of a monitor line having a monitor voltage which does not cause a light emitting device of the pixel circuit to turn on; Calibrating the monitor voltage until the pixel current equals the target current; and Extracting a parameter of the current-voltage characteristics of the driving transistor using at least the calibrated monitoring voltage corresponding to the target current.
  15. A method of biasing a pixel circuit, comprising: Connecting a voltage monitoring line to a reference current and a voltage data line to a programming voltage; and Charging a gate of a drive transistor of the pixel circuit to a bias voltage associated with the reference current such that a voltage stored in a storage capacitor of the pixel circuit is a function of the program voltage and the bias voltage.
  16. System comprising: a display module integrated with a portable device and having a display communicatively coupled to a driver unit, a measurement unit, a timing controller, a compensation sub-module, and / or a display storage unit; and a system module communicatively coupled to the display module and having one or more interface modules, one or more processing units, and one or more system memory units, wherein at least one of the processing units and the system memory units is programmable to perform a function during an offline operation that otherwise performed by the display module during in-line operation.
  17. The system of claim 16, wherein the portable device is selected from a group consisting of a mobile phone and a tablet.
  18. The system of claim 16, wherein the display module comprises a graphics processing unit.
  19. The system of claim 16, wherein at least one of the processing units and the system memory units of the system module is programmable to calculate new compensation parameters for the display module during off-line operation.
  20. The system of claim 16, wherein calibrating the display is turned on as a function of available resources.
DE112014002117.2T 2009-11-30 2014-04-23 Display system with compensation techniques and / or shared layer resources Pending DE112014002117T5 (en)

Priority Applications (11)

Application Number Priority Date Filing Date Title
US13/869,399 US9384698B2 (en) 2009-11-30 2013-04-24 System and methods for aging compensation in AMOLED displays
US13/869,399 2013-04-24
US13/890,926 US9311859B2 (en) 2009-11-30 2013-05-09 Resetting cycle for aging compensation in AMOLED displays
US13/890,926 2013-05-09
US201361827404P true 2013-05-24 2013-05-24
US61/827,404 2013-05-24
PCT/IB2014/059753 WO2014141148A1 (en) 2013-03-13 2014-03-13 Integrated compensation datapath
IBIB-PCT/IB2014/059753 2014-03-13
US201461976910P true 2014-04-08 2014-04-08
US61/976,910 2014-04-08
PCT/IB2014/060959 WO2014174472A1 (en) 2013-04-24 2014-04-23 Display system with compensation techniques and/or shared level resources

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CN105185311B (en) * 2015-10-10 2018-03-30 深圳市华星光电技术有限公司 Amoled display apparatus and driving method thereof
US20180075798A1 (en) * 2016-09-14 2018-03-15 Apple Inc. External Compensation for Display on Mobile Device
US10209551B2 (en) * 2016-09-19 2019-02-19 Apple Inc. Dual-loop display sensing for compensation

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US20030071821A1 (en) * 2001-10-11 2003-04-17 Sundahl Robert C. Luminance compensation for emissive displays
US6995519B2 (en) * 2003-11-25 2006-02-07 Eastman Kodak Company OLED display with aging compensation
US8077123B2 (en) * 2007-03-20 2011-12-13 Leadis Technology, Inc. Emission control in aged active matrix OLED display using voltage ratio or current ratio with temperature compensation
US20100277400A1 (en) * 2009-05-01 2010-11-04 Leadis Technology, Inc. Correction of aging in amoled display
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