DE102017119850A1 - Method for power-line based control of the supply voltage of LEDs - Google Patents

Method for power-line based control of the supply voltage of LEDs

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Publication number
DE102017119850A1
DE102017119850A1 DE102017119850.4A DE102017119850A DE102017119850A1 DE 102017119850 A1 DE102017119850 A1 DE 102017119850A1 DE 102017119850 A DE102017119850 A DE 102017119850A DE 102017119850 A1 DE102017119850 A1 DE 102017119850A1
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voltage
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ic
lb
led
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German (de)
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Christian Schmitz
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Elmos Semiconductor AG
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Elmos Semiconductor AG
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Priority to DE102016116062.8 priority
Priority to DE102016116496 priority
Priority to DE102016116496.8 priority
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
    • H05B45/00Circuit arrangements for operating light emitting diodes [LED]
    • H05B45/40Details of LED load circuits
    • H05B45/44Details of LED load circuits with an active control inside an LED matrix
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
    • H05B45/00Circuit arrangements for operating light emitting diodes [LED]
    • H05B45/30Driver circuits
    • H05B45/347Dynamic headroom control [DHC]

Abstract

The invention relates to an apparatus and a method for fault-tolerant power supply of LED groups (L1, L2, ... Lj, ... Ln) with electrical energy. A supply voltage (Vsup) is applied to a common first terminal of LED groups (L1, L2, ... Lj, ... Ln) through a controllable voltage regulator (DCDC). The respective current (I1, I2, ... Ij, ... In) through the respective LED groups (L1, L2, ... Lj, ... Ln) is by means of current sources (Iq1, Iq2, ... Iqj, ... Iqn) is set according to a respective current command value and modulated with a PWM modulation period. The voltage values of the voltage drops (VQ1, VQ2, ... VQj, ... VQn) via the respective current source (Iq1, Iq2, ... Iqj, ... Iqn) and / or the voltage drops (VL1, VL2, .. VLj, ... VLn) via the LED groups (L1, L2, ... Lj, ... Ln) are detected. They form an initial voltage vector. They are wired or wirelessly transmitted to a controller (CTR) or via the power supply line. The detection of the voltage drops takes place synchronously with the PWM modulation so as not to falsify the result. The recorded values of the voltage drops are transmitted to the controller (CTR) by means of power line communication and possibly encrypted. The control ICs that contain the power sources authenticate to the controller (CTR). The controller (CTR) discards the smallest voltage drop across the current sources and the largest voltage drop across the LED groups and unauthenticated voltage values. The regulation of the supply voltage (Vsup) occurs on the basis of at least one voltage value of the thus reduced voltage vector.

Description

  • preamble
  • The proposal is directed to a fault-robust device for energy-efficient supply of a plurality of n LED groups from one LED or multiple LEDs with electrical energy.
  • General introduction
  • LED lighting devices are known from the prior art, in which a combined power supply for the energy-efficient power supply of whole LED groups are used. In this case, preferably, a switching power supply operating voltage with high efficiency so that the totaled load cell voltages of the LEDs of the LED group are sufficiently exceeded with a margin of safety to ensure a current flow through the LEDs of the LED group. A current source sets the average current through the LEDs so that the brightness of the LEDs corresponds to a default value. Typically, a plurality of LEDs in a plurality of LED groups are supplied by a voltage converter. This can lead to failures and errors. Since the applications are security relevant applications, e.g. Stop lights of a car, can act, circuit failure should not lead to total failure of the application circuit. The proposed technical solution deals with a possible solution to this problem.
  • State of the art
  • The closest prior art devices for supplying a plurality of n LED groups (L j , where 1 ≤ j ≤ n) are provided by a controllable switching power supply (DCDC) having an output voltage (V sup ) having an output voltage value (V sup ). provided. As examples here can DE 10 318 780 A1 . US 2007/0 139 317 A1 . US 2008/0 122 383 A1 . US 2009/0268 012 A1 . US 2009/0 230 874 A1 . US 2010/0 026 209 A1 . US 2010/0 201 278 A1 . US 2011/0 012 521 A1 . US 2011/0 043 114 A1 . US 2012/0 268 012 A1 . US Pat. No. 8,519,632 B2 . US 8 319 449 B2 . US Pat. No. 7,157,866 B2 . DE 10 2005 028 403 B4 . DE 10 2006 055 312 A1 . EP 1 499 165 B1 . EP 2 600 695 B1 . WO 2013/030 047 A1 to be named. Such a device of the prior art typically has a plurality of n current sources (Iq 1 , Iq 2 , ... Iq j , ... Iq n ). Each of the current sources (Iq j with 1 ≦ j ≦ n) is preferably associated with exactly one LED group (L j ) and, during normal operation, sets its LED group current (I j , with 1 ≦ j ≦ n).
  • An LED group (L j ) here consists of one or more LEDs in parallel and / or series connection and the like combinations with a first and a second terminal. An LED group (L j ) typically always has a first terminal connected to the output voltage (V sup ) of the voltage converter (DCDC) and a second terminal connected to the first terminal of an associated current source (Iq j ) of the n power sources is connected. The serial order of such serially connected elements within the series circuit can be varied within the meaning of this proposal without affecting the content of this proposal or the claimed scope of the claims.
  • Each of the current sources (Iq j ) is set up and provided for, in proper operation, in each case an electric current (I j ), by the respectively connected and thus associated with their LED group (L j ) from the plurality of n LED groups (L 1 , L 2 , ..., L j , ... L n ) in the amount of a respective associated current source current (I j ) to drive. This means that the respective current source (Iq j ) in normal operation limits the current source current (I j ) through this LED group (L j ). For example, the respective current source (Iq j ) may be a current mirror circuit or another current source circuit having a current source transistor. The actual power supply, however, via a voltage converter (DCDC), which supplies the series circuit of the respective current source (Iq j ) and LED group (L j ) with its output voltage (V sup ). If the voltage converter (DCDC) fails or the voltage converter (DCDC) supplies too little output voltage (V sup ) or output current, such a real transistor current source (Iq j ) does not run into an infinite voltage like an ideal current source to supply the current source current (I j ) but on the contrary shows an insufficient voltage drop (V Qj ) across this current source (Iq j ). From the prior art devices are therefore known which use the value of this voltage drop (V Qj ) via the current source (Iq j ) for the regulation of the output voltage (V sup ) of the voltage converter (DCDC). For this purpose, they have detection devices (M Qj , where 1 j n) for detecting voltage values (V Qj , where 1 ≦ j ≦ n) of these voltage drops across the relevant current sources (Iq j ).
  • In the prior art, it is proposed to use the minimum detected voltage value (V Qj ) of the voltage drop across the corresponding current source (Iq j ) having this minimum voltage drop (V Qj ) of the voltage drop for controlling the voltage converter (DCDC). For this purpose, devices of the prior art have a circuit (Min) for determining this minimum of the voltage values (V Qj ) Voltage drops across the current sources (Iq j ) from the voltage values (V Qj ).
  • This initially has the advantage that the voltage drop across all power sources and thus the energy consumption of the power sources can be minimized by this voltage drop. The current sources are preferably linear regulators which have to reduce any excess supply voltage which may be present for a given current source value. The voltage across the LED group is typically specified by the LED chain length and the sum of the load voltages of the LEDs in series. However, this control method of the prior art based on the minimum power source voltage drop also has, on the other hand, various disadvantages which have an effect especially in safety-relevant applications and are not solved in the prior art:
    In the case of a loss of mass of a current source (Iq j ), no current flows through this current source (Iq j ). Thus, the voltage drop across this current source (Iq j ), since it is usually a real transistor current source is zero. But then the voltage converter (DCDC) is fully turned on by the controller (CTR), which can result in damage and subsequent failure of the remaining LED groups (L j ). This can be a safety-related malfunction in safety-relevant modules. An LED short circuit would only have consequences insofar as the regulation would then be determined by another LED group. A short circuit of a current source (Iq j ) would express itself as the loss of mass of a current source (Iq j ) by the maximum Aufsteuern of the voltage converter (DCDC) and would thus also potentially safety relevant.
  • The proposal is therefore based on the object to provide a solution which does not have the above disadvantages of the prior art and has other advantages. This relates to the detection of a faulty state and the still error-free control of the supply voltage (V sup ) remaining non-fault affected LED groups.
  • This object is achieved by a method according to claim 1.
  • Solution of the task
  • The proposal describes a device for supplying a plurality of n LED groups (L 1,1 , L, 1,2 , ..., L 1, j 1, ... L 1, n 1, L 2,1 , L, 2.2 , ..., L 2, j 2 , ... L 2, n 2 ; ... L k, 1 , L, k, 2 , ..., L k, jk , ... L k, n , ... L m, 1 , L, m, 2 , ..., L m, j m, ... L m, nm ), which in m LED modules (LB 1 , LB 2 , ... LB k , ... LB m ) and are now controlled by a control board (SB) and supplied with voltage having an operating voltage value (V sup ). The entire device comprises a plurality of current sources (Iq 1,1 , Iq 1,2 , ... Iq 1, j1 , ... Iq 1, n1 ; Iq 2,1 , Iq 2,2 , ... Iq 2 , j2 , ... Iq2 , n2 ; Iqk , 1 , Iqk , 2 , ... Iqk , jk , ... Iqk , nk ; Iqm , 1 , Iqm , 2 , ... Iq m, jm , ... Iq m, nm ). These are preferably housed in integrated control circuits control IC (IC k, lk , with 1 ≤ k ≤ m and 1 ≤ l k ≤ o k ), which are divided into LED assemblies (LB k ). Each LED module (LB k , with 1 ≤ k ≤ m) comprises an LED modules specific number of o k control ICs (IC k, lk , with 1 ≤ k ≤ m and 1 ≤ l k ≤ o k ) , This number o k can be the same for all LED modules, but also different from LED module to LED module. Each control IC (IC k, lk , with 1 ≦ k ≦ m and 1 ≦ l k ≦ o k ) thus comprises one or more of the current sources (Iq k, jk , with 1 ≦ k ≦ m and 1 ≦ j k ≦ n k ). Also, the number of current sources per control IC (ICk , lk ) may be different from control IC to control IC. Here, n k is the number of current sources (Iq k, jk , with 1 ≤ k ≤ m and 1 ≤ j k ≤ n k ) in the k-th LED module (LB k ). Also, the number n k of power sources per LED assembly may vary from LED assembly to LED assembly. m means the total number of LED assemblies. Each of the current sources (Iq k, jk , with 1 ≤ k ≤ m and 1 ≤ j k ≤ n k ) is thus preferably exactly one LED group (L k, jk , with 1 ≤ k ≤ m and 1 ≤ j k ≤ n k ) and sets in normal operation their LED group current (I k, jk , with 1 ≤ k ≤ m and 1 ≤ j k ≤ n k ).
  • An LED group here consists of one or more LEDs in parallel and / or series connection. An LED group always has a first terminal connected to the operating voltage (V sup ) or other supply potential. The operating voltage is equal to the output voltage of the control module (SB).
  • Each of the current sources (Iq k, j , with 1 ≤ k ≤ m and 1 ≤ j ≤ n m ) is set up and provided for, in proper operation, each having an electric current (I k, j , with 1 ≤ k ≤ m and 1 ≤ j ≤ n m ), by the respectively connected LED group (L k, j , with 1 ≤ k ≤ m and 1 ≤ j ≤ n m ) of the plurality of LED groups (L 1,1 , L 1,2 , ..., L 1, j1 , ... L 1, n 1, L 2,1 , L, 2,2 , ..., L 2, j 2, ... L 2, n 2 ; ... L k, 1 , L, k, 2 , ..., Lk, jk , ... Lk, nk ; ... ... L m, 1 , L, m, 2 , ..., L m , jm , ... L m, nm ) in the amount of a respective associated current source current (I k, j , with 1 ≤ k ≤ m and 1 ≤ j ≤ n m ) to drive. This means that the respective current source (Iq k, j , with 1 ≤ k ≤ m and 1 ≤ j ≤ n m ) in normal operation, the current (I k, j , with 1 ≤ k ≤ m and 1 ≤ j ≤ n m ) is limited by this LED group (L k, j , with 1 ≤ k ≤ m and 1 ≤ j ≤ n m ). For example, it may again be a current mirror circuit or another current source circuit having a current source transistor. The actual power supply is, however, again via a voltage converter (DCDC), the series circuit of respective current source (Iq k, j , with 1 ≤ k ≤ m and 1 ≤ j ≤ n m ) and LED group (L k, j , with 1 ≤ k ≤ m and 1 ≤ j ≤ n m ) with an operating voltage that supplies the output voltage (V sup ) of the voltage converter (DCDC). If the voltage converter (DCDC) fails or the voltage converter (DCDC) does not supply enough output voltage (V sup ) or output current, then such a real transistor power source does not run into an infinite voltage like an ideal current source to maintain the current source current but shows Conversely, an insufficient voltage drop across this current source (Iq k, j , with 1 ≤ k ≤ m and 1 ≤ j ≤ n m ).
  • The proposed device now has, in a first embodiment, detection devices (M Lk1, jk1 , with 1 k 1 m and 1 ≦ j k1 n k1 ; M Lk2, jk2 , with 1 k 2 m and 1 j k2 ≦ n k2 ; M Qk1, jk1, where 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; M Qk2, jk2 , where 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ;) for detecting at least two voltage values (V Qk1, jk1 , with 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; V Qk2, jk2 , with 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ; V Lk1, jk1 , with 1 ≦ k 1 ≦ m and 1 ≦ j k1 n k1 ; V Lk2, jk2 , with 1 k 2 m and 1 j k2 ≦ n k2 ) of at least two voltage drops across at least two LED groups (L k1, jk1 , with 1 k 1 m and 1 ≦ j k1 n k1 ; L k2, jk2 , with 1 k 2 m and 1 j k2 ≦ n k2 ) and / or current sources (Iq k1, jk1 , with 1 ≦ k 1 ≦ m and 1 ≦ j k1 ≦ n k1 ; Iq k2, jk2 , where 1 k 2 m and 1 j k2 ≦ n k2 ) of the plurality of current sources (Iq 1,1 , Iq 1,2 , ... Iq 1 , j1, ... Iq 1, n1; 2.1 Iq, Iq 2,2, ... Iq 2, j2, ... Iq 2, n2; Iq k, 1, I q k, 2, ... Iqk , jk , ... Iqk , nk ; Iq m, 1 , Iq m, 2 , ... Iq m, jm , ... Iq m, nm ). It is vorchalgsgemäß sufficient to cover the following cases:
    • a. a voltage value (V Qk1, jk1, where 1 k 1 m and 1 ≦ j k1 ≦ n k1 ) of the voltage drop across a current source (Iq k1, jk1 , with 1 k 1 m and 1 ≦ j k1 ≦ n k1 ) and a voltage value (V Lk2, jk2 , with 1 k 2 m and 1 j k2 ≦ n k2 ) of a voltage drop across an LED group (L k2, jk2 , with 1 k 2 m and 1 ≦ j k2 ≤ n k2 )
    • b. at least two voltage values (V Qk1, jk1 , with 1 k 1 m and 1 ≦ j k1 n k1 ; V Qk2, jk2 , with 1 k 2 m and 1 j k2 ≦ n k2 ) of at least two voltage drops at least two current sources (Iq k1, jk1 , with 1 k 1 m and 1 ≦ j k1 ≦ n k1 ; Iq k2, jk2 , with 1 k 2 m and 1 j k2 ≦ n k2 )
    • c. at least two voltage values (V Lk1, jk1 , with 1 k 1 m and 1 ≦ j k1 n k1 ; V Lk2, jk2 , with 1 k 2 m and 1 j k2 ≦ n k2 ) of at least two voltage drops at least two LED groups (L k1, jk1 , with 1 k 1 m and 1 ≦ j k1 n k1 ; L k2, jk2 , with 1 k 2 m and 1 j k2 ≦ n k2 )
  • From these at least two voltage values (V Qk1, Jk1 , V Qk2, Jk2 , V Lk1, Jk1 , V Lk2, Jk2 ), a controller (CTR) then forms an at least two-dimensional voltage value vector (Vec), which is calculated from the at least two voltage values ( V Qk1, jk1 ; V Qk2, jk2 ; V Lk1, jk1 ; V Lk2, jk2 ). In the case a), the voltage value vector (Vec) thus comprises at least one voltage value (V Lk1, jk1 ) of one of the at least two LED groups (L k1, jk1 ) and a voltage value (V Qk2, jk2 ) of at least one of the at least two current sources ( Iq k2, jk2 ).
  • According to the proposal, the voltage values (V Qk1, jk1 , V Qk2, jk2 , V Lk1, jk1 , V Lk2, jk2 ) of the voltage value vector (Vec) are now evaluated. A voltage vector dimension reduction unit (VDVM) determines, for each of the at least two detected (V Qk1, jk1 ; V Qk2, jk2 ; V Lk1, jk1 ; V Lk2, jk2 ) of the voltage value vector (Vec), an evaluation value (B Qk1, jk1 , with 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; B Qk2, jk2, where 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ; B Lk1, jk1 , where 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 , B Lk2, jk2, where 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ) of the respective voltage value (V Qk1, jk1 , V Qk2, jk2 , V Lk1, jk1 , V Lk2, jk2 ) , This voltage vector dimension reduction unit (VDVM) then discards the voltage value of the voltage vector (Vec) whose evaluation value (B Qk1, jk1 ; B Qk2, jk2 ; B Lk1, jk1 ; B Lk2, jk2 ) exceeds or falls below a threshold value (SW V ). Whether the overrun or underrun is used for the discard depends only on the implementation. If, for example, only the current source voltages (V Qk, jk ) are used, it makes sense, for example, to reject the smallest current source voltage. In that case, for example, one could then provide the second smallest current source voltage with an offset (V off ) as a safety margin and then use the value thus obtained for regulation. This has the advantage that in the case of one of the errors described above, this does not break through to the voltage regulation and leads to safety-relevant errors. In this error model, however, it is assumed that only single errors always occur. Thus, the voltage vector dimension reduction unit (VDVM) generates a reduced voltage vector (VecR) from the voltage vector (Vec) reduced by the number of one dimension. Of course it is possible to delete more N values in order to be able to intercept multiple errors. However, N must always be smaller than the number n by the number 1.
    • a. A first variant of the proposal may then be such that the voltage vector dimension reduction unit (VDVM) rejects the voltage value of the (V Qk, j ; V Lk, j ) of the voltage vector (Vec) having the largest voltage value to form the reduced voltage vector (VecR) ;
    • b. A second variant of the proposal may then be such that the voltage vector dimension reduction unit (VDVM) rejects the voltage value of the (V Qk, j ; V Lk, j ) of the voltage vector (Vec) whose magnitude is above a threshold value (SW v ) to form a reduced voltage vector (VecR);
    • c. A third variant of the proposal may then be such that the voltage vector dimension reduction unit (VDVM) measures the voltage value of the (V Qk, j ; V Lk, j ) of the voltage vector (Vec), whose magnitude is below a threshold (SW v ), discards to form the reduced voltage vector (VecR);
    • d. A fourth variant of the pre-scarf may then be such that the voltage vector dimension reduction unit (VDVM) rejects the voltage value of the (V Qk, j ; V Lk, j ) of the voltage vector (Vec) having the lowest voltage value to form the reduced voltage vector (VecR) ;
    The proposed also present controllable voltage converter (DCDC), which is preferably a switching power supply with high efficiency, is the regulated power supply of the LED groups (L k, j ) and for feeding the electrical currents (I k, j ) in the LED groups ( Lk, j ). The already mentioned controller (CTR) is, as proposed, suitable and intended to regulate the output voltage (V sup ) of the voltage converter (DCDC) by means of a control signal (R v ) representing the control value, based on the voltage values of the reduced voltage vector (VecR) , The controller (CTR) in conjunction with the voltage converter (DCDC) has a control characteristic. This manifests itself in how the control signal (R v ) depends on the voltage values of the reduced voltage vector (VecR). Preferably, the control characteristic has a linear range in which the output voltage (V sup ) of the variable voltage converter (DCDC) depends linearly on the weighted or unweighted average value (VecRM) of the voltage values of the reduced voltage vector (VecR).
  • The control characteristic has at least one operating point (AP), which is a combination of the voltage values of the reduced voltage vector (VecR), on, in which the output voltage (V sup) of the controllable voltage converter (DCDC) non-linearly from the mean (VecRM) of the voltage values of the reduced Voltage vector (VecR) depends. At the same time, the controller (CTR) generates pulse width modulated signals (CPWM) for driving switches or current sources (Iq k, jk ) for modulating the LED groups (L k, j ). Particularly preferably, the current source transistors are switched on and off by these signals, whereby a pulse-width modulated current is generated.
  • According to the proposal, it is now advantageous if the device can be disassembled into suitable assemblies.
  • For this purpose, it comprises at least one control module (SB). This includes at least the said controller (CTR) with at least one data interface (DSC). Furthermore, it comprises at least the voltage converter (DCDC) having at least said output voltage (V sup ) with an output voltage value for supplying power to at least two LED groups (L k1, jk1 , L k2, jk2 ) of the plurality of LED groups (L k , j ). As described above, the output voltage value of the output voltage (V sup ) of this voltage converter (DCDC) is controlled by this controller (CTR) by means of the control signal (R v ). becomes;
    The proposed device comprises a plurality of LED assemblies (LB k , with 1 ≤ k ≤ m). Each of the LED modules (LB k ) has at least one control IC (IC k, lk , with 1 ≤ k ≤ m and 1 ≤ l k ≤ o k ). The control ICs (IC k, lk ) are each assigned to a specific LED group (L k, j , with 1 ≦ k ≦ m and 1 ≦ j ≦ n m ). The control IC (IC k, lk ) has assigned to each associated LED group (L k, j ) at least one of the respective LED group (L k, j ) associated current source (Iq k, j , with 1 ≤ k ≤ m and 1 ≤ j ≤ n m ). The control IC (IC k, lk ) has at least one data interface (DSS k, lk , with 1 ≦ k ≦ m and 1 ≦ l k ≦ o k ). This data interface (DSS k, lk ) is connected via at least one data line (DL k, lk , with 1 ≦ k ≦ m and 1 ≦ l k ≦ o k ) to at least the data interface (DSC) of the at least one controller (CTR) Control board (SB) connected.
  • The device preferably has at least one LED group (L k, j ). The electrical current through preferably each of these LED groups (L k, j ) is determined in proper operation by the associated current source (Iq k, j ) of the associated control IC (IC k, lk ). In doing so, a current source voltage (V Qk, jk ) drops across the respective current source (Iq k, j ). An LED group voltage then drops across the respective LED group (L k, j ).
  • The device preferably has detection devices (M Lk, jk , with 1 ≦ k ≦ m and 1 ≦ j k ≦ n k ) for detecting LED group voltage values (V Lk, jk , with 1 ≦ k) in each LED assembly (LB k ) ≤ m and 1 ≤ j k ≤ n k ) of the LED group voltages.
  • Likewise, the proposed device in preferred each LED assembly (LB k ) detecting devices (M Qk, jk , with 1 ≤ k ≤ m and 1 ≤ j k ≤ n k ) for detecting current source voltage values (V Qk, jk , with 1 ≤ k ≤ m and 1 ≤ j k ≤ n k ) of the power source voltages.
  • Furthermore, the LED module has means (DSC) for transmitting the detected group LED voltage values (V Lk, jk ) and / or current source voltage values (V Qk, jk ) to the control module (SB) via the data interface (DSSk , lk ) of the respectively associated control ICs (IC k, lk ). The supply terminal for supplying the LED module (LB k, j ) with electrical energy is directly or indirectly connected to the voltage converter (DCDC) and is supplied by the latter with the output voltage (V sup ) of the voltage converter (DCDC).
  • The controller (CTR) of the control module (SB) receives at least one LED group voltage value (V Lk, jk , with 1 ≦ k ≦ m and 1 ≦ j k ≦ n k ) by means of wired or wireless data transmission from at least one of the LED assemblies ( LB k ). It is also sufficient if the controller (CTR) of the control module (SB) receives at least one power source voltage value (V Qk, jk ) from at least one of the LED modules (LB k ).
  • This transmission can be wired and wireless. In addition to the data transmission via star-shaped or serially chain-shaped buses, the transmission via the supply voltage line comes into question in order to save wiring costs. It is important that the complex internal resistance of the voltage converter (DCDC) and the current sources (Iq k, jk ) in the frequency range of the data signal are sufficiently high, so that the data signal is not short-circuited or over-attenuated.
  • Especially in the case of a wireless transmission of the detected voltage values (V Lk, jk , with 1 ≦ k ≦ m and 1 ≦ j k ≦ n k ; V Qk, jk , with 1 ≦ k ≦ m and 1 ≦ j k ≦ n k ) it is important that the controller system can not be disturbed from the outside. It is therefore important that the LED modules (LB k ) or the control ICs (IC k, lk ) located on them, log on to the controller (CTR) and authenticate there. Voltage values (V Lk, jk , with 1 ≦ k ≦ m and 1 ≦ j k ≦ n k ; V Qk, jk , with 1 ≦ k ≦ m and 1 ≦ j k ≦ n k ) of unauthenticated LED assemblies (LB k ) or control ICs (IC k, lk ) are not used for the regulation of the supply voltage (V sup ) and discarded. Preferably, the authentication is repeated at regular intervals.
  • Interference due to EMC can be intercepted by a redundant transmission of the voltage values from the LED modules (LB k ) to the control module (SB).
  • The controller (CTR) then sets the output voltage value of the output voltage (V sup ) of the voltage converter (DCDC) in dependence
    • a. of at least one LED group voltage value (V Lk, jk ), preferably the second largest LED group voltage value (V Lk, jk ) or
    • b. at least one LED group voltage value (V Lk, jk ) and at least one power source voltage value (V Qk, jk ), preferably the second largest group LED voltage value (V Lk, jk ) and also preferably the second lowest power source voltage value (V Qk, jk ) or
    • c. of at least two power source voltage values (V Qk1, jk1 , V Qk2, jk2 ), preferably the second lowest power source voltage value (V Qk, jk ).
  • In an important variant of the proposal, the controller (CTR) of the control module (SB) receives a number of at least three power source voltage values (V Qk1, j1 , V Qk2, j2 , V Qk3, j3 ) of at least two LED modules (LB k1 , 1 ≤ k 1 ≤ m; L k2 , where 1 ≤ k 2 ≤ m). In this case, the controller (CTR) of the control board (SB) preferably discards at least one of the at least three power source voltage values (V Qk1, j11 ; V Qk2, j2 ; V Qk3, j3 ). The controller (CTR) then uses, as previously described, the at least one reduced number of at least two remaining power source voltage values (eg, V Qk1, j1 ; V Qk2, j2 ) of the original at least three power source voltage values (V Qk1, j1 ; V Qk2, j2 ; V Qk3, j3 ) as previously described.
  • The controller (CTR) then adjusts the output voltage value of the output voltage (V sup ) of the voltage converter (DCDC) as a function of the remaining at least two residual power source voltage values (V Qk1, j1 , V Qk2, j2 ) which have been reduced by at least one.
  • List of figures
  • 1 shows a device according to the prior art.
  • 2 shows an LED assembly with detection devices for the voltage drop across the power sources.
  • 3 shows an LED assembly with detection devices for the voltage drop across the LED groups.
  • 4 shows an LED assembly with detection devices for the voltage drop across the LED groups and the power sources for a star-connected data bus.
  • 5 shows an exemplary interconnection of two LED modules with four LED groups and two control IC per LED group with a control module via a star-shaped data bus
  • 6 shows an LED assembly with detection devices for the voltage drop across the LED groups and the power sources for a data bus interconnected in a linear sequence.
  • 7 Shows an exemplary interconnection of two LED modules with four LEDs each Groups and two control IC per LED group with a control module via interconnected in linear sequence data bus.
  • 8th equals to 6 with the difference that the transmission of the detected voltage values (V Qk, jk , V Lk, jk ) takes place by means of a data transmission via the supply voltage line.
  • 9 equals to 7 with the difference that the transmission of the detected voltage values (V Qk, jk , V Lk, jk ) takes place by means of a data transmission via the supply voltage line.
  • 10 Corresponds to Figures 6 and 8 with the difference that the transmission of the detected voltage values (V Qk, jk ; V Lk, jk ) by means of a wireless data transmission.
  • 11 corresponds to the figures 7 and 9 with the difference that the transmission of the detected voltage values (V Qk, jk ; V Lk, jk ) takes place by means of a wireless data transmission.
  • Description of the figures
  • Fig. 1
  • 1 shows schematically and simplified a device according to the cited prior art. A voltage converter (DCDC) converts the non-drawn operating voltage of the vehicle, which is a DC voltage, into an output voltage (V sup ) having an output voltage value that typically deviates from the voltage value of the operating voltage, typically at smaller voltage levels. In this case, the controllable voltage converter (DCDC) releases the energy taken from the operating voltage network of the motor vehicle as electric current. This output current of the voltage converter (DCDC) flows through the n LED groups (L 1 , L 2 , ... L j , ... L n ). It splits up on the partial currents through these LED groups (L 1 , L 2 , ... L j , ... L n ). The current through the respective LED group (L j , with 1 ≤ j ≤ n) is in this case by one, the respective LED group (L j ) associated current source (Iq 1 , Iq 2 , ... Iq j ,. .. Iq n ) is set. The setting is either fixed or programmable or adjustable. In doing so, a current source voltage drops via the assigned current source (Iq j , where 1≤j≤n). This voltage value is measured as a detected voltage value (V Qj , with 1 ≦ j ≦ n) by a detection device (M Qj , with 1 ≦ j ≦ n) assigned to this current source (Iq j ) and forwarded for control. A circuit (Min) for detecting this minimum of the voltage values (V Qj ) of the voltage drops across the current sources (Iq j ) then determines the minimum value of these voltage values (V Qj ) of the voltage drops across the current sources (Iq j ) and outputs that value to the Controller (CTR) continues. This then calculates the control signal (R v ) on the basis of this selected value. The voltage converter (DCDC) generates the output voltage (V sup ) in response to this control signal (R v ), thereby closing the control loop. Regulating the minimum of the voltage drops across the current sources (Iq j ) ensures that all current sources are within the permissible operating range and thus all LED groups (LB 1 , LB 2 , ... LB j , ... LB n ) are supplied with the predetermined electrical current and at the same time the output voltage (V sup ) of the voltage converter (DCDC) is set so that no unnecessary further voltage drop across the current sources (Iq 1 , Iq 2 , ... Iq j , .. Iq n ) occurs.
  • Fig. 2
  • 2 shows schematically and simplified a k-th LED assembly (LB k ) with 1 ≤ k ≤ m, where m is the number of LED assemblies in the considered lighting system. The module is supplied with electrical energy via the supply voltage line, which can be connected to the output voltage (V sup ) of the voltage converter. The supply voltage is connected to all n k LED groups (L k, jk ) (with 1 ≤ j k ≤ n k ). As a result, the LED groups (L k, jk ) of the k th LED module (L k ) are flowed through by a specific electrical current (I k, jk ) (with 1 ≦ j k ≦ n k ) in proper operation. This is assigned by the n k current sources (Iq k, jk ) (with 1 ≦ j k ≦ n k ), each of each of a respective LED group (L k, jk ) of the k th LED assembly (LB k ) are set according to a default value eg by a control IC controller (ICCTR k, 1k ). The corresponding lines to this setting are not shown for clarity in this and the following figures. In the example of 2 For example, all the LED groups (L k, jk ) are driven by a single control IC (IC k, 1k ) of the k th LED package (LB k ). This control IC (IC k, lk ) comprises the adjustable current sources (Iq k, jk ) and the detection devices (M Qk, jk ) associated with the current sources (Iq k , jk ) for detecting the voltage value (V Qk, jk ) of the respective one Voltage drop across the respective power source (Iq k, jk ). The current sources (Iqk , jk ) could also be split among several control ICs. Each control IC would then preferably have its own control IC controller (ICCTR k, 1k ). In general, therefore, an LED assembly (LB k ) o k control ICs (IC k, lk ) (with 1 ≤ l k ≤ o k ) include on then the n k current sources for setting the n k currents (I k, jk ) for the n k LED groups (L k, jk ) of the k th LED assembly (L k ). In the example of 2 For example, an exemplary analog-to-digital converter (ADC k, 1k ) is provided within the single control IC (ICk , 1k ) of this example. This converts the voltage values (V Qk, jk ) of the respective voltage drop via the respective current source (Iq k, jk ) into values which the control IC Controller (ICCTR k, 1k ) to the controller (CTR) of not shown in this figure control module (SB) sends. This is done by a data interface (DSS k, 1k ) of the exemplary first control IC (IC k, 1k ). In the example of this figure, a star-shaped interconnection of the data interfaces (DSS k, 1k ) with the data interface (DSC) of the controller (CTR) of the control module (SB) via the data bus (DB) is provided.
  • Fig. 3
  • 3 largely corresponds to the 2 with the difference that now the voltage drops across the LED groups (L k, jk ) by detection devices (M Lk, jk ) for detecting the voltage value (V Lk, jk ) of the respective voltage drop across the respective LED groups (L k, jk ) in the k-th LED module (L k ) are detected.
  •  Fig. 4
  • 4 corresponds to the combination of FIGS. 2 and 3. Voltage drops across the LED groups (L k, jk ) are now detected by detection devices (M Lk, jk ) for detecting the voltage value (V Lk, jk ) of the respective voltage drop across the respective LED. Groups (L k, jk ) which in the exemplary single control IC (IC k, 1k ) of the k th LED assembly (L k ) and voltage drops across the current sources (Iq k, jk ) by detection devices (M Qk, jk ) for detecting the voltage value (V Qk, jk ) of the respective voltage drop across the respective current sources (Iq k, jk ). The detection devices (M Lk, jk ) for detecting the voltage value (V Lk, jk ) of the respective voltage drop across the respective LED groups (L k, jk ) are shown in the exemplary single control IC (IC k, 1k ) of the k LED assembly (L k ) for the supply of the LED groups (L k, jk ) of the k-th LED assembly (L k ) provided.
  • Fig. 5
  • 5 shows an exemplary overall structure of such a lighting device. For simplicity, only two LED modules (LB 1 , LB 2 ) are shown here by way of example (that is to say here m = 2, for example). However, the proposal deals with any number of m LED assemblies (LB k ). Each of the two exemplary LED assemblies (LB 1 , LB 2 ) has two control ICs each (IC 1.1 , IC 1.2 , IC 2.1 , IC 2.2 ). In this example, the data bus (DB) is arranged in a star shape. The control ICs (IC 1,1 , IC 1,2 , IC 2,1 , IC 2,2 ) typically act as slaves of the controller (CTR) located in the control board (SB) and typically the bus master is. The proposal also includes solutions with any number o k of control ICs (IC k, lk ) (with 1 ≤ k ≤ n and 1 ≤ l ≤ o k ), where the number o k of the control ICs (IC k, lk ) per LED module (LB k ) may vary from LED module to LED module. In the example of 5 For each control IC (IC 1,1 , IC 1,2 , IC 2,1 , IC 2,2 ), the electrical currents (I 1,1 , I 1,2 , I 1,3 , I 1,4 , I 2.1 , I 2.2 , I 2.3 , I 2.4 ) for every two LED groups (L 1.1 , L 1.2 , L 1.3 , L 1.4 , L 2, 1 , L 2,2 , L 2,3 , L 2,4 ) associated with this control IC (IC 1,1 , IC 1,2 , IC 2,1 , IC 2,2 ) by this control -IC (IC 1.1 , IC 1.2 , IC 2.1 , IC 2.2 ).
  • The LED groups (L 1,1 , L 1,2 , L 1,3 , L 1,4 ) of the first LED assembly (LB 1 ) are preferably within the LED assembly with a first connection with each other and from there preferably to the output voltage (V sup ) of the voltage converter (DCDC) in the control board (SB). With the second terminal, they are connected to the respective power source within the associated control IC (IC 1,1 , IC 1,2 ) of the first LED package (LB 1 ).
  • The LED groups (L 2.1 , L 2.2 , L 2.3 , L 2.4 ) of the second LED assembly (LB 2 ) are preferably within the LED assembly with a first connection with each other and from there with the output voltage (V sup ) of the voltage converter (DCDC) in the control board (SB) connected. With the second terminal, they are connected to the respective power source within the associated control IC (IC 2 , 1 , IC 2, 2 ) of the second LED package (LB 2 ).
  • Within the control module (SB), the data interface (DSC) of the controller (CTR) receives the data from the data bus (DB) and transmits it to the controller (CTR). This is calculated from the voltage values (V L1,1 , V L1,2 , V L1,3 , V L1 ) received from the control ICs (IC 1,1 , IC 1,2 , IC 2,1 , IC 2,2 ) , 4 , V L2,1 , V L2,2 , V L2,3 , V L2,4 ,) of the respective voltage drops across the respective LED groups (L 1,1 , L 1,2 , L 1,3 , L 1.4 , L 2.1 , L 2.2 , L 2.3 , L 2.4 ) and / or from the control ICs (IC 1.1 , IC 1.2 , IC 2.1 , IC 2,2 ) received voltage values (V Q1,1 , V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2,4 ) of the respective Voltage drops across the respective current source (Iq 1,1 , Iq 1,2 , Iq 1,3 , Iq 1,4 , Iq 2,1 , Iq 2,2 , Iq 2,3 , Iq 2,4 ) within the control ICs (IC 1.1 , IC 1.2 , IC 2.1 , IC 2.2 ) the control value of the control signal (R v ). With this control signal (R v ) the controller (CTR) regulates the output voltage (V sup ) of the voltage converter (DCDC) so that all voltage drops (V Q1,1 , V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2,4 ,) across all current sources (Iq 1,1 , Iq 1,2 , Iq 1,3 , Iq 1,4 , Iq 2,1 , Iq 2,2 , Iq 2,3 , Iq 2,4 ) within the control ICs (IC 1,1 , IC 1,2 , IC 2,1 , IC 2,2 ) a sufficient height above a respective minimum voltage drop for the have proper operation and at the same time the output voltage (V sup ) of the voltage converter (DCDC) is minimized so that no unnecessary energy in the control ICs (IC 1,1 , IC 1,2 , IC 2,1 , IC 2,2 ) excessively high voltage drops (V Q1,1 , V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2,4 ,) via the current sources ( Iq 1,1 , Iq 1,2 , Iq 1,3 , Iq 1,4 , Iq 2,1 , Iq 2,2 , Iq 2,3 , Iq 2,4 ) is lost and this heats up. However, in contrast to the prior art, the controller (CTR) does not control the minimum of these voltage values of the voltage drops (V Q1,1 , V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V) Q2,2 , V Q2,3 , V Q2,4 ,) via the current sources (Iq 1,1 , Iq 1,2 , Iq 1,3 , Iq 1,4 , Iq 2,1 , Iq 2,2 , Iq 2,3 , Iq 2,4 ), but preferably discards the lowest value and determines from the remaining voltage values the control value of the control signal (R v ). For example, one method could be the second lowest value of the voltage drops (V Q1,1 , V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2,4,) to the current sources (Iq 1.1, 1.2 Iq, Iq 1.3, 1.4 Iq, Iq 2.1, 2.2 Iq, Iq 2.3, 2.4 Iq) use this value by a predetermined offset (V off ) to reduce, and to use the thus obtained corrected voltage value as the basis for the calculation of the control value. Such a construction is thus fault-tolerant to single errors, in contrast to the prior art. If multiple errors are to be compensated up to a number N, then the N lowest voltage values of the voltage drops (V Q1,1 , V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2,4 ,) via the current sources (Iq 1,1 , Iq 1,2 , Iq 1,3 , Iq 1,4 , Iq 2,1 , Iq 2,2 , Iq 2,3 , Iq 2.4 ) are discarded. Obviously, N must always be at least smaller by the number 1 than the number n (here by way of example n = 8) of the LED groups (L 1,1 , L 1,2 , L 1,3 , L 1,4 , L 2, 1 , L 2.2 , L 2.3 , L 2.4 ). Instead of the control of the second smallest voltage value of the voltage drops (V Q1,1 , V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2,4 ,) via the current sources (Iq 1,1 , Iq 1,2 , Iq 1,3 , Iq 1,4 , Iq 2,1 , Iq 2,2 , Iq 2,3 , Iq 2,4 ) can also be a scheme based on a weighted or unweighted average of the voltage values of the voltage drops (V Q1,1 , V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2 , 4 ,), but then preferably the smallest voltage value of these voltage values (V Q1,1 , V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2 , 4 ,) should not be taken into account for avoiding errors and the abovementioned predetermined offset (V off ) is again subtracted from the mean value thus determined before it is used to determine the control value of the control signal (R v ). The offset (V off ) is preferably adjustable or programmable.
  • In addition to regulation based on the voltage values of the voltage drops (V Q1,1 , V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2,4 ) via the current sources (Iq 1,1 , Iq 1,2 , Iq 1,3 , Iq 1,4 , Iq 2,1 , Iq 2,2 , Iq 2,3 , Iq 2,4 ) is also a regulation based the voltage values (V L1,1 , V L1,2 , V L1,3 , V L1,4 , V L2,1 , V L2,2 , V L2,3 , V L2,4 ) of the respective voltage drops across the respective LED Groups (L 1.1 , L 1.2 , L 1.3 , L 1.4 , L 2.1 , L 2.2 , L 2.3 , L 2.4 ) possible. Here it makes sense to set the greatest voltage value of the voltage values (V L1,1 , V L1,2 , V L1,3 , V L1,4 , V L2,1 , V L2,2 , V L2,3 , V L2, 4 ) of the respective voltage drops across the respective LED groups (L 1,1 , L 1,2 , L 1,3 , L 1,4 , L 2,1 , L 2,2 , L 2,3 , L 2, 4 ) before determining the control value of the control signal (R v ) to delete. This is done in the example of 5 through the controller (CTR). A voltage vector reduction unit (VDVM) whose task is to reduce the dimension of the voltage vector of the voltage drops (V L1,1 , V L1,2 , V L1,3 , V L1,4 , V L2,1 , V L2,2 , V L2 , 3 , V L2,4 ) (Here is the dimension 8), is in the example of 5 not shown, as the controller (CTR) performs this function. In this respect, the controller (CTR) is at the same time the voltage vector reduction unit (VDVM). The control value of the control signal can again be determined, for example, on the basis of the weighted or unweighted average of the remaining values of the voltage drops (V L1,1 , V L1,2 , V L1,3 , V L1,4 , V L2,1 , V L2,2 , V L2.3 , V L2.4 ) after canceling the largest voltage drop value . Alternatively, for example, the control would be based on the second largest voltage value of the voltage drops (V L1,1 , V L1,2 , V L1,3 , V L1,4 , V L2,1 , V L2,2 , V L2,3 , V L2,4 ) conceivable.
  • Finally, a mixed control is also based on several voltage values of the voltage drops (V Q1,1 , V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2 , 4 ) via the current sources (Iq 1,1 , Iq 1,2 , Iq 1,3 , Iq 1,4 , Iq 2,1 , Iq 2,2 , Iq 2,3 , Iq 2,4 ) and several at the same time Voltage values of the voltage drops (V L1,1 , V L1,2 , V L1,3 , V L1,4 , V L2,1 , V L2,2 , V L2,3 , V L2,4 ) via the LED groups ( L 1.1 , L 1.2 , L 1.3 , L 1.4 , L 2.1 , L 2.2 , L 2.3 , L 2.4 ) possible. Preferably, the voltage vector dimension reduction unit (VDVM) reduces the intial voltage value vector (V Q1,1 , V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2, 4 , V L1,1 , V L1,2 , V L1,3 , V L1,4 , V L2,1 , V L2,2 , V L2,3 , V L2,4 ) = Vec), here one dimension of 16 has two dimensions by deleting the smallest voltage value of the voltage drops (V Q1,1 , V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2,4 ) via the current sources (Iq 1,1 , Iq 1,2 , Iq 1,3 , Iq 1,4 , Iq 2,1 , Iq 2,2 , Iq 2,3 , Iq 2,4 ) and simultaneous cancellation of the highest voltage value of the voltage drops (V L1,1 , V L1,2 , V L1,3 , V L1,4 , V L2,1 , V L2,2 , V L2,3 , V L2,4 ) over the LED groups (L 1,1 , L 1,2 , L 1,3 , L 1,4 , L 2,1 , L 2,2 , L 2,3 , L 2,4 ). For the sake of clarity, we assume here that this is the values V L1,1 and V Q1,1 because, for example, the current source (Iq 1,1 ) is short-circuited and therefore no voltage (V Q1,1 ) via the current source (Iq 1 , 1 ) drops or this voltage (V Q1,1 ) is too small or the voltage drop (V L1,1 ) across the LED group (L 1,1 ) is too large. In that case, here the controller (CTR) in its role as voltage vector dimensional reduction unit (VDVM) would cancel these two values (V L1,1 , V Q1,1 ) to obtain the reduced voltage value vector ((V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2,4 , V L1,2 , V L1,3 , V L1,4 , V L2,1 , V L2,2 , V L2,3 , V L2,4 ) = VecR), which has a dimension of 14 here. Here then the controller (CTR) can be calculated on the basis of this reduced voltage value vector ((V Q1,2 , V Q1,3 , V Q1,4 , V Q2,1 , V Q2,2 , V Q2,3 , V Q2,4 , V L1,2 , V L1,3 , V L1,4 , V L2,1 , V L2,2 , V L2,3 , V L2,4 ) = VecR), eg by weighted averaging the control value of the control signal (R v ) produce. Also is it is conceivable to convert the voltage values of this reduced voltage value vector (VecR) by an affine mapping into a modified voltage value vector (VecM) and then weighted or unweighted the averaging in order then to generate the control value of the control signal (R v ).
  • Fig. 6
  • 6 equals to 4 with the difference that now the connection to the no longer drawn subsequent LED assembly (LB (k + 1) ) via an additional second data interface (DSS Bk, 1 ) and a second data bus (DB 2 ) is established and the connection to the preceding, not shown LED assembly (LB (k-1) ) or not shown control assembly (SB) via a first data interface (DSS Ak, 1 ) and a first data bus (DB 1 ) is produced. A direct communication between the subsequent LED groups on the one hand and the control module or preceding LED modules on the other side is then not possible.
  • Fig. 7
  • 7 equals to 5 with the difference that now control ICs with data interfaces accordingly 6 be used. Within the LED assemblies (LB 1 , LB 2 ) the data connection between the control ICs (IC 1,1 , IC 1,2 ) of the first LED assembly (LB 1 ) and between the control ICs (IC 1, 1 , IC 1,2 ) of the second LED module (LB 2 ) are produced by internal data buses (DB i1 , DB i2 ). The first data bus (DB 1 ) connects the first control IC (IC 1,1 ) of the first LED module (LB 1 ) to the data interface (DSC) of the control module. The second data bus (DB 2 ) connects the second control IC (IC 1,2 ) of the first LED assembly to the first control IC (IC 2,1 ) of the second LED assembly (L 2 ). On the one hand, this construction enables the application of auto-addressing methods, such as from the EP 1 490 772 B1 known. Also, such a lighting device can be located on a flexible circuit carrier and configured configurable. In this connection, please refer to the pending German patent applications EN 10 2017 106 811.2 . DE 10 2017 106 812.0 . DE 10 2017 106 813.9 referring to a configurable LED chain. Their disclosure content is an integral part of this disclosure.
  • Fig. 8
  • equals to 6 with the difference that the transmission of the detected voltage values (V Qk, jk , V Lk, jk ) takes place by means of a data transmission via the supply voltage line (V sup ). For this purpose, the simplest illustrated k th LED assembly (LB k ) on a data interface (DSSPL k, 1 ), the data of the determined voltage values (V Qk, jk , V Lk, jk ) via the supply voltage line (V sup ) the control module (SB) can transmit. In this example, the detected voltage values (V Qk, jk ) for controlling the supply voltage (V sup ) are transmitted via the supply voltage line (V sup ) from the LED modules (LB k ) to the control module (SB) where the supply voltage setting (V sup ) depending on these data. Furthermore, an encryption of the transmission is particularly useful here to make it difficult for an attacker to manipulate the transmitted data. For this purpose, the control IC controller (ICCTR k, lk ) encrypts the determined voltage values (V Lk, jk , Vkk, jk ) and sends them to the controller (CTR) of the control module (SB). The controller of the control module (SB) decrypts this data to extract the) the determined voltage values (V Lk, jk , V Qk, jk ) and thus the voltage vector (Vec). On the basis of this, the controller (CTR) then regulates the output voltage (V sup ) of the voltage converter (DCDC).
  • If, for whatever reason, the data connection is too disturbed or even interrupted between the controller (CTR) and all control IC controllers (ICCTR k, lk ), the controller preferably regulates the output voltage (V sup ) of the voltage converter (DCDC) an emergency value.
  • Fig. 9
  • equals to 7 with the difference that the transmission of the detected voltage values (V Qk, jk , V Lk, jk ) takes place by means of a data transmission via the supply voltage line (V sup ). The control module (SB) has a data interface (DSCPL) of the controller (CTR) for the data transmission via the supply voltage line (V sup ). In this example, the detected voltage values (V Qk, jk ) for controlling the supply voltage (V sup ) are transmitted via the supply voltage line (V sup ) from the LED modules (LB k ) to the control module (SB) where the supply voltage setting (V sup ) depending on these data.
  • Fig. 10
  • Corresponds to Figures 6 and 8 with the difference that the transmission of the detected voltage values (V Qk, jk ; V Lk, jk ) by means of a wireless data transmission. For this purpose, the simplest illustrated k th LED assembly (LB k ) on a wireless data interface (DSSWL k, 1 ), the data of the determined voltage values (V Qk, jk , V Lk, jk ) wirelessly to the control module (SB) can transfer. This can wirelessly wireless transmission but also an acoustic, optical or other kind of wireless Designate transmission. In this example, the detected voltage values (V Lk, jk , V Qk, jk ) for controlling the supply voltage (V sup ) are transmitted wirelessly from the LED modules (LB k ) to the control module (SB), where the adjustment of the supply voltage ( V sup ) depending on these data. In this type of transmission, authentication of the LED modules (LB k ) and / or the control ICs (IC k, jk ) is particularly preferred. The detected voltage values (V Lk, jk , V Qk, jk ) of unauthenticated LED assemblies (LB k ) and / or the control ICs (IC k, jk ) are preferably discarded. Since EMC interference can also occur, a redundant transmission is indicated. Furthermore, an encryption of the transmission is particularly useful here to make it difficult for an attacker to manipulate the transmitted data. For this purpose, the control IC controller (ICCTR k, lk ) encrypts the determined voltage values (V Lk, jk , Vkk, jk ) and sends them to the controller (CTR) of the control module (SB). The controller of the control module (SB) decrypts this data to extract the) the determined voltage values (V Lk, jk , V Qk, jk ) and thus the voltage vector (Vec). On the basis of this, the controller (CTR) then regulates the output voltage (V sup ) of the voltage converter (DCDC).
  • If, for whatever reason, the data connection is too disturbed or even interrupted between the controller (CTR) and all control IC controllers (ICCTR k, lk ), the controller preferably regulates the output voltage (V sup ) of the voltage converter (DCDC) an emergency value.
  • Fig. 11
  • corresponds to the figures 7 and 9 with the difference that the transmission of the detected voltage values (V Qk, jk ; V Lk, jk ) takes place by means of a wireless data transmission. The control module (SB) has a wireless data interface (DSCWL) of the controller (CTR) for wireless data transmission. In this example, the detected voltage values (V Qk, jk ) for controlling the supply voltage (V sup ) are transmitted wirelessly from the LED assemblies (LB k ) to the control assembly (SB) where the adjustment of the supply voltage (V sup ) is dependent from this data. In this case, a wireless transmission but also an acoustic, optical or other type of wireless transmission may refer to wirelessly. In this example, the detected voltage values (V Lk, jk , V Qk, jk ) for controlling the supply voltage (V sup ) are transmitted wirelessly from the LED modules (LB k ) to the control module (SB), where the adjustment of the supply voltage ( V sup ) depending on these data. In this type of transmission, authentication of the LED modules (LB k ) and / or the control ICs (IC k, jk ) is particularly preferred. The detected voltage values (V Lk, jk , V Qk, jk ) of unauthenticated LED assemblies (LB k ) and / or the control ICs (IC k, jk ) are preferably discarded. Since EMC interference can also occur, a redundant transmission is indicated. Furthermore, an encryption of the transmission is particularly useful here to make it difficult for an attacker to manipulate the transmitted data. For this purpose, the control IC controller (ICCTR k, lk ) encrypts the determined voltage values (V Lk, jk , Vkk, jk ) and sends them to the controller (CTR) of the control module (SB). The controller of the control module (SB) decrypts this data to extract the) the determined voltage values (V Lk, jk , V Qk, jk ) and thus the voltage vector (Vec). On the basis of this, the controller (CTR) then regulates the output voltage (V sup ) of the voltage converter (DCDC).
  • If, for whatever reason, the data connection is too disturbed or even interrupted between the controller (CTR) and all control IC controllers (ICCTR k, lk ), the controller preferably regulates the output voltage (V sup ) of the voltage converter (DCDC) an emergency value.
  • glossary
  • authentication
  • Authentication is the verification (verification) of the claimed property of an LED assembly (LB k ) or a control IC (IC k, lk ) to be part of the device. As a method of authentication, for example, the exchange of keys or secret passwords in question. Authentication includes both the authorization check itself and the storage of the authentication result. The authentication preferably has, for example, the authorization of the voltage values (V Qk, jk , V Lk, jk ) transmitted by this authenticated LED module (LB k ) or this authenticated control IC (IC k, lk ) as input parameter for the regulation of the output voltage (V sup ) result.
  • Wireless
  • For the purposes of this disclosure, wireless data transmission means transmission by means of optical, acoustic or electromagnetic (in particular by means of high-frequency, inductive and capacitive) methods. Very particularly preferred is the use of the LEDs for the optical transmission itself. In this case, the current sources (Iqk, 1 , Iq k, 2 , ... Iq k, j , ... Iq k, n ) of the k th LED Assembly (LB k ) in cooperation with the control IC controller (ICCTR k, lk ) of the lk th control ICs (IC k, lk ) of the k th LED assembly (LB k ) as a data interface (DSSWL k, lk ) of the lk th control IC (IC k, 1lk , with 1 ≤ k ≤ m and with 1 ≤ l k ≤ o k ) of the k th LED board (LB k , with 1 ≤ k ≤ m) used for wireless data transmission. In this case, the data interface (DSCWL) of the controller (CTR) for wireless data transmission is realized, for example, by a photodiode. If a bidirectional transmission is to take place, then it makes sense, although the data interfaces (DSSWL k, lk ) of the lk th control ICs (IC k, 1lk , with 1 ≤ k ≤ m and with 1 ≤ l k ≤ o k ) of the respective k-th LED assembly (LB k , with 1 ≤ k ≤ m) for the wireless data transmission are equipped with photodiodes. Possibly. Therefore, it is advantageous the transmission path from the control ICs (IC k, lk ) to the controller (CTR) via the LED groups (L k, jk ) and the reception path from the controller (CTR) to the control ICs (IC k, lk ) via a separate wireless data interface (DSSWL k, lk ) of the lk th control ICs (IC k, 1lk , with 1 ≤ k ≤ m and with 1 ≤ l k ≤ o k ) of the respective k th LED assembly ( LB k , with 1 ≤ k ≤ m), which then has the said photodiode. Possibly. can be used for the shipment both in the LED modules (LB k ) and in the control module (SB) and separate IR LEDs, which may optionally have its own power supply.
  • sensing devices
  • The detection devices measure voltage drops in the sense of this disclosure. Preferably, these are differential amplifiers which are coupled to an analog to digital converter.
  • majority
  • A plurality is a number greater than 1.
  • power source
  • A current source in the sense of this disclosure behaves like a real transistor current source. This means that it stabilizes the current in its intended operating range and limits it to a specific current interval. If there is no active voltage from the outside via such a power source, no current will flow because the power source is not within its intended operating range. Therefore, then no or only a very low voltage across the power source falls within the meaning of this proposal.
  • Proper operation
  • A proper operation of a circuit part is present when all operating parameters are within the intended operating tolerances or the circuit part can fulfill its intended function. In a transistor power source, a proper operation is especially not present when no sufficient voltage drops across the current source transistor.
  • PWM
  • For the purposes of this document, PWM is to be understood as meaning not only the pulse-width modulation but also any type of pulse modulation that can be used for the brightness adjustment. Here are from the state of the art, for example, call: PFM, PCM, PDM, COT, PWM, etc. and their randomized variants.
  • PWM period
  • A PWM period here is to be understood as the time interval between a first rising edge and a directly following second rising edge or alternatively the time interval between a first falling edge and a directly following second falling edge.
  • Float
  • The term "drive" is used in the sense of this proposal so that the current source significantly determines the current flow through the respective LED group. That is, an increase of the operating voltage (V sup ) by 10% results in an increase of the current source current by less than 2.5%, better less than 1%, better less than 0.5%, better less than 0.25%, better less as 0.1%, better less than 0.05%.
  • LIST OF REFERENCE NUMBERS
    • ADC k, 1
      Analog-to-digital converter of the first control IC (IC k, 1 ) of the k th LED assembly (LB k ).
      ADC k, lk
      Analog-to-digital converter of the k l -en control IC (IC k, lk) of the k-th LED assembly (LB k).
      AP
      Operating point. The operating point is a reduced voltage vector (VecR) with a certain combination of voltage values, in which a consideration of the properties of the device or a measurement is made.
      B Lk1, jk1
      Evaluation value for the j k1- th detected voltage value (V Lk1, jk1 ) of a voltage drop across a j k1 -th LED group (L k1, jk1 ) of the k 1- th LED module (LB k1 ).
      B Lk2, jk2
      Evaluation value for the j k2- th detected voltage value (V Lk2, jk2 ) of a voltage drop across a j k2 -th LED group (L k2, jk2 ) of the k 2- th LED module (LB k2 ).
      B Qk1, jk1
      Evaluation value for the j k1- th detected voltage value (V Qk1, jk1 ) of a voltage drop across a j k1- th current source (Iq k1, jk1 ) of the k 1- th LED module (LB k1 ).
      B Qk2, jk2
      Evaluation value for the j k2- th detected voltage value (V Qk2, jk2 ) of a voltage drop across a j k2- th current source (Iq k2, jk2 ) of the k 2- th LED module (LB k2 ).
      CPWM
      control signals generated by the control IC (ICCTR k, lk ) for generating PWM signals for driving switches or current sources (Iq k, j , where 1 ≤ k ≤ m and 1 ≤ j ≤ nm) for modulating the LED groups (L k, j , with 1 ≦ k ≦ m and 1 ≦ j ≦ nm). The corresponding lines are not shown in the figures. Hereby, the respective control IC (ICCTR k, lk ) generates a PWM-modulated current source current (Iq k, jk ). This can be done by separate switches or the switching on and off of the current source transistors.
      CTR
      Controller. The controller generates the control signal (R v ) for adjusting the output voltage (V sup ) of the voltage converter (DCDC). The data transmission of the associated control values from the LED modules (LB k ) or From the control ICs (IC k, lk ) of the LED modules (LB k ) to the controller is preferably carried out electrically and wired wireless communication is also useful. The transmission is either directly to the controller (CTR) and / or indirectly to it, for example via the voltage vector diminution unit (VDVM). An optical, acoustic, magnetic or other wireless transmission of the control values is conceivable if the data transmission is sufficiently secure. For this purpose, an encryption of the data in the transmission from the control ICs (IC k, lk ) to the controller and an authentication of the control ICs (IC k, lk ) by the controller (CTR) makes sense. Furthermore, a redundant transmission makes sense. Here, for example, Hamming codes but also multiple transmissions and other methods of the prior art come into question. Also, transmission via power line communication between the control ICs (IC k, lk ) and the controller is conceivable. In that case the transmission is effected by a data signal modulated onto the supply voltage line for the supply voltage (V sup ). This has a data center frequency which, for example, results as the centroid of the supply voltage spectrum when the range of 0Hz to 100Hz in the spectrum is set to zero. The voltage converter control (DCDC) must then no longer attenuate the modulated data signal in the range of the data center frequency by a factor of 18 dB or 12 dB or 6 dB or 3 dB. In this case, the greater levels - ie the lower attenuation of the data signal - to give preference. In contrast, the current sources (Iq k, jk ) must attenuate current source current fluctuations in the data center frequency range by more than a factor of 18 dB or 12 dB or 6 dB or 3 dB. Here, the larger attenuations are preferable. This ensures that the data signal is not short-circuited by the current sources (Iq k, jk ) or the voltage converter (DCDC).
      DB
      Data bus for the transfer of data between the control module (SB) via the Data interface (DSC) of the controller (CTR) of the control module (SB) on the one hand and the control IC controllers (ICCTR k, lk ) of the respective l k th control ICs (IC k, lk ) within the respective k -th LED assembly (LB k ) by means of the data interface (DSS k, lk ) of the respective l k- th control ICs (IC k, lk ) within the respective k-th LED assembly (LB k ) on the other side ,
      DB 1
      first data bus for the transmission of data between the control module (SB) via the data interface (DSC) of the controller (CTR) of the control module (SB) on the one side and the control IC controller (ICCTR 1,1 ) of the first control unit ICs (IC 1,1 ) within the first LED module (LB 1 ) by means of the data interface (DSS 1,1 ) or first data interface
      (DSS A1,1 )
      of the first control IC (IC 1,1 ) within the first LED assembly (LB 1 ) on the other side.
      DB 2
      second data bus for the transfer of the data between the second control IC (IC 1,2 ) from the control IC controller (ICCTR 1,2 ) of the second control IC (IC 1,2 ) within the first LED assembly ( LB 1 ) by means of the data interface (DSS 1,2 ) of the second control IC (IC 1,2 ) within the first LED assembly (LB 1 ) on the one hand and the control IC controller (ICCTR 2.1 ) of the first control IC (IC 2.1 ) within the second LED assembly (LB 2 ) by means of the data interface (DSS 2.1 ) of the first control IC (IC 2.1 ) within the second LED assembly (LB 2nd ) on the other hand.
      DB 3
      third data bus for the transfer of the data between the third control IC (IC 1,2 ) from the control IC controller (ICCTR 1,2 ) of the second control IC (IC 2,2 ) within the second LED assembly ( LB 2 ) by means of the data interface (DSS 2,2 ) of the second control IC (IC 2,2 ) within the second LED assembly (LB 2 ) on the one hand and the control IC controller (ICCTR 3,1 ) of the no longer drawn first control IC (IC 3.1 ) within the no longer drawn third LED assembly (LB 3 ) by means of the data interface (DSS 3.1 ) of the first control IC (IC 3.1 ) within the third LED assembly (LB 3 ) on the other side.
      DB k
      kth data bus. If k = 1, reference is made to the description of the first data bus (DB 1 ). The kth data bus is for transferring the data between the o (k-1) -th control IC (IC (k-1), o (k-1) ) of the preceding (k-1) -th LED package (LB (k-1) ) and the first control IC (IC k, 1 ) of the k-th LED package (LB k ).
      DB i, (lk-1)
      (l k - 1) -th internal data bus. The (1 k -1) th data bus is used to transfer the data between the preceding (l k - 1) -th control IC (IC k, (lk-1) ) within the k-th LED assembly LED (LB k ) and the following l k- th control IC (IC k, lk ) within the k -th LED module LED (LB k ).
      DB i, lk
      l k -ter internal data bus. The l k th data bus used to transfer data between the l k -th control IC (IC k, lk) in the k-th LED package LED (LB k) and the following (l k + 1) -th Control IC (IC k, lk ) inside the k th LED assembly LED (LB k )
      DCDC
      controllable voltage converter which provides the output voltage (V sup ) for the active power supply of the LED groups (L k, j , where 1 ≤ k ≤ m and 1 ≤ j ≤ n m ) in dependence on the control value of the control signal (R v ).
      DSC
      Data interface of the controller (CTR).
      DSCPL
      Data interface of the controller (CTR) for data transmission via the supply voltage line (V sup ).
      DSCWL
      Data interface of the controller (CTR) for wireless data transmission.
      DSS k, 1
      Data interface of the first control IC (IC k, 1 , with 1 ≤ k ≤ m) of the k th LED assembly (LB k , with 1 ≤ k ≤ m);
      DSS Ak, 1
      first data interface of the first control IC (IC k, 1 , with 1 ≤ k ≤ m) of the k th LED module (LB k , with 1 ≤ k ≤ m). The first data interface establishes the data connection to the data interface (DSC) of the controller (CTR) on the control board (SB).
      DSS Ak, lk
      first data interface of the I k- th control IC (IC k, lk , with 1 ≤ k ≤ m and 1 ≤ l k ≤ o k ) of o k control ICs of the k th LED module (LB k , with 1 ≤ k ≤ m). The first data interface establishes the data connection to the data interface (DSC) of the controller (CTR) on the control board (SB) via the first data bus (DB 1 ) when the k-th LED board (L k ) is the first LED board ( L k ) is (ie k = 1), and in the other case, if the k-th LED assembly (L k ) is not the first LED assembly (LB k ) (ie k ≠ 1), the data connection to the second Data interface DSS Bk, (lk-1) of the preceding control IC (IC k, (lk-1) ) on the (l k - 1) -th internal data bus (DB i, (lk-1) ) of the k-th LED assembly (LB k ) or, if the l k- th control IC (IC k, lk ) is the first control IC of the k th LED assembly (LB k ), the data link to second data interface DSS B (k-1), o (k-1) of the o (k-1) -th control IC (IC k, o (k-1) ) of the preceding (k-1) -th LED Assembly (LB (k-1) ) over the k-th data bus (DB k ) ago.
      DSS Ak, (lk + 1)
      first data interface of the k-th within the LED assembly (LB k) the k l -th control IC (IC k, lk) subsequent control IC (IC k, (lk + 1)).
      DSS Bk, lk
      second data interface of the I k- th control IC (IC k, lk , with 1 ≤ k ≤ m and 1 ≤ l k ≤ o k ) of o k control ICs of the k th LED assembly (LB k , with 1 ≤ k ≤ m). The second data interface provides the data connection to the first data interface DSS Bk, (lk + 1) of the subsequent control IC
      (ICk , (lk + 1) )
      via the (l k ) -th internal data bus (DB i, lk ) of the k-th LED module (LB k ), if the lk-th control IC (IC k, lk ) does not satisfy the o k -te- Control IC (IC k, ok ) of the k th LED assembly (LB k ), or if the l k th control IC (IC k, lk ) is the o k te control IC (IC k, ok ) of the k th LED assembly (LB k ), the data connection to the first data interface DSS B (k + 1), 1 of the first control IC (IC k, 1 ) of the following (k + 1) - LED assembly (LB (k + 1) ) over the (k + 1) th data bus (DB (k + 1) ) ago.
      DSS Bk, (lk-1)
      second data interface of the inside of the k-th LED assembly (LB k) the k l -th control IC (IC k, lk) preceding control ICs (IC k, (lk-1)).
      DSS B (k-1), (ok-1)
      (o k - 1) -th data interface of within the (k-1) -th LED module (LB (k-1) ) the o k- th control IC (IC k, ok ) preceding control ICs (IC k, (ok-1) ).
      DSS k, lk
      Data interface of the l k- th control IC (IC k, lk , with 1 ≤ k ≤ m and 1 ≤ l k ≤ o k ) of the k th LED module (LB k , with 1 ≤ k ≤ m) with o k as number of control ICs (IC k, lk , with 1 ≤ k ≤ m and 1 ≤ l k ≤ o m ) of the k th LED assembly (LB k , with 1 ≤ k ≤ m)
      DSSPL k, 1
      Data interface of the first control IC (IC k, 1 , with 1 ≤ k ≤ m) of the k th LED assembly (LB k , with 1 ≤ k ≤ m) for the transmission of data via the supply voltage line (V sup );
      DSSWL k, 1
      Data interface of the first control IC (IC k, 1 , with 1 ≤ k ≤ m) of the k th LED assembly (LB k , with 1 ≤ k ≤ m) for wireless data transmission;
      DSSWL k, lk
      Data interface of the lk th control IC (IC k, 1lk , with 1 ≤ k ≤ m and with 1 ≤ l k ≤ o k ) of the k th LED assembly (LB k , with 1 ≤ k ≤ m) for wireless data transfer;
      I 1
      Current of the first current source (Iq 1 ), which flows through the first LED group (L 1 ) in proper operation.
      I 2
      Current of the second current source (Iq 2 ), which flows through the second LED group (L 2 ) in proper operation.
      I j
      Current of the jth current source (Iq j ) flowing through the jth LED group (L j ) in proper operation.
      I n
      Current of the n-th current source (Iq n ), which flows through the n-th LED group (L n ) in proper operation.
      I 1,1
      Current of the first current source (Iq 1,1 ) of the first LED assembly (LB 1 ), which flows through the first LED group (L 1,1 ) of the first LED assembly (LB 1 ) in proper operation.
      I 1,2
      Current of the second current source (Iq 1,2 ) of the first LED assembly (LB 1 ), which flows through the second LED group (L 1,2 ) of the first LED assembly (LB 1 ) in proper operation.
      I 1, j1
      Current of the j 1- th current source (Iq 1, j1 ) of the first LED assembly (LB 1 ), the j 1- th LED group (L 1, j1 ) of the first LED assembly (LB 1 ) in proper operation flows.
      I 1, n1
      Current of the n 1- th current source (Iq 1, n1 ) of the first LED assembly (LB 1 ), the n 1- th LED group (L 1, n1 ) of the first LED assembly (LB 1 ) in proper operation flows.
      I 2.1
      Current of the first current source (Iq 2.1 ) of the second LED assembly (LB 2 ), which flows through the first LED group (L 2.1 ) of the second LED assembly (LB 2 ) in proper operation.
      I 2,2
      Current of the second current source (Iq 2,2 ) of the second LED assembly (LB 2 ), which flows through the second LED group (L 2,2 ) of the second LED assembly (LB 2 ) in proper operation.
      I 2, j2
      Current of the j 2- th current source (Iq 2, j 2 ) of the second LED assembly (LB 2 ), the j 2- th LED group (L 2, j 2 ) of the second LED assembly (LB 2 ) in proper operation flows.
      I 2, n2
      Current of the n 2- th current source (Iq 2, n2 ) of the second LED assembly (LB 2 ), the n 2- th LED group (L 2, n2 ) of the second LED assembly (LB 2 ) in flows through proper operation.
      I k, 1
      Current of the first current source (Iq k, 1 ) of the k th LED assembly (LB k ), which flows through the first LED group (L k, 1 ) of the k th LED assembly (LB k ) in normal operation.
      I k, 2
      Current of the second current source (Iq k, 2 ) of the k th LED assembly (LB k ), which flows through the second LED group (L k, 2 ) of the k th LED assembly (LB k ) in normal operation.
      I k, jk
      Current of the j k- th current source (Iq k, jk ) of the k th LED assembly (LB k ), the j k -te LED group (L k, jk ) of the k th LED assembly (LB k ) flows through in proper operation.
      I k, nk
      Current of the n k- th current source (Iq k, nk ) of the k th LED assembly (LB k ), the n k- th LED group (L k, nk ) of the k th LED assembly (LB k ) flows through in proper operation.
      I m, 1
      Current of the first current source (Iq m, 1 ) of the m-th LED assembly (LB m ), which flows through the first LED group (L m, 1 ) of the m-th LED assembly (LB m ) in proper operation.
      I m, 2
      Current of the second current source (Iq m, 2 ) of the m-th LED assembly (LB m ), which flows through the second LED group (L m, 2 ) of the m-th LED assembly (LB m ) in proper operation.
      I m, jm
      Current of the j m- th current source (Iq m, jm ) of the m th LED module (LB m ), the j m- th LED group (L m, jm ) of the m th LED module (LB m ) flows through in proper operation.
      I m, nm
      Current of the n m- th current source (Iq m, nm ) of the m-th LED module (LB m ), the n m- th LED group (L m, nm ) of the m th LED module (LB m ) flows through in proper operation.
      Iq 1
      first current source for adjusting the electric current (I 1 ) through the first LED group (L 1 ). The first current source is thus assigned to the first LED group (L 1 ).
      Iq 2
      second current source for adjusting the electric current (I 2 ) by the second LED group (L 2 ). The second current source is thus assigned to the second LED group (L 2 ).
      Iq j
      jth current source for adjusting the electric current ( Ij ) through the jth LED group (L j ). The jth current source is thus assigned to the jth LED group (L j ).
      Iq n
      n-th current source for setting the electric current (I n ) through the n-th LED group (L n ). The n-th current source is thus assigned to the n-th LED group (L n ).
      Iq 1.1
      first current source for adjusting the electric current (I 1,1 ) through the first LED group (L 1,1 ) of the first LED assembly (LB 1 ). The first current source of the first LED assembly (LB 1 ) is thus associated with the first LED group (L 1,1 ) of the first LED assembly (LB 1 ).
      Iq 1,2
      second power source for adjustment of the electric current (I 1,2 ) through the second LED group (L 1,2 ) of the first LED assembly (LB 1 ). The second current source of the first LED assembly (LB 1 ) is thus associated with the second LED group (L 1,2 ) of the first LED assembly (LB 1 ).
      Iq 1, j1
      j 1 -th current source for adjusting the electric current (I 1, j1 ) by the j 1- th LED group (L 1, j1 ) of the first LED assembly (LB 1 ). The j 1 -th power source first LED assembly (LB 1 ) is thus the j 1- th LED group (L 1, j1 ) of the first LED assembly (LB 1 ) assigned.
      Iq 1, n1
      n 1- th current source for adjusting the electric current (I 1, n1 ) by the n 1- th LED group (L 1, n1 ) of the first LED assembly (LB 1 ). The n 1- th current source of the first LED assembly (LB 1 ) is thus assigned to the n 1- th LED group (L 1, n 1 ) of the first LED assembly (LB 1 ).
      Iq 2.1
      first current source for adjusting the electric current (I 2,1 ) by the first LED group (L 2,1 ) of the second LED assembly (LB 2 ). The first current source of the second LED assembly (LB 2 ) is thus assigned to the first LED group (L 2,1 ) of the second LED assembly (LB 2 ).
      Iq 2,2
      second current source for adjusting the electric current (I 2,2 ) through the second LED group (L 2,2 ) of the second LED assembly (LB 2 ). The second current source of the second LED assembly (LB 2 ) is thus associated with the second LED group (L 2,2 ) of the second LED assembly (LB 2 ).
      Iq 2, j2
      j 2 -th current source for adjusting the electric current (I 2, j2 ) by the j 2- th LED group (L 2, j2 ) of the second LED assembly (LB 2 ). The j 2- th current source of the second LED assembly (LB 2 ) is thus assigned to the j 2- th LED group (L 2, j 2 ) of the second LED assembly (LB 2 ).
      Iq 2, n2
      n 2nd power source for setting the electric current ( I2, n2 ) through the n 2nd LED group (L 2, n2 ) of the second LED module (LB 2 ). The n 2 -th power source of the second LED assembly (LB 2 ) is thus the n 2- th LED group (L 2, n2 ) of the second LED assembly (LB 2 ) assigned.
      Iq k, 1
      first current source for adjusting the electric current (I k, 1 ) by the k-th LED group (L k, 1 ) of the k th LED assembly (LB k ). The first power source of the k th LED Assembly (LB k ) is thus assigned to the first LED group (L k, 1 ) of the k th LED assembly (LB k ).
      Iq k, 2
      second current source for adjusting the electric current (I k, 2 ) by the k-th LED group (L k, 2 ) of the k th LED assembly (LB k ). The second current source of the k-th LED module (LB k ) is thus assigned to the second LED group (L k, 2 ) of the k th LED module (LB k ).
      Iq k1, jk1
      j k1 -th current source for adjusting the electric current (I k1, jk1 ) by the j k1 -th LED group (L k1, jk1 ) of the k 1- th LED assembly (LB k1 ). The j k1 -th current source of the k 1- th LED module (LB k1 ) is thus the j k1 -ten LED group (L k1, jk1 ) of the k 1- th LED module (LB k1 ) assigned.
      Iq k2, jk2
      j k2 -th current source for adjusting the electric current (I k2, jk2 ) through the j k2 -th LED group (L k2, jk2 ) of the k 2- th LED assembly (LB k2 ). The j k2- th current source of the k 2- th LED module (LB k2 ) is thus assigned to the j k2- th LED group (L k2, jk2 ) of the k 2- th LED module (LB k2 ).
      Iq k, jk
      j k -th current source for adjusting the electric current (I k, jk ) by the j k -te LED group (L k, jk ) of the k-th LED assembly (LB k ). The j k -th current source of the k-th LED module (LB k ) is thus the j k- th LED group (L k, jk ) of the k-th LED module (LB k ) assigned.
      Iq k, nk
      n k -th current source for adjusting the electric current (I k, nk ) by the n k -th LED group (L k, nk ) of the k-th LED assembly (LB k ). The n k -th current source of the k-th LED module (LB k ) is thus the n k- th LED group (L k, nk ) of the k-th LED module (LB k ) assigned.
      Iqm , 1
      first current source for adjusting the electric current (I m, 1 ) by the first LED group (L n, 1 ) of the m th LED module (LB m ). The first current source of the m-th LED module (LB m ) is thus assigned to the first LED group (L m, 1 ) of the m-th LED module (LB m ).
      Iq m, 2
      second current source for adjusting the electric current (I m, 2 ) by the second LED group (L m, 2 ) of the m-th LED assembly (LB m ). The second current source of the m-th LED module (LB m ) is thus assigned to the second LED group (L m, 2 ) of the n-th LED module (LB m ).
      Iq m, jn
      j m -te power source for setting the electric current (I m, jm ) through the j m -th LED group (L m, jm ) of the m-th LED assembly (LB m ). The j m- th current source of the m-th LED module (LB m ) is thus assigned to the j m- th LED group (L m, jm ) of the m-th LED module (LB m ).
      Iq m, nm
      n m -th current source for adjusting the electric current (I m, nm ) by the n m -th LED group (L m, nm ) of the m-th LED assembly (LB m ). The n m- th current source of the m-th LED module (LB m ) is thus assigned to the n m- th LED group (L m, nm ) of the m th LED module (LB m ).
      IC 1.1
      first control IC of the first LED module (LB 1 ).
      IC 1,2
      second control IC of the first LED module (LB 1 ).
      IC 1, l1
      l 1- th control IC of the first LED module (LB 1 ).
      IC 1, o1
      o 1st control IC of the first LED module (LB 1 ).
      IC 2.1
      first control IC of the second LED module (LB 2 ).
      IC 2.2
      second control IC of the second LED module (LB 2 ).
      IC 2, l2
      l 2 nd control IC of the second LED module (LB 2 ).
      IC 2, o2
      o 2nd control IC of the second LED module (LB 2 ).
      IC k, 1
      first control IC of the k th LED assembly (LB k ).
      IC k, 2
      second control IC of the k th LED assembly (LB k ).
      IC k, lk
      l k -tes control IC of the k th LED module (LB k ).
      IC k, o1
      o k -tes control IC of the k th LED module (LB k ).
      IC m, 1
      first control IC of the mth LED module (LB m ).
      IC m, 2
      second control IC of the mth LED module (LB m ).
      IC m, lm
      l m -tes control IC of the mth LED module (LB m ).
      IC m, om
      o m -tes control IC of the mth LED module (LB m ).
      ICCTR k, 1
      Control IC controller of the first control IC (IC k, 1 ) of the k th LED assembly.
      ICCTR k, lk
      Control IC controller of the kth control IC (ICk , lk ) of the kth LED assembly.
      L 1
      first LED group (prior art).
      L 2
      second LED group (prior art).
      L j
      jth LED group (prior art).
      L n
      nth LED group (prior art).
      L 1,1
      first LED group of the first LED module (LB 1 ).
      L 1,2
      second LED group of the first LED module (LB 1 ).
      L 1.3
      third LED group of the first LED module (LB 1 ).
      L 1,4
      fourth LED group of the first LED module (LB 1 ).
      L 1, j1
      j 1 -teLED group of the first LED module (LB 1 ).
      L 1, n1
      n 1- th LED group of the first LED module (LB 1 ).
      L 2.1
      first LED group of the second LED module (LB 2 ).
      L 2,2
      second LED group of the second LED module (LB 2 ).
      L 2,3
      third LED group of the second LED module (LB 2 ).
      L 2,4
      fourth LED group of the second LED module (LB 2 ).
      L 2, j2
      j 2 -teLED group of the second LED module (LB 2 ).
      L 2, n2
      n 2nd LED group of the second LED module (LB 2 ).
      L k, 1
      first LED group of the k th LED module (LB k ).
      L k, 2
      second LED group of the k th LED module (LB k ).
      Lk, jk
      j-teLED group of the k th LED assembly (LB k ).
      L k, nk
      n k -th LED group of the k th LED module (LB k ).
      L k1,1
      first LED group of the k 1- th LED module (LB k1 ).
      L k1,2
      second LED group of the k 1- th LED module (LB k1 ).
      L k1, jk1
      j k1 -teLED group of the k 1- th LED module (LB k1 ).
      L k1, nk
      n k1 -th LED group of the kth LED module (LB k1 ).
      L k2, jk2
      j k2 -teLED group of the k 2- th LED module (LB k2 ).
      L m, 1
      first LED group of the mth LED module (LB m ).
      L m, 2
      second LED group of the mth LED module (LB m ).
      Lm, jm
      j m -te LED group of the mth LED module (LB m ).
      Lm , nm
      n m -th LED group of the mth LED module (LB m ).
      LB 1
      first LED module with n 1 LED groups (L 1,1 , L, 1,2 , ..., L 1, j1 , ... L 1, n1 ).
      LB 2
      second LED module with n 2 LED groups (L 2.1 , L, 2.2 , ..., L 2, j2 , ... L 2, n2 ).
      LB k
      kth LED assembly with nk LED groups ( Lk, 1 , L, k, 2 , ... , Lk , jk , ... Lk, nk ).
      LB k
      kth LED assembly with nk LED groups ( Lk, 1 , L, k, 2 , ... , Lk , jk , ... Lk, nk ).
      LB (k-1)
      (k - 1) -th LED assembly with n (k-1) LED groups (L k, 1 , L, k, 2 , ..., L k, j (k-1) , ... L k, n (k-1) ) which precedes the k-th LED group (LB k ) in the data bus.
      LB (k + 1)
      (k + 1) th LED assembly with n (k + 1) LED groups (L k, 1 , L, k, 2 , ..., L k, j (k + 1) , ... L k, n (k + 1) ) following the k-th LED group (LB k ) in the data bus.
      LB k1
      k 1- th LED module with n k1 LED groups (L k1,1 , L, k1,2 , ..., L k1, jk1 , ... L k1, nk1 ).
      LB k2
      k 2 nd LED module with n k2 LED groups (L k2,1 , L, k2,2 , ..., Lk2, jk2 , ... Lk2, nk2 ).
      LB m
      m-th LED module with n m LED groups (L m, 1 , L, m, 2 , ..., L m, j m , ... L m, nm ).
      min
      a circuit for detecting the minimum of the voltage values (V Qj ) of the voltage drops across the current sources (Iq j ).
      M Lk1, jk1
      Detecting device for detecting the voltage value (V Lk1, jk1 ) of the voltage drop via the j k1- th LED group (L k1, jk1 ) of the k 1- th LED module (LB k1 ).
      M Q1
      Detecting device for detecting the voltage value (V Q1 ) of the voltage drop across the first current source (Iq 1 ).
      M Q2
      Detecting device for detecting the voltage value (V Q2 ) of the voltage drop across the second current source (Iq 2 ).
      M Qj
      Detecting device for detecting the voltage value (V Qj ) of the voltage drop across the j-th current source (Iq j ).
      M Qn
      Detecting device for detecting the voltage value (V Qn ) of the voltage drop across the nth current source (Iq n ).
      M Qk1, jk1
      A detection device for detecting the voltage value (V Qk1, jk1 ) of the voltage drop across the j k1- th current source (Iq k1, jk1 ) of the k 1- th LED assembly (LB k1 ).
      M Lk2, jk2
      Detection device for detecting the voltage value (V Lk2, jk2 ) of the voltage drop across the j k2 -th LED group (L k2, jk2 ) of the k 2- th LED assembly (LB k2 ).
      M Qk2, jk2
      A detection device for detecting the voltage value (V Qk2, jk2 ) of the voltage drop across the j k2- th current source (Iq k2, jk2 ) of the k 2- th LED module (LB k2 ).
      n 1
      Number of LED groups (L 1,1 , L, 1,2 , ..., L 1, j 1 , ... L 1, n1 ) of the first LED module (LB 1 ).
      n 2
      Number of LED groups (L 2,1 , L, 2,2 , ..., L 2, j 2 , ... L 1, n 2 ) of the second LED module (LB 2 ).
      n k
      Number of LED groups (L k, 1 , L, k, 2 , ..., L k, j k , ... L k, nk ) of the k th LED module (LB k ).
      n k1
      Number of LED groups (L k1,1 , L, k1,2 , ..., L k1, jk1 , ... L k1, nk1 ) of the k 1- th LED module (LB k1 ).
      n k2
      Number of LED groups (L k2,1 , L, k2,2 , ..., L k2, jk2 , ... L k2, nk2 ) of the k 2- th LED module (LB k2 ).
      n m
      Number of LED groups (L m, 1 , L, m, 2 , ..., L m, j m , ... L 1, nm ) of the m th LED module (LB m ).
      PWM
      For the purposes of this document, PWM is to be understood as meaning not only the pulse-width modulation but also any type of pulse modulation that can be used for the brightness adjustment. Here are from the state of the art, for example, call: PFM, PCM, PDM, COT, PWM, etc. and their randomized variants. Below a PWM period is therefore the time interval between a first rising edge and a directly following second rising edge or alternatively to understand the time interval between a first falling edge and a directly following second falling edge.
      R V
      Control signal of the controller (CTR) to the voltage converter (DCDC) with which the output voltage (V sup ) of the voltage converter is set. It can be individual analog and digital signals, but also a bus system. The data transmission of the associated control values is preferably carried out electrically and by wire. The transmission is either directly to the controller (CTR) and / or indirectly to it, for example via the voltage vector diminution unit (VDVM). An optical, acoustic, magnetic or other wireless transmission of the control values is conceivable. Also, transmission via power line communication is conceivable. In that case the transmission is effected by a data signal modulated onto the supply voltage line for the supply voltage (V sup ). This has a data center frequency which, for example, results as the centroid of the supply voltage spectrum when the range of 0Hz to 100Hz in the spectrum is set to zero. The regulation of the voltage converter is then no longer allowed to attenuate the modulated data signal in the range of the data center frequency by a factor of 18 dB or 12 dB or 6 dB or 3 dB. In this case, the greater levels - ie the lower attenuation of the data signal - to give preference. In contrast, the current sources must attenuate fluctuations in the current source current in the range of the data center frequency by more than a factor of 18 dB or 12 dB or 6 dB or 3 dB. Here, the larger attenuations are preferable.
      SB
      Control module.
      SW V
      Threshold for the evaluation of the evaluation values (B Qk1, jk1, where 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; B Qk2, jk2 , where 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ; B Lk1, jk1 , with 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; B Lk2, jk2 , with 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ;) of Voltage values (V Qk1, jk1 , with 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; V Qk2, jk2 , with 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ; V Lk1, jk1 , with 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; V Lk2, jk2, where 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ;) of the voltage vector (Vec) through the voltage vector dimensional reduction unit (VDVM). The threshold value (SW v ) can also be another element of the voltage vector (Vec) or the evaluation value (B Qk1, jk1, where 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; B Qk2, jk2 , where 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ; B Lk1, jk1, where 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; B Lk2, jk2 , where 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ;) of such another element of the voltage vector (Vec).
      VDVM
      Voltage vector dimension reduction unit. The voltage vector dimension reduction unit evaluates the at least two detected voltage values (V Qk1, jk1, where 1 k 1 m and 1 ≦ j k1 n k1 ; V Qk2, jk2 , where 1 k 2 m and 1 j k2 ≦ n k2 V Lk1, jk1 , with 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; V Lk2, jk2 , with 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ;) of the voltage vector (Vec) Determining each evaluation value (B Qk1, jk1 , with 1 k 1 m and 1 ≦ j k1 n k1 ; B Qk2, jk2 , with 1 k 2 m and 1 j k2 ≦ n k2 ; B Lk1, jk1 , with 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; B Lk2, jk2 , with 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ;) of the respective voltage value (V Qk1, jk1 , with 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; V Qk2, jk2, where 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ; V Lk1, jk1 , where 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; V Lk2, jk2 , with 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ;) and rejects at least one voltage value of the voltage vector (Vec) whose evaluation value m at least one threshold value (SW V ) is exceeded or fallen below. The threshold value (SW v ) can also be another element of the voltage vector (Vec) or the evaluation value (B Qk1, jk1, where 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; B Qk2, jk2 , where 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ; B Lk1, jk1, where 1 ≤ k 1 ≤ m and 1 ≤ j k1 ≤ n k1 ; B Lk2, jk2 , where 1 ≤ k 2 ≤ m and 1 ≤ j k2 ≤ n k2 ;) of such another element of the voltage vector (Vec). Whether an overrun or underrun leads to the Verwurf is a pure question of the implementation of the evaluation. The voltage vector dimensional reduction unit generates a reduced voltage vector (VecR) as a result of this process the voltage vector (Vec).
      Vec
      Voltage vector of at least two detected voltage values (V Lk1, Jk1 , V Lk2, Jk2 , V Qk1, Jk1 , V Qk2, Jk2 ).
      VECM
      modified voltage vector. The modified voltage vector is generated from the reduced voltage vector (VecR), typically by an affine mapping.
      VecR
      reduced voltage vector from a true subset of the set of at least two detected voltage values (V Lk1, jk1 , V Lk2, jk2 , V Qk1, jk1 , V Qk2, jk2 ) forming the voltage vector (Vec).
      VecRM
      Average of the voltage values that form the reduced voltage vector (VecR).
      V Lk1, jk1
      j k1 -ter detected voltage value of a voltage drop across a j k1 -te LED group (L k1, jk1 ) of the k 1- th LED module (LB k1 ).
      V Lk2, jk2
      j k2 -ter detected voltage value of a voltage drop across a j k2 -th LED group (L k2, jk2 ) of the k 2- th LED module (LB k2 ).
      V off
      Offset which is added to the second lowest power source voltage (V Qk, jk ) or subtracted from the second largest group LED voltage (V Lk, jk ) as a safety margin.
      V Q1
      first detected voltage value of a voltage drop across the first current source (Iq 1 ).
      V Q2
      second detected voltage value of a voltage drop across the second current source (Iq 2 ).
      V Qj
      j-ter detected voltage value of a voltage drop across the j-th current source (Iq j ).
      V Qn
      nth detected voltage value of a voltage drop across the n-th current source (Iq n ).
      V Qk1, jk1
      j k1 -ter detected voltage value of a voltage drop across a j k1 -th current source (Iq k1, jk1 ) of the k 1- th LED module (LB k1 ).
      V Qk2, jk2
      j k2 -ter detected voltage value of a voltage drop across a j k2 -th current source (Iq k2, jk2 ) of the k 2- th LED module (LB k2 ).
      V sup
      Output voltage or output voltage value of the controllable voltage converter (DCDC). The output voltage value of the output voltage depends on a voltage regulation signal (R V ) of the controller (CTR).
  • List of quoted writings
  • Cited pamphlets:
  • Quoted registrations:
  • QUOTES INCLUDE IN THE DESCRIPTION
  • This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.
  • Cited patent literature
    • US 10318780 A1 [0003]
    • US 2007/0139317 A1 [0003]
    • US 2008/0122383 A1 [0003]
    • US 2009/0268012 A1 [0003]
    • US 2009/0230874 A1 [0003]
    • US 2010/0026209 A1 [0003]
    • US 2010/0201278 A1 [0003]
    • US 2011/0012521 Al [0003]
    • US 2011/0043114 A1 [0003]
    • US 2012/0268012 A1 [0003]
    • US 8519632 B2 [0003]
    • US 8319449 B2 [0003]
    • US 7157866 B2 [0003]
    • DE 102005028403 B4 [0003]
    • DE 102006055312 A1 [0003]
    • EP 1449165 B1 [0003]
    • EP 2600695 B1 [0003]
    • WO 2013/030047 A1 [0003]
    • EP 1490772 B1 [0052]
    • DE 102017106811 [0052, 0068]
    • DE 102017106812 [0052, 0068]
    • DE 102017106813 [0052, 0068]

Claims (6)

  1. Method for supplying power to LED groups (L 1 , L 2 , ... L j , ... L n ) comprising the steps of - applying a supply voltage (V sup ) to a common first terminal of the LED groups ( L 1 , L 2 , ... L j , ... L n ) by a variable voltage converter (DCDC); - Setting the respective current (I 1 , I 2 , ... I j , ... I n ) by the respective LED groups (L 1 , L 2 , ... L j , ... L n ) means with respective LED groups (L 1 , L 2 ,... L j , ... L n ) respectively connected in series to respective current sources (Iq 1 , Iq 2 , ... Iq j , ... Iq n ) correspondingly a respective current command value in at least one control IC (IC k, lk ); characterized by the steps of - detecting the voltage values of the respective voltage drops (V Q1 , V Q2 , ... V Qj , ... V Qn ) via the respective current sources (Iq 1 , Iq 2 , ... Iq j , ... Iq n ) in at least one of the control IC (IC k, lk ) and / or detecting the voltage values of the respective voltage drops (V L1 , V L2 , ... V Lj , ... V Ln ) via the respective electrical consumers ( L 1 , L 2 , ... L j , ... L n ) in at least one of the control ICs (IC k, lk ); Transmission of the detected voltage values to a controller (CTR) via the supply voltage line (V sup ) by a data signal with a data center frequency modulated onto the supply voltage (V sup ), the current sources (Iq 1 , Iq 2 ,... Iq j , ... Iq n ) are designed so that they attenuate current fluctuations in the frequency range of the data center frequency with respect to the DC value with at least 3dB and • wherein the regulation of the supply voltage (V sup ) is designed so that the data signal on the supply voltage at the data center frequency attenuates less than 18 dB or less than 12 dB or less than 6 dB or less than 3dB and thus forms a voltage vector (Vec); - Adjustment of the supply voltage (V sup ) as a function of the absolute second or N-smallest voltage value of the voltage vector (Vec) for the voltage drops (V Q1 , V Q2 , ... V Qj , ... V Qn ) via the respective power sources (Iq 1 , Iq 2 , ... Iq j , ... Iq n ) and / or depending on the second or N-largest voltage value of the respective voltage drops (V L1 , V L2 , ... V Lj,. .. V Ln ) via the respective electrical loads (L 1 , L 2 , ... L j , ... L n ) by the controller (CTR), with 1 <N <m.
  2. Method according to claim 1 additionally comprise the step - discarding • at least the magnitude smallest voltage value of the voltage vector (Vec) for the voltage drops (V Q1 , V Q2 , ... V Qj , ... V Qn ) via the respective current sources (Iq 1 , Iq 2 , ... Iq j , ... Iq n ) or • (Verwurf) at least the magnitude of the voltage value of the voltage vector (Vec) of the respective voltage drops (V L1 , V L2 , ... V Lj , ... V Ln ) via the respective electrical consumers (L 1 , L 2 , ... L j , ... L n ) and thus forming a reduced by at least the number one reduced voltage vector (VecR); - adjustment of the supply voltage (V sup ) as a function of the magnitude of the smallest voltage value of the reduced voltage vector (VecR) for the voltage drops (V Q1 , V Q2 ,... V Qj ,... V Qn ) via the respective current sources (Iq 1 , Iq 2 , ... Iq j , ... Iq n ) and / or • depending on the magnitude of the largest voltage value of the reduced voltage vector (VecR) for the respective voltage drops (V L1 , V L2 , ... V Lj ,. .. V Ln ) via the respective electrical loads (L 1 , L 2 , ... L j , ... L n ) by the controller (CTR) instead of the voltage vector (Vec).
  3. The method of claim 1 additionally comprising the step of - authenticating the at least one control IC (IC k, lk ) by the controller (CTR).
  4. The method of claim 1, further comprising the step of discarding a detected voltage value detected in the at least one of the control ICs (IC k, lk ) when not authenticated in at least one of the control ICs (IC k, lk ) ,
  5. The method of claim 1 additionally comprising the additional steps - encrypting at least one of the detected voltage values before the wireless transmission to the controller (CTR); Decrypting the at least one detected voltage value after the wireless transmission to the controller (CTR);
  6. The method of claim 1 additionally comprising the additional steps - redundant transmission of at least one of the detected voltage values to the controller (CTR);
DE102017119850.4A 2016-08-29 2017-08-29 Method for power-line based control of the supply voltage of LEDs Pending DE102017119850A1 (en)

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