The invention relates to a drive circuit for light-emitting diodes with a plurality of drive channels and a balancing device for equalizing the currents in the individual drive channels, with a control unit which is connected to a power factor correction circuit or a power factor controller (PFC), to a bridge circuit and to a primary-side current measuring device.
Flat panel televisions and liquid crystal displays need a backlight. This is increasingly realized with light-emitting diodes (LED) instead of cold cathode tubes, since LEDs require less energy and have a longer life. In 1 is a TV 27 sketched with such a backlight. The light-emitting diodes 12 are here in several so-called light-emitting diode chains 2 (LED chain) at the top and bottom of the TV 27 arranged. In the example, two LED chains are each 2 up and down on a screen 28 arranged. The light of the LEDs 12 is distributed evenly over the entire image area by a diffuser. An LED chain 2 can consist of several light emitting diodes 12 exist, which can be connected in series and / or in parallel.
In order to obtain a uniform illumination of the screen surface in this structure, it is essential that all LED chains are the same light. This is achieved by adjusting the currents in the individual LED chains with the aid of a balancing circuit.
A drive circuit with such a balancing circuit is exemplified in FIG 2 shown. The drive circuit has a plurality of drive channels 1 on, in each case an LED chain 2 is controlled. As a balancing device is in each control channel 1 a balancing transformer 3 arranged. The primary windings 4 all transformers 3 are connected in series and with a bridge circuit 5 connected as an AC voltage source. The bridge circuit 5 is via a power factor controller 6 (PFC) supplied with a DC voltage. PFC 6 and bridge circuit 5 are with a control unit 7 connected, for example, the output voltage of the PFC 6 regulates. The LED chains 2 are each via a bridge rectifier 13 at the secondary windings 8th the balancing transformers 3 connected. The lamp current in all control channels 1 is the same and corresponds to the active current in the primary windings 4 ,
A dimming of the light-emitting diode strings is possible in this circuit, for example by varying the primary-side current, such as by modulation of the primary voltage or current source (burst mode dimming). Since all drive channels are balanced, they are always dimmed the same.
In some applications, however, it is necessary for the control channels to be switched on and off again in a slightly time-delayed manner in burst mode dimming, as in the time diagram in FIG 3 is shown. A dimming of the lamps while maintaining the current balance is then possible, for example, only if each drive channel has its own, regulated power supply. However, such a drive circuit is complicated and expensive.
From the not pre-published DE 102012007746.7
is the in 4
shown drive circuit of the aforementioned type, in which each drive channel ( 1
) a first transistor switch (Qx) for switching in each case a light-emitting diode chain ( 2
), which is connected to a separate dimming signal (DSx), each drive channel comprising a smoothing capacitor (Cx) and a current limiter (Cx). 19
), which is formed by a second transistor switch (Qxc) and a third transistor switch (Qxcl), wherein the third transistor switch is designed as a bipolar transistor and wherein the base of the bipolar transistor with the drain terminal of the second switch ( Qxc). The control unit ( 7
) is designed so that if all the dimming signals (DSx) are logically ON, the output voltage of the PFC ( 6
) with the aid of the current measuring device ( 9
) is controlled so that the primary-side current corresponds to a predetermined setpoint and that as soon as at least one dimming signal (DSx) is logically OFF, the output voltage of the PFC is kept constant at its last value. This offers the advantage that a separate power supply is not required for each control channel and yet each channel can be controlled separately. The transistors Qx, which are connected in series with the individual LEDs, can be dimmed together with the second transistors Qxc with different duty cycles. The values of the current rise and fall times in the LEDs are smaller than 1μs at the dimming transition. The transistors Qxc prevent overvoltages on the capacitors Cx in idle operation of the transformers and also limit the charging current through capacitors, for example during startup, when these capacitors are empty. The diodes 15
enable dimming operation with different duty cycles in the LEDs. The maximum possible or tolerable voltage tolerance between the individual light-emitting diode chains is determined by the values of the voltage drop across the diodes 15
determined and limited.
In this type of drive circuit, however, the following problems arise:
When applying a dimming signal, first the first transistors Qx are turned on, which are in Series with the LED chains are located and only after that are the second transistors Qxc connected in series with the capacitors. This is due to the interconnection of the transistors and their switching delay, so it can not be easily prevented. Therefore, when dimming at the beginning of the current pulse always current peaks, which are about 30% -50% higher than the working current.
When the current through the second transistors Qxc (in series with the capacitors C1c ... Cnc) reaches certain value, the transistors Qxc are turned off. The transistors Qx remain in a conductive state. Therefore, overcurrent can flow through the LEDs. This always happens at start-up when the capacitors C1 ... Cn are not yet fully charged and the inverter supplies asymmetrical voltage. The current peaks can reach 3 to 5 times higher values than the working current.
The blocking voltage of the rectifier diodes 13 reached at startup (idle when the transformers are in operation and the transistors Qx are disabled) up to three times greater values than in the working mode, ie it must be used diodes with this increased reverse voltage (Us). These diodes typically have higher forward voltage (Uf) and reverse recovery time (tr) values. This also increases the losses in the diodes.
The object of the invention is therefore to provide a drive circuit in which said problems do not occur.
This object is achieved by a drive circuit with the features of the main claim. Further advantageous embodiments of the invention will become apparent from the dependent claims and the embodiments.
The idea of the drive circuit according to the invention is that in each drive channel in each case the gate of the first switch is connected directly to the gate of the second switch. The current flowing through each LED string is proportional to the current flowing through the inverter. Therefore, for current regulation, the feedback signal from the shunt resistor Rm is used, which is connected in series with the primary windings of the transformers.
When all the dimming signals DSi are "1", the inverter generates high-frequency voltage. Then rectified voltage comes through the rectifier 13 to the LED chains. All transistors Qx and Qxc are conductive. The currents are the same in all drive channels, but the voltages on the LED chains can be different. The maximum discrepancy of the voltages of the LEDs is due to the values of the voltage at the diodes 15 limited. Through the diodes 15 no electricity flows. If some of the dimming signals DSi is "0" and the transistors in the respective channels are off, then the currents in all the secondary windings will decrease, yet all the currents in the secondary windings will remain the same, since in the diodes 15 Electricity can flow. The current in the primary windings of the transformers also decreases, and if the shunt resistance remains unchanged, the voltage signal at this shunt resistor becomes smaller. So that the current in the LEDs remains unchanged, the control IC receives a feedback from the secondary side as many dimming signals are "0" and "1", whereupon the primary current decreases in proportion to the number of blocked LED channels. The fact that now the gates of the first and the second transistor switches are connected to each other, there is no delay between the switching times of the first transistor switch Qx and second transistor switch Qxc. Therefore, when dimming at the beginning of the current pulses no more current peaks. When the current through the second transistor switches Qxc reaches a certain value, then the second transistor switches Qxc are turned off. The first transistors Qx are in the same state. Therefore, no overcurrent flows through the LEDs. Since there are no current peaks and no surges, the diodes in the rectifier can 13 be selected with lower blocking and forward voltage, as described above. As a result, the drive circuit is cheaper to produce on the one hand and on the other hand, less power loss arises during operation. The first and second transistor switches can be given in particular by MOSFETs.
Due to series tolerances, it may occur despite common gate drive that the first transistors Qx switch faster than the second transistors Qxc. This can cause current peaks in the LEDs. In order to suppress these current peaks, an advantageous development of the invention has additional capacitors which are connected in parallel in each control channel to the light-emitting diode chain. If, on the other hand, the second transistors switch faster, then no current peaks occur, since these are suppressed by the capacitors.
In a preferred embodiment of the invention, all the dimming signals in a logic unit are linked by a logical AND operation to a total dimming signal and the total dimming signal is connected as a switching signal to a switching device which switches the PFC control signal between the current measurement signal and a fixed reference value , The AND logic unit may be a separate component or integrated, for example, in the control unit.
An advantageous embodiment of the invention is characterized in that in each control channel in each case a balancing transformer and a bridge rectifier is arranged, that the primary windings of all balancing transformers are connected in series and connected to a power supply, that the secondary windings of the balancing transformers are each connected to the bridge rectifier, that the positive outputs of all bridge rectifiers are interconnected and the negative terminals each form individual channel grounds.
Preferably, the channel masses of the drive channels are each connected to earth via at least one diode pair connected in parallel in opposite directions. The potential of the channel masses is thereby decoupled from the ground for small voltage differences up to the forward voltage of the diodes. This creates a return current path for the gate signals, and at the same time it is possible that the voltages of the LED chains can be slightly different.
This voltage tolerance therefore depends largely on the forward voltage of the diode pairs. To increase the voltage tolerance, the individual diodes of the diode pairs can be replaced by series circuits of at least two diodes. As a result, the forward voltage increases to the sum of the forward voltages of the series-connected diodes and thus also the voltage tolerance. This facilitates the balancing of the current in the individual control channels.
In one development of the invention, the diode pair has two counter-zener diodes. It does not matter whether the zener diodes are connected to the cathodes or the anodes. Especially with small currents, here is a possibility to increase the voltage tolerance almost arbitrarily.
In a further advantageous embodiment, the drive circuit according to the invention has an overvoltage protection component, for example a suppressor diode, which is connected in parallel to the drive channels between a ground connection and outputs of the bridge rectifier. This overvoltage protection component additionally prevents overvoltages in the LEDs and the rectifier diodes. For this reason, the diodes can be chosen with a lower blocking voltage, which improves the forward voltage and the reverse recovery time. Thus, the circuit can also be improved in terms of power dissipation.
The invention is explained in more detail by means of embodiments with reference to the accompanying drawings.
1 a schematic representation of a backlight according to the prior art for a screen (eg a flat screen TV) with LED chains, which are arranged at the top and bottom of the screen,
2 a section of a drive circuit according to the prior art, with balancing transformers, which are connected in series on the primary side,
3 a timing diagram with slightly time-shifted dimming signals for each drive channel of a drive circuit,
4 a drive circuit according to the prior art, each having a bridge rectifier and a current limiter in each drive channel,
5 A first embodiment of a drive circuit according to the invention,
6 a further drive circuit according to the invention, in which in each case the source terminals of the MOSFET switches Qx are connected to the corresponding bases of the associated bipolar transistors Qxcl,
7 a diode pair with a plurality of diodes connected in series and
8th a pair of diodes with two counter-zener diodes.
The 4 shows a driving circuit for LED chains 2 according to the prior art. The drive circuit has a power factor correction (PFC) 6 as a DC voltage source. The regulated DC voltage of the PFC 6 is in a downstream bridge circuit 5 converted into a high-frequency AC voltage. The example shows a half-bridge. However, the circuit may also have a full bridge or other inverter. The clock frequency of the AC voltage is typically around 100 kHz. However, the frequency can also be varied almost as required by the application. The bridge circuit has two switches, which are controlled by a control unit 7 are controlled.
The drive circuit further comprises a current measuring device 9 on, which monitors the primary-side total current. This is in the example Measuring resistor Rm in the bridge circuit 5 arranged. The voltage drop across the measuring resistor Rm is a measure of the current flowing through the half-bridge 5 flows. The current measurement signal 10 is with the control unit 7 connected, which compares the measured value with a fixed setpoint and accordingly a PFC control signal 11 to the PFC 6 which controls its output voltage so that the primary current as possible corresponds to the desired value.
The drive circuit has a plurality of drive channels 1 on, in each of which a light-emitting diode chain 2 is arranged. Each LED chain 2 consists of at least one light emitting diode 12 , wherein a plurality of light emitting diodes may be connected in parallel and / or in series. The drive channels 1 are through the bridge circuit 5 supplied with an AC voltage. For balancing the current in all control channels 1 has each control channel 1 a balancing transformer 3 on. The primary windings 4 all balancing transformers 3 are connected in series and with the bridge circuit 5 connected. The secondary winding of the balancing transformer 3 is each with a bridge rectifier 13 connected.
The positive outputs of all bridge rectifiers 13 are connected. They thereby form a common anode for the light-emitting diode chains 2 , The negative connections each form a channel ground 14 ,
These channel masses 14 are through at least one pair 15 antiparallel connected diodes 16 with the total mass 17 connected. This diode pair 15 decouples the potential of the channel masses 14 for small voltage differences in the range of the forward voltage of the diodes 16 from the potential of the mass 17 , The diode pair thereby enables, on the one hand, that the voltages of the light-emitting diode chains 2 can be slightly different and also provides a return current path for the gate signals (dimming signals).
For dimming per burst mode dimming is in each case between the cathode connection of the light-emitting diode chain 2 and the channel mass 14 a first switching element Qx (x = 1 ... n) is connected. In the example, the first switching element Qx is designed as a MOSFET. The switching signal is a dimming signal DSx (x = 1 ... n), which is provided by a dimming signal generator 18 for each control channel 1 is generated separately.
Each control channel 1 additionally has a smoothing capacitor Cx (x = 1 ... n) and a current limiter 19 on, which limits the charging current of the smoothing capacitor Cx. In particular, when you first turn on the power supply here very large charging currents occur, so that this current limiter is essential for the functioning of the circuit.
The current limiter 19 has a second switch Qxc (x = 1 ... n), which is formed in the example as a MOSFET. The drain terminal of this second switch Qxc is connected to the capacitor Cx and the source terminal via a resistor Rxcl (x = 1 ... n) to the channel ground 14 connected. This resistor Rxcl and a third switch Qxcl (x = 1 ... n) limit the current through the second switch Qxc and thus prevent excessive charging currents at the smoothing capacitor Cx. The gate terminal of the first switch Qx is connected to the dimming signal DSx as a switching signal via a resistor Rx (x = 1... N). The transistor Qxc therefore switches in synchronization with the transistor Qx of the LED array 2 , The source terminal of the second switch Qxc is connected to the base of the third switch Qxcl, which is formed as an npn bipolar transistor. The collector of this bipolar transistor is connected to the gate terminal of the second switch Qxc and the emitter is connected to the channel ground 14 connected.
The dimming signals DSx are additionally equipped with a logic unit 20 which combines all the dimming signals DSx by a logical AND operation into a total dimming signal DG. This total dimming signal DG is ON only if all the dimming signals DSx are logical ON, otherwise it is logically OFF. The total dimming signal DG is via a galvanic isolation, in the example an optocoupler 21 , with the control unit 7 connected.
The control unit 7 has a switch 22 on, for the total dimming signal DG serves as a switching signal. When the total dimming signal DG is on, this switch connects 22 the current measurement signal 10 the current measuring device 9 with the control unit 7 , This generates the PFC control signal from this 11 or pass it on as such. As a result, the primary current is regulated to a fixed desired value by means of a change in the PFC voltage. If the total dimming signal DG is logically OFF, then the controller changes to a voltage-controlled mode, taking as a voltage setpoint that value of the PFC voltage that was present at the time of the switchover. That is, the PFC voltage is simply frozen as long as DG is OFF. The PFC 6 then replaces the current regulation by a voltage regulation.
The current regulation of the PFC 6 is usually relatively lethargic. Because of this, the PFC 6 the fast load change does not follow, due to the time-delayed dimming of the drive channels 1 occurs. Therefore, according to the invention, the current control via the switch 22 and the overall Dimming signal DG only activated if all control channels 1 logically ON. Otherwise, simply output a constant voltage value. This is possible since the time in which the time-shifted switching of the individual dimming signals DSx occurs is short compared to the time in which all the dimming signals DSx are on. The resulting loss of quality is practically invisible.
In the 5 shown drive circuit according to the invention substantially corresponds to in 4 shown drive circuit. The essential difference according to the invention is that in each drive channel, the gate of the first switch Qx is connected directly to the gate of the second switch Qxc of the limiter circuit 19 connected is.
By this arrangement of the limiter circuits 19 in each control channel 1 ensures a very good balancing of the currents in the individual channels. This in particular even if the Ansteuerkanäle 1 time shifted, as in the time diagram of 3 shown.
In addition, the direct gate connection of the first and second switches causes virtually no delays between the switching times of the first switches Qx and the second switches Qxc. As a result, no dimming peaks occur at the beginning of the current pulse during dimming. When the current through the second transistors Qxc reaches a certain value, the second transistors Qxc are turned off. The transistors Qx are also in the same state. Therefore, no overcurrent flows through the LEDs.
Parallel to the LED chains 2 in each case additionally a second capacitor CLx is arranged, the current peaks in the light-emitting diode chain 2 prevented, which arise when tolerance switches the first switch Qx faster than the second switch Qxc.
Furthermore, the drive circuit according to the invention has an overvoltage protection component, for example a suppressor diode Dsup, which is located between the total mass 17 and the positive outputs of the bridge rectifier 13 is connected in parallel to the Ansteuerkanälen. This overvoltage protection component additionally prevents overvoltages in the LEDs and the rectifier diodes 13 , For this reason, the diodes can be selected with a lower blocking voltage, which improves the forward voltage and the reverse recovery time and thus reduces the power loss.
The following calculation example illustrates this situation with an example with four control channels, in which 8 diodes are required:
- • Diode - UF4007 (Us = 1000V, Uf (0.13A) = 0.9V, tr = 75ns). Forward losses: 8 × 0.9V × 0.13A = 0.94W Switching losses: 0.13A × 86V × 75ns × 50kHz = 0.335W Total losses: 1.28W
- • Diode - UF4003 (Us = 200V, Uf (0.13A) = 0.6V, tr = 50ns) Forward losses: 8 × 0.6V × 0.13 = 0.63W Switching losses: 8 × 0.13A × 86V × 50ns × 50kHz = 0.223W Total losses: 0.85W
This means a 34% lower power loss.
The drive circuit according to the invention can therefore be constructed very simply and inexpensively and nevertheless achieves a very good quality of current balancing in the individual drive channels. In particular, even with different and time-shifted dimming signals in the individual control channels. In addition, voltage peaks are effectively suppressed by the measures according to the invention.
The 6 shows an alternative, from the 5 derived, drive circuit in the in the Ansteuerkanälen 1 the source terminal of the first switch Qx not directly to ground 17 but is directly connected to the source terminal of the second switch Qxc. By this circuit arrangement can be dispensed parallel to the LED chains on the additional capacitors CLx, which is why the drive circuit of 6 has no such capacitors. Of course, the capacitors can also be used here.
To increase the voltage tolerance in the LED chains 2 can the diodes 16 the diode pairs 15 ' each formed by series circuits of a plurality of diodes D1-Dn and D2-Dm, as in 7 shown. By series connection, the forward voltages of the individual diodes add up so that the voltage tolerance increases. In particular, in this arrangement, it is advantageous if the diodes can be dimensioned smaller as described above, since here the number of diodes is very large and therefore the power loss would be very large. That is, the advantage of the drive circuit according to the invention is particularly great here.
Instead of the series connection of several diodes, the diode pair 15 '' also be formed of two counter-aligned Zener diodes ZD1, ZD2, as in 8th shown. Here, the Zener voltage determines the voltage tolerance. It does not matter if the Zener diodes with their anodes ( 8a ) or with their cathodes ( 8b ) are interconnected.
In addition to the drive circuits shown in the drawings, further embodiments of the invention are conceivable. The invention is therefore in no way limited to the exemplary embodiments shown.
LIST OF REFERENCE NUMBERS
- drive channel
- LEDs chain
- bridge circuit
- Power Factor Correction (PFC)
- control unit
- secondary winding
- Current measurement device
- Current measurement signal
- PFC control signal
- Bridge rectifier
- Channel mass
- diode pair
- 15 '
- Diode pair series connection
- 15 ''
- Diode pair Zener diodes
- current limiter
- AND logic unit
- fixed voltage value
- OR logic device
- center tap
- Rectifier diode
- Dimming signals (x = 1 ... n)
- Total dimming signal
- measuring resistor
- MOSFET switch (x = 1 ... n)
- Qc, Qxc
- MOSFET switch (x = 1 ... n)
- Qcl, Qxcl
- Bipolar transistor (x = 1 ... n)
- Rcl, Rxcl
- Resistance (x = 1 ... n)
- C, Cx
- Capacitor (x = 1 ... n)
- Rc, Rx
- Resistance (x = 1 ... n)
- Capacitor (x = 1 ... n)
- suppressor diode
- D1, D2
- Dn, dm
- ZD1, ZD2
- Zener diodes
QUOTES INCLUDE IN THE DESCRIPTION
This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.
Cited patent literature