DE102006021297A1 - Full-transparent, coded, multi-masterable communication providing method, involves performing code exchange in initialization phase, where authentication takes place during initialization of cipher, which is made possible by secret code - Google Patents

Abstract

The method involves assigning a safety bus controller (1) for controlling coding, where the controller is provided as a transparent unit between a bus and a component (2). A stream cipher is provided for bus coding. Code exchange is performed in an initialization phase, where an authentication takes place during initialization of cipher, which is made possible by a secret identification code that is present in the safety bus controller. The code exchange is signaled at the safe bus-controller by bus signals or clock.

Description

embodiments The invention are illustrated in the drawings and are in following closer described. Show it

1 architecture of a multi-component system, some of which are equipped with the secure bus controller; and

2 : the internal structure of a secure bus controller.

Each component ( 2 ) that wants to communicate encrypted over the bus, requires a secure bus controller ( 1 ). This is located directly on the chip of the component, so that the unencrypted communication between the component and the secure bus controller can not be heard. The components may be any chip, e.g. As a processor, a RAM device or a controller block act. The secure bus controller receives the data from the respective components and decides based on z. As the address, if encryption is required. Through this decision option in the controller ( 5 ) ensures that it is also possible to communicate with components that do not have a secure bus controller. The secure bus controller implements the interface of the respective bus ( 4 ).

Since no additional delay may be caused by the encryption, this must be done synchronously with the current bus cycle. For this reason, only on-the-fly encryption via a stream cipher ( 5 ) possible.

Before The communication on the bus can be encrypted all secure bus controllers to a common key as initialization for the Some stream cipher. A common key is necessary for each Unit can freely communicate with other units. For the key exchange Various methods are conceivable. Due to the limited resources in a chip, however, should be optimized especially for the hardware area Procedure to be chosen. Specifically lets z. For example, use the Tree Parity Machine method for this purpose.

at initialization is communication between the secure bus controllers required. Here it is crucial that this communication also over the existing bus can run without making changes to the bus protocol to have to. This is achieved by having every secure bus controller on the bus gets an address under which it is reachable. These Address is independent from the address of the component in which it is located. Should the address range of a bus system is insufficient to provide additional Addresses for It is also possible to assign the secure bus controllers entire communication before a successful key exchange as dedicated communication for to consider the secure bus controllers. Once the key exchange completed, all units then switch to normal communication mode around.

One of the secure bus controllers must act as the initiator of the key exchange. Since a bus system is not dynamic in the most common cases, you can set the initiator components during development. In most cases, one chooses for this the component of the bus which has master access. This can be z. B. be the processor or the bus arbiter. This is advantageous because thus the communication during the initialization can be given priority. The key exchange logic is used in the controller ( 5 ) housed within the secure bus controller

So long the individual secure bus controllers are not yet on a common Key agreed can not have encrypted Communication take place. However, the encryption is transparent for the individual components, it may be that this already during a still ongoing initialization over want to communicate the bus. In this case, the secure bus controller must access all Components on the bus, which are executed only encrypted may, delay or in their priority downgrade, so that the component it at a later date tried again. Then could the initialization may already be completed.

During the normal operation must be ensured that all safe Bus controllers continue to switch the stream cipher keys, too if you are not actively involved in a transfer. This is necessary due to the symmetrical shape of the architecture. As a common signaling can be z. B. signals of the bus use and mark a completed transfer all units available on the bus are. If such a signal is not available, so will come the common bus clock as a synchronization signal in question.

With simple means an authentication can be realized. For this purpose, when manufacturing the components with the safe bus controllers special non-volatile memory cells are installed, which can be assigned later with an identification key. A key can also be integrated directly into the chip during production. During the initialization phase, this identifi cation information used for key exchange. If the information does not match, no key can be exchanged. In question for this z. B. the authentication option when Tree Parity Machine key exchange. However, a challenge-response method with a hash function can also be used. The initiator must then do this with every single secure bus controller.

Claims (2)

Procedure for a fully transparent, encrypted, multi-master compatible Communication on bus systems with the following features: a) Use a secure bus controller that turns out to be a transparent unit located between bus and component and the encryption controls b) Symmetric encryption c) stream cipher for the bus encryption d) key exchange in the initialization phase e) Signaling of the key change on all secure bus controllers by bus signals or clock Method according to claim 1, characterized in that that in addition an authentication during initialization takes place, which is enabled by a secret identification key, which is located in the safe bus controller.