CN2519383Y - Memory modules - Google Patents

Memory modules Download PDF

Info

Publication number
CN2519383Y
CN2519383Y CN 01274945 CN01274945U CN2519383Y CN 2519383 Y CN2519383 Y CN 2519383Y CN 01274945 CN01274945 CN 01274945 CN 01274945 U CN01274945 U CN 01274945U CN 2519383 Y CN2519383 Y CN 2519383Y
Authority
CN
China
Prior art keywords
substrate
memory
memory module
plurality
long side
Prior art date
Application number
CN 01274945
Other languages
Chinese (zh)
Inventor
林钦福
范光宇
郑清水
叶乃华
彭镇滨
郭仁龙
黄富美
陈美云
李武祥
钟志贤
黄信元
Original Assignee
胜开科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 胜开科技股份有限公司 filed Critical 胜开科技股份有限公司
Priority to CN 01274945 priority Critical patent/CN2519383Y/en
Application granted granted Critical
Publication of CN2519383Y publication Critical patent/CN2519383Y/en

Links

Abstract

A memory module relates to an information storing device with large capacity, small volume and convenient wiring on the base plate. The utility model comprises the base plate and a plurality of memories arranged on the base plate which has fixed long edges and short edges, and each short edge is provided with a locking hole corresponding to and blocked and connected with the locking device, and a plurality of memories has appropriate length and width. Half of the memories are arranged on the base plate in horizontal manner relative to the base plate, while the other half are arranged on the base plate in vertical manner relative to the base plate.

Description

记忆体模组 Memory modules

技术领域 FIELD

本实用新型属于信息存储装置,特别是一种记忆体模组。 The present invention belongs to the information storage device, in particular a memory module.

由于基板12的尺寸受卡制装置14规格的限制,因此所有的基板12的长度为67.6mm,宽度为31.75mm,因此,以传统的TSOP(Thin Small OutlinePackage)封装方式封装动态随机存取记忆体时,所得的体积较大,无法将多个动态随机存取记忆体摆设于基板12上,故无法生产制造高容量的记忆体模组。 Since the size of the substrate 12 is limited by the specifications of the clamping means 14, the length of all of the substrate 12 is 67.6mm, a width of 31.75mm, and therefore, in a conventional TSOP (Thin Small OutlinePackage) encapsulation package dynamic random access memory , the resulting larger, not a plurality of dynamic random access memory decoration on the substrate 12, it can not manufacture a high-capacity memory modules.

再者,如图2所示,若以CSP(Chip Scale Package)封装方式封装记忆体时,虽可得到较小尺寸的封装体,然欲将八个记忆体设置于基板12上,以组成512M的记忆体模组时,将占据基板12大部分的空间,使得基板12上的布线相当不易,且将接触到凹槽16,从而影响卡制装置14的卡固。 Further, as shown in FIG. 2, when In terms of CSP (Chip Scale Package) packages memory package, the package can be obtained although the small size, however wishing eight memory provided on the substrate 12 to constitute 512M when the memory module, the most of the space occupied by the substrate 12, so that the wiring on the substrate 12 is quite easy, and the access to the recess 16, thus affecting the clamping means 14 is fastened.

本实用新型包括基板及设置于基板上的复数记忆体;基板具有固定的长边及短边;于短边上分别设有与卡制装置相对应并卡制固定的卡制孔;复数记忆体具有适当的长度及宽度;复数记忆体的一半系相对于基板呈横向方式设置于基板上,另一半系相对于基板呈纵向方式设置于基板上。 The present invention comprises a substrate and a plurality of memory disposed on a substrate; a fixed substrate having a short side and a long side; the short sides are provided with clamping means corresponding to the card system and the fixed clamping aperture; a plurality of memory having a suitable length and width; half a plurality of system memory transversely with respect to the substrate disposed on the substrate, the substrate with respect to the other half-based longitudinally disposed on the substrate.

其中:基板的长边为67.6mm,短边为31.75mm。 Wherein: the long side of the substrate is 67.6mm, a short side of 31.75mm.

复数记忆体为八个记忆体;其中相对于基板呈横向方式设置的四个记忆体靠近基板长边;相对于基板呈纵向方式设置四个记忆体位于基板的长边与金手指间,以使基板中央部位可空出较多的区域以供布置与金手指电连接的线路。 A plurality of memory as eight memory; wherein the substrate relative to the form of four memory provided laterally adjacent to the long side of the substrate; a substrate disposed longitudinally positioned four memory substrate with respect to the long side to the finger between, so that central portion of the substrate region may be empty for more lines disposed electrically connected to the finger.

每一记忆体的长度为15.5mm,宽度为9mm。 The length of each memory is 15.5mm, a width of 9mm.

每一记忆体系以中央引线方式封装。 Each memory packaged in the central system lead method.

记忆模体组的容量为512M。 Memory capacity motif group is 512M.

基板的长边为67.6mm,短边为31.75mm;每一记忆体的长度为15.5mm,宽度为9mm。 The long side of the substrate is 67.6mm, 31.75mm short side; the length of each memory is 15.5mm, a width of 9mm.

每一记忆体系以与晶片尺寸相同封装。 Each memory system with the same chip size package.

由于本实用新型包括基板及设置于基板上的复数记忆体;基板具有固定的长边及短边;于短边上分别设有与卡制装置相对应并卡制固定的卡制孔;复数记忆体具有适当的长度及宽度;复数记忆体的一半系相对于基板呈横向方式设置于基板上,另一半系相对于基板呈纵向方式设置于基板上。 Since the present invention comprises a substrate and a plurality of memory disposed on a substrate; a fixed substrate having a short side and a long side; the short sides are provided with corresponding fixed card and the card system and the drilling clamping means; a plurality of memory having an appropriate length and width; half a plurality of system memory transversely with respect to the substrate disposed on the substrate, the substrate with respect to the other half-based longitudinally disposed on the substrate. 当将本实用新型组装于卡制装置上时,由于各记忆体皆远离卡制孔,使得当卡制装置欲卡制于基板的卡制孔时,卡制装置不致于损害到复数记忆体中任记忆体,以致于记忆体模组可得到较高的良率。 When the present invention when assembled to the clamping device, since each memory are remote from the clamping hole, so that when the clamping means to be wedged clamping hole of the substrate, the clamping means as not to damage the plurality of memory any memory, such that the memory module can be obtained a higher yield. 可将多个固定尺寸的记忆体摆设于固定尺寸的基板上,不仅提高记忆模组的容量从而,而且不影响基板上的线路布局。 A plurality of fixed size of memory may be furnished on a substrate of fixed size, not only increase the capacity of the memory module so that, without affecting the circuit layout on the substrate. 不仅容量大、体积小,而且于基板上布线方便,从而达到本实用新型的目的。 Not only large capacity, small size, and easy on the wiring substrate, so as to achieve the object of the present invention.

图2、为习知的另一记忆体模组结构示意图。 FIG 2 is a conventional schematic structure of another memory module.

图3、为本实用新型结构示意图。 3, a schematic view of the new structure the present invention.

图4、为本实用新型使用状态示意图。 4, a schematic view of the present invention to use state.

图5、为本实用新型记忆体结构示意剖视图。 5, a new memory structure schematic sectional view of the present invention.

基板20具有固定的长边38、40及短边42、44,长边38、40的长度为67.6mm,短边42、44的长度为31.75mm。 A fixed substrate 20 has a long side and a short side 42, 38, 40, 38, 40 of the longitudinal length of 67.6mm, length of the short sides 42, 44 of 31.75mm. 而短边42、44上分别设有与卡制装置48相对应并卡制固定的卡制孔46,以使基板20有效地固定住。 And short sides 42 and 44 are respectively provided on the clamping means 48 and corresponding to the fixed clamping aperture card system 46 to the substrate 20 effectively fixed. 基板20一长边38设有用以将电讯号输出的金手指50,靠近另一长边40形成用以容置记忆体22、24、26及28的区域,基板20上布置有多条与金手指50电连接的线路52。 A long side 20 of the substrate 38 is provided for the electrical signal output from the golden finger 50, 40 is formed near the other long side regions for accommodating the memory 24, 26 and 28, a plurality of gold disposed on the substrate 20 finger 50 is electrically connected to the line 52.

八个记忆体22、24、26、28、30、32、34及36均具有适当的长边54及短边56,长边54的长度为15.5mm,而短边56的长度为9mm。 Eight memory 22,24,26,28,30,32,34 and 36 suitably have a long side 54 and the short side 56, the length of the long side 54 is 15.5mm, and the length of the short side 56 is 9mm. 其中记忆体22、24、26及28系相对于基板20呈横向方式设置于靠近基板20的长边40,另四个记忆体30、32、34及36系相对于基板20呈纵向方式设置于基板20的长边40与金手指50间,以使基板20中央部位可空出较多的区域以供布置线路52,用以与金手指50电连接。 24, 26 and 28 wherein the memory system relative to the substrate 20 was disposed transversely to the long side 40 close to the substrate 20, 32, 34 and the other four memory system 36 with respect to the substrate 20 was provided in the longitudinal direction long side 40 of the substrate 20 to the finger 50, so that the central portion of the substrate 20 can be more empty area arranged for line 52, 50 is electrically connected to cheat. 记忆体22、24、26、28、30、32、34及36皆可远离基板20上的卡制孔46。 Memory 22,24,26,28,30,32,34 and 36 Jieke clamping hole 2046 from the substrate.

如图4所示,当将本实用新型组装于卡制装置48上时,由于各记忆体皆远离卡制孔46,使得当卡制装置48欲卡制于基板20的卡制孔46时,卡制装置48不致于损害到记忆体22、24、26、28、30、32、34及36中任记忆体,以致于记忆体模组可得到较高的良率。 4, when the present invention is assembled to the clamping means 48, since each memory are remote from the clamping hole 46, so that when the clamping means 48 clamping hole to be made on the card 20 when the substrate 46, clamping means 48 as not to damage the memory 22,24,26,28,30,32,34 and 36 in any memory, such that the memory module can be obtained a higher yield.

如图5所示,各记忆体22、24、26、28、30、32、34及36系以中央引线方式封装成'与晶片尺寸相同封装'(chip scale package),其包括有基础层60及封装于基础层60上的晶片62,基础层60具有透空的镂空槽64。 5, each of the system memory 36 and the central 22,24,26,28,30,32,34 encapsulated lead to 'the same chip size package' (chip scale package), which comprises a base layer 60 and packaging the wafer 62 on the base layer 60, base layer 60 having grooves 64 permeable hollow. 晶片62具有复数个焊垫66,晶片62封装于基础层60上时,使晶片62上的焊垫66由镂空槽64露出,并藉由导线68与基础层60的金属球(ball grid array)70电连接,从而完成记忆体的封装。 Wafer 62 having a plurality of bonding pads 66, the wafer 62 is encapsulated in the base layer 60, the welding pad 66 on the wafer 62 is exposed by the hollow groove 64, and wire 68 by metal ball 60 of the base layer (ball grid array) 70 is electrically connected to the memory to complete the package.

如上所述,本实用新型具有如下优点:1、可将八个固定尺寸的记忆体摆设于固定尺寸的基板20上,从而不影响基板20上的线路布局。 As described above, the present invention has the following advantages: 1, may be eight memory of a fixed size on the furnishings fixed size of the substrate 20 so as not to affect the circuit layout on the substrate 20.

2、将本实用新型固定于卡制装置48上时,任一记忆体皆不致被卡制装置48压损,可提升记忆模组的良率。 2, when the present invention is fixed to the upper clamping means 48, any one of the memory card 48 are without pressure loss is made apparatus can improve the yield of memory modules.

3、可将多数个记忆体摆置于基板20上,以提高记忆模组的容量。 3, may be disposed a plurality of memory placed on the substrate 20, in order to increase the capacity of the memory module.

Claims (8)

1.一种记忆体模组,它包括基板及设置于基板上的复数记忆体;基板具有固定的长边及短边;于短边上分别设有与卡制装置相对应并卡制固定的卡制孔;复数记忆体具有适当的长度及宽度;其特征在于所述的复数记忆体的一半系相对于基板呈横向方式设置于基板上,另一半系相对于基板呈纵向方式设置于基板上。 A memory module, comprising a substrate and disposed in a plurality of memory on a substrate; a fixed substrate having a short side and a long side; the short sides are provided with corresponding clamping and clamping means fixed clamping aperture; a plurality of memory having a suitable length and width; wherein said plurality of half of the memory system on the transversely relative to the substrate disposed on the substrate, and the other half as a substrate with respect to the longitudinal line disposed on the substrate .
2.根据权利要求1所述的记忆体模组,其特征在于所述的基板的长边为67.6mm,短边为31.75mm。 The memory module according to claim 1, characterized in that the long side of the substrate is 67.6mm, a short side of 31.75mm.
3.根据权利要求1所述的记忆体模组,其特征在于所述的复数记忆体为八个记忆体;其中相对于基板呈横向方式设置的四个记忆体靠近基板长边;相对于基板呈纵向方式设置四个记忆体位于基板的长边与金手指间,以使基板中央部位可空出较多的区域以供布置与金手指电连接的线路。 The memory module according to claim 1, wherein said plurality of memory as eight memory; wherein the substrate relative to the substrate was close to the four memory laterally long side provided; relative to the substrate four longitudinally disposed between memory located in the long side of the substrate to the finger, so that the central portion of the substrate may be an empty region for more lines disposed electrically connected to the finger.
4.根据权利要求1所述的记忆体模组,其特征在于所述的每一记忆体的长度为15.5mm,宽度为9mm。 4. The memory module as claimed in claim 1, wherein each of said memory length is 15.5mm, a width of 9mm.
5.根据权利要求1所述的记忆体模组,其特征在于所述的每一记忆体系以中央引线方式封装。 5. The memory module as claimed in claim 1, wherein each of said memory system in the central wire encapsulated.
6.根据权利要求1所述的记忆体模组,其特征在于所述的记忆模体组的容量为512M。 6. The memory module according to claim 1, wherein the memory capacity of the group of mold body 512M.
7.根据权利要求1所述的记忆体模组,其特征在于所述的基板的长边为67.6mm,短边为31.75mm;每一记忆体的长度为15.5mm,宽度为9mm。 The memory module according to claim 1, characterized in that the long side of the substrate is 67.6mm, 31.75mm short side; the length of each memory is 15.5mm, a width of 9mm.
8.根据权利要求1所述的记忆体模组,其特征在于所述的每一记忆体系以与晶片尺寸相同封装。 8. The memory module as claimed in claim 1, wherein each of said memory system with the same chip size package.
CN 01274945 2001-11-27 2001-11-27 Memory modules CN2519383Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 01274945 CN2519383Y (en) 2001-11-27 2001-11-27 Memory modules

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 01274945 CN2519383Y (en) 2001-11-27 2001-11-27 Memory modules

Publications (1)

Publication Number Publication Date
CN2519383Y true CN2519383Y (en) 2002-10-30

Family

ID=33679460

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 01274945 CN2519383Y (en) 2001-11-27 2001-11-27 Memory modules

Country Status (1)

Country Link
CN (1) CN2519383Y (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106981298A (en) * 2016-01-15 2017-07-25 全何科技股份有限公司 Memory module and its manufacture method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106981298A (en) * 2016-01-15 2017-07-25 全何科技股份有限公司 Memory module and its manufacture method

Similar Documents

Publication Publication Date Title
US6522018B1 (en) Ball grid array chip packages having improved testing and stacking characteristics
USRE36613E (en) Multi-chip stacked devices
US5804874A (en) Stacked chip package device employing a plurality of lead on chip type semiconductor chips
US6252305B1 (en) Multichip module having a stacked chip arrangement
US5512783A (en) Semiconductor chip packages
US6297548B1 (en) Stackable ceramic FBGA for high thermal applications
US7268418B2 (en) Multi-chips stacked package
US6576987B2 (en) Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die
US6344976B1 (en) Interdigitated leads-over-chip lead frame device and method for supporting an integrated circuit die
US5780925A (en) Lead frame package for electronic devices
US7642635B2 (en) Stacked semiconductor package
US20060087013A1 (en) Stacked multiple integrated circuit die package assembly
JP2005150719A (en) Double-stacked bga package and multi-stacked bga package
US5434745A (en) Stacked silicon die carrier assembly
US20010028114A1 (en) Semiconductor device including memory unit and semiconductor module including memory units
JP4808408B2 (en) Multi-chip package, semiconductor device used for the same, and manufacturing method thereof
US6075284A (en) Stack package
US5770480A (en) Method of leads between chips assembly
US5418189A (en) Integrated circuit device and method to prevent cracking during surface mount
KR100642130B1 (en) A semiconductor device
US6476474B1 (en) Dual-die package structure and method for fabricating the same
JP2004128155A (en) Semiconductor package
US7321164B2 (en) Stack structure with semiconductor chip embedded in carrier
US6452279B2 (en) Semiconductor device
JP2007288189A (en) Multi-chip package system

Legal Events

Date Code Title Description
C14 Granted
C17 Cessation of patent right