CN223597823U

CN223597823U - Chip test system

Info

Publication number: CN223597823U
Application number: CN202422667831.6U
Authority: CN
Inventors: 高上彬
Original assignee: Hangzhou Youwang Electronics Co ltd
Current assignee: Hangzhou Youwang Electronics Co ltd
Priority date: 2024-11-01
Filing date: 2024-11-01
Publication date: 2025-11-25
Anticipated expiration: 2034-11-01

Abstract

The embodiment of the utility model discloses a chip testing system. The chip testing system comprises at least one first signal source, a chip socket and at least one switch array. The first signal source comprises a first driving end and a first sensing end which are independent from each other. The chip socket is used for bearing a chip to be tested, and the first pin and the second pin of the chip to be tested are respectively connected with the first end points of the corresponding golden fingers. The switch array is arranged between the positive electrode and the negative electrode of the first driving end and the first sensing end and the second end point of each golden finger, the first driving end is electrically connected with the chip socket through the switching of the switch array, and the first sensing end is electrically connected with the chip socket through the switching of the switch array. The chip testing system in the embodiment of the utility model can realize chip testing and detection of the contact condition among the chip socket, the chip and the testing environment, thereby improving the testing experience and the testing efficiency of testers.

Description

Chip test system

Technical Field

The utility model relates to the field of chip testing, in particular to a chip testing system.

Background

Finished product testing (FI NA L TEST, FT) of the chip is critical to ensure quality and reliability of the chip. At present, a chip to be tested is firstly mounted on a chip Socket (Test Socket) for establishing electrical connection between the chip and a testing environment by using the chip Socket, and then related testing is performed on the chip.

In the process of testing chips, in order to ensure the validity and accuracy of the test, the tester usually needs to pay attention to the contact condition between the chip socket and the chip and the test environment. However, the existing chip test system only has a chip test function, and does not have the capability of detecting the contact condition between the chip socket and the chip and the test environment.

Disclosure of utility model

Therefore, the present utility model is directed to a chip testing system for simultaneously testing a chip and detecting the contact condition between a chip socket and a chip and a testing environment, so as to improve the testing experience and the testing efficiency of a tester.

In a first aspect, an embodiment of the present utility model discloses a chip testing system, the system comprising:

The first signal source comprises a first driving end and a first sensing end which are mutually independent, the first driving end provides driving current, and the first sensing end detects voltage;

the chip socket is used for bearing a chip to be tested, and the chip to be tested comprises at least one group of first pins and second pins;

The first driving end is electrically connected with the chip socket through switching of the switch array, and the first sensing end is electrically connected with the chip socket through switching of the switch array.

In some embodiments, the chip socket includes a first gold finger, a second gold finger, a third gold finger and a fourth gold finger, each gold finger is connected with the switch array to form a second end point, each gold finger is connected with a pin to form a first end point, the first end point of the first gold finger and the first end point of the second gold finger are both connected with the first pin, and the first end point of the third gold finger and the first end point of the fourth gold finger are both connected with the second pin.

In some embodiments, the switch array includes a first switch, a second switch, a third switch, and a fourth switch;

The first switch controls the positive electrode of the first driving end to be electrically connected with the second end point of the first golden finger or the second end point of the third golden finger;

the second switch controls the negative electrode of the first driving end to be electrically connected with the second end point of the second golden finger or the second end point of the fourth golden finger;

The third switch controls the positive electrode of the first sensing end to be electrically connected with the second end point of the first golden finger, the second end point of the second golden finger or the second end point of the third golden finger;

The fourth switch controls the negative electrode of the first sensing end to be electrically connected with the second end point of the second golden finger, the second end point of the third golden finger or the second end point of the fourth golden finger.

In some embodiments, the first switch electrically connects the positive electrode of the first driving end with the second end of the first gold finger,

The second switch electrically connects the negative electrode of the first driving end with the second end point of the fourth golden finger,

The third switch electrically connects the positive electrode of the first sensing end with the second end point of the second golden finger,

The fourth switch electrically connects the negative electrode of the first sensing end with the second end point of the third golden finger,

And a current path is formed among the positive electrode of the first driving end, the first switch, the first golden finger, the first pin, the chip to be tested, the second pin, the fourth golden finger, the second switch and the negative electrode of the first driving end, and the system tests the chip to be tested.

The second switch electrically connects the negative electrode of the first driving end with the second end point of the second golden finger,

The third switch electrically connects the positive electrode of the first sensing end with the second end point of the first golden finger,

The fourth switch electrically connects the negative electrode of the first sensing end with the second end point of the second golden finger,

And a current path is formed among the positive electrode of the first driving end, the first switch, the first golden finger, the first pin, the second golden finger, the second switch and the negative electrode of the first driving end, and the system detects the contact condition between the first golden finger and the second golden finger and the first pin and the first driving end.

In some embodiments, the first switch electrically connects the positive electrode of the first driving end with the second end of the third gold finger,

The third switch electrically connects the positive electrode of the first sensing end with the second end point of the third golden finger,

The fourth switch electrically connects the negative electrode of the first sensing end with the second end point of the fourth golden finger,

And a current path is formed among the positive electrode of the first driving end, the first switch, the third golden finger, the second pin, the fourth golden finger, the second switch and the negative electrode of the first driving end, and the system detects the contact condition among the third golden finger, the fourth golden finger, the second pin and the first driving end.

In some embodiments, the first signal sources are N, the switch array is N, and N is a positive integer greater than 1.

In some embodiments, the first and second pins are connected with respective gold fingers in a lap joint manner at the first end point.

In some embodiments, the driving and sensing ends are connected with respective gold fingers at the second end point in a lap joint and/or a weld.

The chip testing system comprises at least one first signal source, a chip socket and at least one switch array. The first signal source comprises a first driving end and a first sensing end which are independent from each other. The chip socket is used for bearing a chip to be tested, and the first pin and the second pin of the chip to be tested are respectively connected with the first end points of the corresponding golden fingers. The switch array is arranged between the positive electrode and the negative electrode of the first driving end and the first sensing end and the second end point of each golden finger, the first driving end is electrically connected with the chip socket through the switching of the switch array, and the first sensing end is electrically connected with the chip socket through the switching of the switch array. The chip testing system in the embodiment of the utility model can realize chip testing and detection of the contact condition among the chip socket, the chip and the testing environment, thereby improving the testing experience and the testing efficiency of testers.

Drawings

The above and other objects, features and advantages of the present utility model will become more apparent from the following description of embodiments of the present utility model with reference to the accompanying drawings, in which:

FIG. 1 is a schematic diagram of a chip test system according to an embodiment of the utility model;

Fig. 2 is a schematic diagram of a chip socket for mounting a chip to be tested according to an embodiment of the present utility model;

FIG. 3 is a circuit diagram of a chip test system according to an embodiment of the present utility model when the switch array is in a first state;

FIGS. 4 and 5 are circuit connection diagrams of the chip test system according to the embodiment of the present utility model when the switch array is in the second state;

FIG. 6 is a schematic diagram of a switch array according to an embodiment of the utility model;

fig. 7 is a circuit connection diagram of the chip test system according to the embodiment of the utility model when the switch array is in the second state.

Detailed Description

The present application is described below based on examples, but the present application is not limited to only these examples. In the following detailed description of the present application, certain specific details are set forth in detail. The present application will be fully understood by those skilled in the art without the details described herein. Well-known methods, procedures, flows, components and circuits have not been described in detail so as not to obscure the nature of the application.

Moreover, those of ordinary skill in the art will appreciate that the drawings are provided herein for illustrative purposes and that the drawings are not necessarily drawn to scale.

Unless specifically stated or limited otherwise, the terms "mounted," "connected," "secured" and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed, mechanically connected, electrically connected, directly connected, or indirectly connected through intervening media, in communication between two elements, or in an interaction relationship between two elements, unless otherwise specifically stated. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art according to the specific circumstances.

Spatially relative terms, such as "inner," "outer," "lower," "upper," and the like, may be used herein for ease of description to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that spatially relative terms may be intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the example term "below" can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

Unless the context clearly requires otherwise, the words "comprise," comprising, "and the like throughout the specification are to be construed as including, rather than being exclusive or exhaustive, that is to say, as" including but not limited to.

In the description of the present application, it should be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Furthermore, in the description of the present application, unless otherwise indicated, the meaning of "a plurality" is two or more.

Fig. 1 is a schematic diagram of a chip testing system according to an embodiment of the utility model. As shown in fig. 1, the chip test system includes a first signal source 11, a chip socket 12, and a switch array 13.

Wherein the first signal source 11 includes a first driving end 111 and a first sensing end 112 that are independent of each other. The first driving terminal 111 supplies a driving current. The first sensing terminal 112 performs voltage detection. It should be understood that, by separating the ports for providing the driving current and performing the voltage detection from each other, the present embodiment can ensure that the lead resistance and the test circuit in the current providing loop formed by the first driving terminal 111 will not affect the measurement result of the first sensing terminal 112 when the driving current is provided, so that the first sensing terminal 112 can measure more accurate voltage value data.

The chip socket 12 carries a chip 14 to be tested. The chip 14 to be tested may be any type of chip, and the type of the chip 14 to be tested is not particularly limited in the present application. Further, in the present embodiment, the chip to be tested 14 has a set of first pins 141 and second pins 142. The chip socket 12 may also establish electrical connection between pins of the chip 14 under test and the test environment while carrying the chip 14 under test. The first pin and the second pin are any group of pins of the chip to be tested, which can form a current loop, and the first pin can be a power pin and the second pin can be a ground pin.

Alternatively, the chip socket 12 may include a plurality of gold fingers. Each gold finger may be a sheet metal having conductivity. When the chip 14 to be tested is carried at the corresponding position of the chip socket 12, electrical connection between each pin of the chip 14 to be tested and the testing environment can be respectively established by a plurality of golden fingers. Further, the chip socket 12 may include a first gold finger 121, a second gold finger 122, a third gold finger 123, and a fourth gold finger 124. Each golden finger can be connected with the pin to form a first endpoint. Further, the first end of the first gold finger 121 and the first end of the second gold finger 122 are electrically connected to the first pin 141, and the first end of the third gold finger 123 and the first end of the fourth gold finger 124 are electrically connected to the second pin 142. It should be understood that fig. 1 only shows the case where the chip to be tested has one set of the first pins and the second pins, but in the practical application process, the chip to be tested may also have multiple sets of the first pins and the second pins. In contrast, when the chip under test has multiple sets of first pins and second pins, the chip socket 12 may further include more gold fingers to be electrically connected to the pins of the chip under test 14, respectively. Meanwhile, it should be noted that, in this embodiment, the first signal source 11 and the test circuit (the test circuit may be composed of a resistor, a capacitor, an inductor or other electronic components, and the specific structure of the test circuit is not limited in the present application) are combined together to form a test environment for testing the chip to be tested 14. Further, the test circuit may be disposed between the positive and negative electrodes of the first driving end and the first sensing end and the second end of each golden finger according to actual conditions.

The switch array 13 may be part of the first signal source 11 or be a stand alone structure. The switch array 13 may be disposed between the positive and negative electrodes of the first driving end 111 and the first sensing end 112 and the second end of each gold finger. It should be appreciated that each golden finger may also be connected to the switch array 13 to form a second end point.

In this embodiment, the first driving end 111 is electrically connected to the chip socket 12 through the switching of the switch array 13, and the first sensing end 112 is electrically connected to the chip socket 12 through the switching of the switch array 13, so as to test the chip 14 to be tested or detect the contact condition between the chip socket 12 and the chip 14 to be tested and the first signal source 11. Therefore, the chip testing system in the embodiment of the utility model realizes chip testing and detection of the contact condition among the chip socket, the chip and the testing environment, thereby improving the testing experience and the testing efficiency of testers.

Illustratively, the chip socket may include the chip carrier 22, the first leads 221, the second leads 222, the third gold finger 223, and the fourth gold finger 224 in fig. 2.

Fig. 2 is a schematic diagram of a chip socket for mounting a chip to be tested according to an embodiment of the present utility model. As shown in fig. 2, the chip 21 to be tested is mounted and fixed on the chip carrier 22. The chip 21 to be tested has a first pin 211 and a second pin 212. Further, each golden finger may have a first end point 225 formed thereon. Further, when the chip 21 to be tested is fixed on the chip socket 22, the first pins 211 may be connected to the first terminals 225 of the first gold finger 221 and the second gold finger 222, and the second pins 212 may be connected to the first terminals 225 of the third gold finger 223 and the fourth gold finger 224, respectively.

Further, each golden finger may also have a second terminal 226 formed thereon, and the second terminal 226 may be used to establish a connection between each golden finger and a test environment (the test environment is not shown in the figure) formed by a signal source and a test circuit, similar to the function of the first terminal 225.

Therefore, the chip to be tested and the test environment can be connected through the golden fingers, so that the electrical connection between the chip to be tested and the test environment is established. Optionally, in this embodiment, for convenience in testing different chips to be tested, the first pins 211 and the second pins 212 and the corresponding golden fingers may be connected in a lap joint manner at the first end point 225. The first driving end and the first sensing end of the first signal source and the corresponding golden finger may be connected in a lap joint manner and/or a welding manner at the second end point 226. Meanwhile, it is to be noted that, when the structure shown in fig. 2 is that the gold finger is a sheet metal, the gold finger is overlapped to the chip pins up and down, and the application is not limited to this case, and the gold finger may be a cylindrical (needle-shaped) gold finger, and the gold finger may also overlap the chip on the same side of the chip pins (i.e. the gold finger is above or below the chip pins).

Alternatively, in this embodiment, the switch array may have a first state and a second state. The switch arrays in different states can control the positive and negative electrodes of the first driving end and the first sensing end to be respectively and electrically connected with the second ends of different golden fingers so as to test the chip to be tested by a tester or detect the contact condition between the golden fingers and the first signal source and between the golden fingers and the pins of the chip.

Fig. 3 is a circuit connection diagram of the chip test system according to the embodiment of the utility model when the switch array is in the first state. It is to be noted that the circuit connection diagram shown in fig. 3 is a simplified schematic diagram for the sake of easy understanding. In practical application, the circuit diagram of the chip test system when the switch array is in the first state is not limited to that shown in fig. 3.

As shown in fig. 3, the switch array in the first state may control the positive electrode 311 and the negative electrode 314 of the first driving end to be electrically connected to the second terminals of the first gold finger 321 and the fourth gold finger 324, respectively. Thus, the switch array in the first state can connect the positive and negative electrodes of the first driving end of the first signal source with the first pin 331 and the second pin 332, so as to form a current path between the positive electrode of the first driving end, the first gold finger, the first pin, the inside of the chip 33 to be tested, the second pin, the fourth gold finger and the negative electrode of the first driving end. Meanwhile, the switch array in the first state may further control the positive electrode 312 and the negative electrode 313 of the first sensing end of the first signal source to be electrically connected with the second end points of the second gold finger 322 and the third gold finger 323, respectively, so as to connect the positive electrode and the negative electrode of the first sensing end of the first signal source with the first pin 331 and the second pin 332, thereby measuring the relevant electrical parameters of the chip 33 to be measured.

It should be understood that, when testing the relevant parameters of the chip 33 to be tested, the first driving end of the first signal source may provide the supply current capable of meeting the test requirement for the chip 33 to be tested under the control of the tester, which is not limited in the present application.

Fig. 4 and 5 are circuit connection diagrams of the chip test system according to the embodiment of the utility model when the switch array is in the second state. It is to be noted that the circuit connection diagrams shown in fig. 4 and 5 are simplified schematic diagrams for the sake of easy understanding. In practical applications, the circuit connection diagram of the chip test system when the switch array is in the second state is not limited to those shown in fig. 4 and 5.

As shown in fig. 4, the switch array in the second state may control the positive electrode 411 and the negative electrode 413 of the first driving end to be electrically connected to the second terminals of the first gold finger 421 and the second gold finger 422, respectively. Thus, the switch array in the second state may switch on the positive and negative electrodes of the first driving end and the first pin 431 of the first signal source, so as to form a current path between the positive electrode of the first driving end, the first gold finger 421, the first pin 431, the second gold finger 422 and the negative electrode of the first driving end. Meanwhile, the switch array in the second state may further control the positive electrode 412 and the negative electrode 414 of the first sensing end of the first signal source to be electrically connected to the second ends of the first gold finger 421 and the second gold finger 422, respectively, so that the first sensing end measures the voltage values of the first gold finger 421 and the second gold finger 422 at the second end point.

It should be appreciated that in making the contact condition detection, the first drive terminal provides a constant current having a preset current value. Further, according to the voltage values of the first golden finger 421 and the second golden finger 422 at the second end point detected by the first sensing end, the voltage drops (the voltage drops are the difference between the two voltage values) generated by the contact resistances of the first golden finger 421 and the second golden finger 422 at the first end point and the second end point and the internal resistances of the first golden finger 421 and the second golden finger 422 can be calculated. Furthermore, according to the calculated voltage drop and the preset current value, the present embodiment may calculate the sum of the contact resistances of the first and second golden fingers 421 and 422 at the first and second endpoints and the internal resistances of the first and second golden fingers 421 and 422 (the sum of the resistances is the quotient of the voltage drop and the preset current value). And then, the tester can compare the total resistance with a specific resistance threshold (for example, 2 ohms) so as to judge whether the contact condition between the golden finger of the chip socket and the first signal source and the pin of the chip to be tested is good.

Alternatively, as shown in fig. 5, the switch array in the second state may also control the positive electrode 511 and the negative electrode 513 of the first driving end to be electrically connected to the second terminals of the third gold finger 521 and the fourth gold finger 522, respectively. Thus, the switch array in the second state may turn on the first driving terminal positive and negative electrode of the first signal source to the second pin 531, so as to form a current path between the first driving terminal positive electrode, the third gold finger 521, the second pin 531, the fourth gold finger 522, and the first driving terminal negative electrode. Meanwhile, the switch array in the second state may further control the positive electrode 512 and the negative electrode 514 of the first sensing end of the first signal source to be electrically connected to the second ends of the third gold finger 521 and the fourth gold finger 522, respectively, so that the first sensing end measures the voltage values of the third gold finger 521 and the fourth gold finger 522 at the second end point.

It should be appreciated that in making the contact condition detection, the first drive terminal provides a constant current having a preset current value. Further, according to the voltage values of the third gold finger 521 and the fourth gold finger 522 at the second end point detected by the first sensing end, the voltage drops (the voltage drops are the difference between the two voltage values) generated by the contact resistances of the third gold finger 521 and the fourth gold finger 522 at the first end point and the second end point and the internal resistances of the third gold finger 521 and the fourth gold finger 522 can be calculated. Furthermore, according to the calculated voltage drop and the preset current value, the present embodiment may calculate the sum of the contact resistances of the third gold finger 521 and the fourth gold finger 522 at the first end point and the second end point and the resistances of the internal resistances of the third gold finger 521 and the fourth gold finger 522 (the sum of the resistances is the quotient of the voltage drop and the preset current value). And then, the tester can compare the total resistance with a specific resistance threshold (for example, 2 ohms) so as to judge whether the contact condition between the golden finger of the chip socket and the first signal source and the pin of the chip to be tested is good.

It will be appreciated that the switch array may implement both the connection circuit shown in fig. 4 and the connection circuit shown in fig. 5 when in the second state, which may be specifically selected and set by a tester, and the application is not limited in this regard.

Alternatively, to implement the connection circuit as shown in fig. 3, 4 and 5, the switch array may include a plurality of switches disposed between the first driving terminal positive and negative electrodes and the respective golden finger second terminals, and between the first sensing terminal positive and negative electrodes and the respective golden finger second terminals.

Fig. 6 is a schematic diagram of a switch array according to an embodiment of the utility model. As shown in fig. 6, the switch array 61 may include a first switch 611, a second switch 612, a third switch 613, and a fourth switch 614.

The first switch 611 is disposed between the positive electrode 621 of the first driving end and the second ends of the first gold finger 631 and the third gold finger 633. The second switch 612 is disposed between the negative electrode 622 of the first driving end and the second end points of the second gold finger 632 and the fourth gold finger 634. The third switch 613 is disposed between the positive electrode 623 of the first sensing end and the second ends of the first gold finger 631, the second gold finger 632 and the third gold finger 633. The fourth switch 614 is disposed between the negative electrode 624 of the first sensing end and the second ends of the second gold finger 632, the third gold finger 633 and the fourth gold finger 634.

Further, when the switch array 61 is in the first state, the first switch 611 may control the positive electrode 621 of the first driving end to be electrically connected with the second end of the first gold finger 631, the second switch 612 may control the negative electrode 622 of the first driving end to be electrically connected with the second end of the fourth gold finger 634, the third switch 613 may control the positive electrode 623 of the first sensing end to be electrically connected with the second end of the second gold finger 632, and the fourth switch 614 may control the negative electrode 624 of the first sensing end to be electrically connected with the second end of the third gold finger 633. Thus, the present embodiment can obtain a connection circuit as shown in fig. 3.

When the switch array 61 is in the second state, the first switch 611 may control the positive electrode 621 of the first driving end to be electrically connected with the second end of the first gold finger 631, the second switch 612 may control the negative electrode 622 of the first driving end to be electrically connected with the second end of the second gold finger 632, the third switch 613 may control the positive electrode 623 of the first sensing end to be electrically connected with the second end of the first gold finger 631, and the fourth switch 614 may control the negative electrode 624 of the first sensing end to be electrically connected with the second end of the second gold finger 632. Thus, the present embodiment can obtain a connection circuit as shown in fig. 4.

Or when the switch array 61 is in the second state, the first switch 611 may also control the positive electrode 621 of the first driving end to be electrically connected with the second end point of the third gold finger 633, the second switch 612 may control the negative electrode 622 of the first driving end to be electrically connected with the second end point of the fourth gold finger 634, the third switch 613 may control the positive electrode 623 of the first sensing end to be electrically connected with the second end point of the third gold finger 633, and the fourth switch 614 may control the negative electrode 624 of the first sensing end to be electrically connected with the second end point of the fourth gold finger 634. Thus, the present embodiment can obtain a connection circuit as shown in fig. 5.

It should be understood that, in order to conveniently show the connection relationship between the switches and the gold fingers, in the chip test system shown in fig. 6, the same letter is identified on the right side of the switch and the left side of the gold finger, which are capable of establishing electrical connection. Meanwhile, it is expected that one switch can only be connected with the second end of one golden finger at the same time, and the specific connection object of each switch can be specifically determined according to the state of the switch array and the setting of a tester.

Alternatively, in this embodiment, the switch may be a relay or a single pole multiple throw switch, which is not limited in this aspect of the application.

Optionally, in some embodiments, in order to detect the contact condition of the first gold finger and the second gold finger at the first endpoint and the second endpoint and the contact condition of the third gold finger and the third gold finger at the first endpoint and the second endpoint at the same time, a second signal source may be further included in the chip test system. The second signal source may include a second driving terminal and a second sensing terminal independent of each other, similar to the first signal source. The second driving end provides driving current, and the second sensing end detects voltage.

Further, the switch array may be further disposed between the positive and negative electrodes of the second driving end and the second sensing end and the second end point of each gold finger. The switch array in the second state can also control the positive and negative electrodes of the first driving end, the first sensing end, the second driving end and the second sensing end to be respectively and electrically connected with the second ends of different golden fingers, so that a tester can detect the contact condition of the first golden finger and the second golden finger at the first end point and the second end point and the contact condition of the third golden finger and the third golden finger at the first end point and the second end point at the same time.

Fig. 7 is a circuit connection diagram of the chip test system according to the embodiment of the utility model when the switch array is in the second state. It is to be noted that the circuit connection diagram shown in fig. 7 is a simplified schematic diagram for the sake of easy understanding. In practical application, the circuit diagram of the chip test system when the switch array is in the second state is not limited to that shown in fig. 7.

As shown in fig. 7, the switch array in the second state may control the positive electrode 711 and the negative electrode 713 of the first driving end to be electrically connected to the second end points of the first gold finger 721 and the second gold finger 722, respectively, and control the positive electrode 715 and the negative electrode 717 of the second driving end to be electrically connected to the second end points of the third gold finger 723 and the fourth gold finger 724, respectively. Therefore, in the embodiment, a current path can be formed between the positive electrode of the first driving end, the first golden finger, the first pin, the second golden finger and the negative electrode of the first driving end through the first driving end and the second driving end, and a current path can be formed between the positive electrode of the second driving end, the third golden finger, the second pin, the fourth golden finger and the negative electrode of the second driving end. Meanwhile, the switch array in the second state may further control the positive electrode 712 and the negative electrode 714 of the first sensing end to be electrically connected with the second end points of the first gold finger 721 and the second gold finger 722, respectively, and control the positive electrode 716 and the negative electrode 718 of the second sensing end to be electrically connected with the second end points of the third gold finger 723 and the fourth gold finger 724, respectively. Thus, the first sensing end and the second sensing end can respectively measure the voltage values of the first gold finger 721 and the second gold finger 722 at the second end point and the voltage values of the third gold finger 723 and the fourth gold finger 724 at the second end point.

It should be understood that, in the same manner as the determination of the total resistance in the above-described embodiment, after the voltage values are acquired, the present embodiment may calculate and determine the total resistance of the contact resistances of the first and second gold fingers 721 and 722 at the first and second end points and the internal resistances of the first and second gold fingers 721 and 722, and the total resistance of the contact resistances of the third and fourth gold fingers 723 and 724 at the first and second end points and the internal resistances of the third and fourth gold fingers 723 and 724, respectively, based on the acquired voltage values. Furthermore, the tester can compare the total resistance with the corresponding specific resistance threshold value respectively, so as to judge whether the contact condition of the first golden finger and the second golden finger at the first endpoint and the second endpoint and the contact condition of the third golden finger and the third golden finger at the first endpoint and the second endpoint are good.

Optionally, to implement the connection circuit as shown in fig. 7, the switch array may further include a second switch array. Wherein the second switch array may include a fifth switch, a sixth switch, a seventh switch, and an eighth switch. Further, the fifth switch may be disposed between the positive electrode of the second driving end and the second end of the third gold finger. The sixth switch may be disposed between the negative electrode of the second driving end and the second end of the fourth gold finger. The seventh switch may be disposed between the positive electrode of the second sensing terminal and the second end of the third gold finger. The eighth switch may be disposed between the negative electrode of the second sensing terminal and the second end of the fourth gold finger.

Further, when the switch array is in the second state, the fifth switch can control the positive electrode of the second driving end to be electrically connected with the second end point of the third golden finger, the sixth switch can control the negative electrode of the second driving end to be electrically connected with the second end point of the fourth golden finger, the seventh switch can control the positive electrode of the second sensing end to be electrically connected with the second end point of the third golden finger, and the eighth switch can control the negative electrode of the second sensing end to be electrically connected with the second end point of the fourth golden finger. Thus, the present embodiment can constitute a connection circuit as shown in fig. 6.

It will be appreciated that the switch array may implement both the connection circuit shown in fig. 4 and the connection circuit shown in fig. 5 and the connection circuit shown in fig. 7 when in the second state, which may be specifically selected and set by a tester, and the application is not limited in this regard.

Alternatively, in this embodiment, the negative electrode of the second driving end may be shorted with the negative electrode of the first driving end, and the negative electrode of the second sensing end may be shorted with the negative electrode of the first sensing end.

The above description is only of the preferred embodiments of the present application and is not intended to limit the present application, and various modifications and variations may be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. A chip testing system, the system comprising:

2. The system of claim 1, wherein the chip socket comprises a first gold finger, a second gold finger, a third gold finger, and a fourth gold finger, each gold finger is connected with the switch array to form a second end point, each gold finger is connected with a pin to form a first end point, the first end point of the first gold finger and the first end point of the second gold finger are both connected with the first pin, and the first end point of the third gold finger and the first end point of the fourth gold finger are both connected with the second pin.

3. The system of claim 2, wherein the switch array comprises a first switch, a second switch, a third switch, and a fourth switch;

4. The system of claim 3, wherein the first switch electrically connects the positive electrode of the first drive end to the second end of the first gold finger,

5. The system of claim 3, wherein the first switch electrically connects the positive electrode of the first drive end to the second end of the first gold finger,

6. The system of claim 3, wherein the first switch electrically connects the positive electrode of the first drive end to the second end of the third gold finger,

7. The system of claim 1, wherein the first signal source is N, the switch array is N, and N is a positive integer greater than 1.

8. The system of claim 2, wherein the first and second pins are connected with the respective golden fingers in a lap joint at the first end point.

9. The system of claim 8, wherein the driving and sensing ends are connected with respective golden fingers at the second end point in a lap joint and/or a weld.