Battery power-down detection circuit and electronic equipment
Technical Field
The utility model relates to a power failure detection technology, in particular to a battery power failure detection circuit and electronic equipment.
Background
Along with the update and evolution of the intelligent age, various system integration complete machine products are vigorously developed, such as a gas meter main board, a water meter main board and the like. Such products cannot be powered from home to home for safety reasons and usage scenarios, and require battery power. The battery-powered device needs to control power consumption because the smaller the power consumption is, the longer the battery is used, the lower the frequency of battery replacement, and the user experience can be increased. In addition, the product needs to process the power failure condition such as battery replacement by the main board, and the main board can also keep the electric quantity for a certain time after the battery is scratched and respond to the power failure.
Currently, products on the market commonly adopt large electrolytic capacitors to freewheel under the condition of power failure, and power failure detection is realized through an ADC acquisition function of an MCU, namely, the MCU is enabled to perform electric quantity acquisition and comparison in frequent timing work, and if the comparison value is lower than a threshold value, power failure is judged. This solution has the following drawbacks:
1. Many low cost MCUs on the market do not have ADC acquisition capability, and if some external chips are added for power comparison, the cost will be increased.
2. The power failure detection has delay, and the response processing frequency of the selected MCU is very tested.
3. Because MCU needs to respond to ADC acquisition frequently, the power consumption of MCU when also very test the response ADC acquisition of selecting.
The MCU with the ADC acquisition function, lower in power consumption and faster in response frequency is more expensive, the cost of a product is certainly increased, and the MCU is required to be in a working state due to the fact that the power failure detection is realized by adopting ADC acquisition comparison, the power consumption is still higher, and the low-delay detection cannot be realized due to the existence of an acquisition period and the time required for comparing and responding acquired data.
Disclosure of utility model
The utility model aims to solve the technical problems of providing a battery power failure detection circuit and electronic equipment, which realize ultra-low-delay power failure detection and have low power consumption and low cost.
The technical scheme adopted for solving the technical problems is as follows:
In one aspect, the utility model provides a battery power failure detection circuit, which is applied to electronic equipment powered by a battery, and comprises a first MOS tube, a second MOS tube, a first resistor, a second resistor, a third resistor and a diode;
The drain electrode of the first MOS tube is connected with an interrupt IO port of an MCU of the electronic equipment, the terminal IO port of the MCU of the electronic equipment is connected with a first resistor serving as a pull-up resistor, the source electrode of the first MOS tube is grounded, the grid electrode of the first MOS tube is connected with a second resistor serving as the pull-up resistor and is connected with the drain electrode of the second MOS tube, the source electrode of the second MOS tube is grounded, the grid electrode of the second MOS tube is grounded through a third resistor and is connected with the positive electrode of a battery of the electronic equipment, the positive electrode of the diode is connected with the positive electrode of the battery of the electronic equipment, the negative electrode of the diode is connected with the negative electrode of an energy storage capacitor in the electronic equipment and is connected with the power supply input end of the electronic equipment, and the positive electrode of the energy storage capacitor in the electronic equipment is grounded.
Further, the first MOS tube and the second MOS tube are NMOS tubes.
Further, the second resistor adopts a resistor with a resistance value of more than 500 Kohm.
Further, the third resistor adopts a resistor with a resistance value of more than 1 megaohm.
On the other hand, based on the battery power-down detection circuit, the utility model also provides electronic equipment which comprises the MCU, the energy storage capacitor and the battery power-down detection circuit.
The beneficial effects of the utility model are as follows:
(1) The power failure detection circuit provided by the utility model adopts the double MOS tube switch to trigger the interruption of the MCU, so that the MCU can acquire the power failure condition of the battery, and the on-off time of the MOS tube is usually in nanosecond level, so that the power failure of the battery can be detected by ultra-low delay.
(2) The MCU of the electronic equipment is not required to have an ADC acquisition function, and the MCU is not required to frequently perform the ADC electric quantity acquisition function to judge the power failure, so that the cheaper MCU can be selected to carry the power failure detection circuit, the cost of the whole machine is reduced, in addition, the MCU is not required to be in a working state for a long time only when the power failure is detected by triggering the interrupt IO of the MCU at the moment of power failure, and a sleep mode is adopted, thereby reducing the power consumption of the whole machine and prolonging the service life of a battery.
(3) The power failure detection circuit provided by the utility model only adopts two MOS tubes, three resistors and one diode, and has the advantages of simple circuit structure, easiness in implementation and low cost.
Drawings
Fig. 1 is a schematic diagram of a battery power failure detection circuit in an embodiment of the utility model;
Wherein, Q11 is a first MOS tube, Q12 is a second MOS tube, R62 is a first resistor, R61 is a second resistor, R64 is a third resistor, D4 is a diode, and C32 is an energy storage capacitor.
Detailed Description
The utility model aims to provide a battery power failure detection circuit and electronic equipment, which realize ultra-low-delay power failure detection and have low power consumption and low cost. The battery power failure detection circuit mainly comprises two MOS tubes, wherein one MOS tube is connected with the battery output and is used as an interrupt response switch to turn over a battery power failure signal and then transmit the battery power failure signal to the other MOS tube, the other MOS tube is used as a momentary switch and is connected with an interrupt IO port of an MCU, and when the other MOS tube receives the turn-over signal of the power failure signal, the interrupt IO port of the MCU is controlled to change the level state so as to trigger the power failure detection of the MCU.
Meanwhile, the MCU of the electronic equipment is not required to have an ADC acquisition function, and the MCU is not required to frequently perform the ADC electric quantity acquisition function to judge the power failure, so that the cheaper MCU can be selected to carry the power failure detection circuit, the cost of the whole machine is reduced, in addition, the MCU is not required to be in a working state for a long time only when the power failure is detected by triggering the interrupt IO of the MCU, and the sleep mode can be adopted, thereby reducing the power consumption of the whole machine and prolonging the service life of a battery.
Finally, the power failure detection circuit provided by the utility model only adopts two MOS tubes, three resistors and one diode, and has the advantages of simple circuit structure, easiness in implementation and low cost.
The embodiments of the present utility model will be further described with reference to the drawings.
Examples
Referring to fig. 1, the battery power-down detection circuit provided in this embodiment is composed of a first MOS transistor Q11, a second MOS transistor Q12, a first resistor R62, a second resistor R61, a third resistor R64, and a diode D4;
The drain electrode of the first MOS tube Q11 is connected with an interrupt IO port of an MCU of the electronic equipment, the terminal IO port of the MCU of the electronic equipment is connected with a first resistor R62 serving as a pull-up resistor, the source electrode of the first MOS tube Q11 is grounded, the grid electrode of the first MOS tube Q11 is connected with a second resistor R61 serving as a pull-up resistor and is connected with the drain electrode of the second MOS tube Q12, the source electrode of the second MOS tube Q12 is grounded, the grid electrode is grounded through a third resistor R64 and is connected with the positive electrode of a battery of the electronic equipment, the positive electrode of the diode D4 is connected with the positive electrode of the battery of the electronic equipment, the negative electrode of the diode D4 is connected with the negative electrode of an energy storage capacitor C32 in the electronic equipment and is connected with the power supply input end of the electronic equipment, and the positive electrode of the energy storage capacitor C32 in the electronic equipment is grounded.
The function of each device in the circuit is described as follows:
the MCU interrupt IO port is connected with a first resistor R62, and the first resistor R62 is pulled up to clamp the normal state of the MCU interrupt IO at a high level.
The first MOS transistor Q11 adopts an NMOS transistor as an instantaneous switch to control the MCU to interrupt the level of IO.
The first MOS transistor Q11 is connected to the second resistor R61, and the second resistor R61 is pulled up to clamp the G-pole potential of the first MOS transistor Q11 at a high level when the second MOS transistor Q12 is not turned on, and the resistance of the second resistor R61 needs to be set to be above 5OOK pole, which is to control the leakage current to be very small when the second MOS transistor Q12 is turned on.
The second MOS transistor Q12 is used as an interrupt response switch and transmits a power-down signal to the G electrode of the first MOS transistor Q11 in a turnover mode, the G electrode of the second MOS transistor Q12 is connected with a third resistor to the ground so as to provide a reference ground plane for the G electrode of the second MOS transistor Q12, and R64 is required to be more than 1 megaohm, so that the battery leakage current is controlled to be small.
The diode D4 functions to achieve unidirectional passage of current, i.e. to let current only pass from the battery to the load (electronics) and the storage capacitor C32, but not to let the storage capacitor C32 and the load pass back to the battery.
The energy storage capacitor C32 is used for continuously supplying power to the load by using the stored electric energy after the battery is powered down.
The working principle of the power failure detection circuit is as follows:
When the battery works normally, the energy storage capacitor C32 is charged through the diode D4 and supplies power to the load MCU, at the moment, the G electrode potential of the second MOS tube Q12 is high potential (battery voltage), so that the D end and the S end of the second MOS tube Q12 are conducted due to the GS positive voltage difference of the second MOS tube Q12, the D end of the second MOS tube Q12, namely the G end of the first MOS tube Q11, is low potential, at the moment, the G end and the S end of the first MOS tube Q11 are both low potential, the first MOS tube Q11 is in an off state, and the MCU interrupt IO is in a high level state.
When the battery is powered down (if the battery is scratched off), the MCU in the load is continuously powered by the energy storage capacitor C32, the G pole of the second MOS tube Q12 is changed to be low level, the difference between the G pole and the S pole of the second MOS tube Q12 is insufficient, the second MOS tube Q12 is turned off, the D pole of the second MOS tube Q12 (the G pole of the first MOS tube Q11) is changed to be high potential, so that the positive voltage difference between the G pole and the S pole of the first MOS tube Q11 is enough, the D end and the S end of the first MOS tube Q11 are conducted, the MCU interrupts IO and is pulled down to be in a low level state, and the signal is transmitted back to the MCU for processing, and the battery power-down detection is realized.
Finally, it should be noted that the above examples are only preferred embodiments and are not intended to limit the utility model. It should be noted that modifications, equivalents, improvements and others may be made by those skilled in the art without departing from the spirit of the utility model and the scope of the claims, and are intended to be included within the scope of the utility model.