CN222506888U

CN222506888U - Communication sub-card for sharing by multiple hosts and host system

Info

Publication number: CN222506888U
Application number: CN202420775485.0U
Authority: CN
Inventors: 胥执辉; 李凯; 王蓉; 华红波; 张媛
Original assignee: Chengdu Kaidi Feiyan Technology Co ltd
Current assignee: Chengdu Kaidi Feiyan Technology Co ltd
Priority date: 2024-04-15
Filing date: 2024-04-15
Publication date: 2025-02-18
Anticipated expiration: 2034-04-15

Abstract

The utility model relates to a communication sub-card for sharing multiple hosts and a host system, wherein the communication sub-card comprises an FPGA chip, an MCU chip, a connector, a first communication module, an IIC module, a first storage unit, a second storage unit, an Ethernet module and a PCIE communication module, the FPGA chip and the MCU chip are connected through SPI communication, the FPAG chip is connected with the second storage unit, the FPGA chip is connected with the connector through the PCIE communication module, the first communication module and the Ethernet module, the MCU chip is connected with the first storage unit, the MCU chip is connected with the connector through an IIC interface module, and the MCU chip is connected with the connector through the first communication module. The utility model has the beneficial effects of providing a communication sub-card and a host system which are highly integrated and save space and are shared by multiple hosts, and solving the problem that the network card communication equipment occupies space.

Description

Communication sub-card for sharing by multiple hosts and host system

Technical Field

The present utility model relates to the field of communications technologies, and in particular, to a communication sub-card and a host system for sharing by multiple hosts.

Background

The current standard communication network card is used in the form of one network card of one host, and the number of network cards needed by the number of hosts for communication is all that is needed, and the network cards are all inserted on the hosts in the form of single PCIE golden fingers for use.

This form of use of "one host with one network card" requires the user to have enough space to accommodate the network card device. Can be used only with marginal space requirements. However, in the fields of aviation, aerospace and the like which are sensitive to space, the use form occupies precious space of equipment, structural design is limited, new equipment cannot be added, and the overall design of an aircraft is further affected.

Therefore, the utility model provides a communication sub-card shared by multiple hosts and a host system.

Disclosure of utility model

The utility model aims to overcome the defects of the prior art, provide a communication sub-card and a host system which are highly integrated and save space and are shared by multiple hosts, and solve the problem that network card communication equipment occupies space.

The aim of the utility model is achieved by the following technical scheme:

In a first aspect of the present utility model, a communication daughter card for sharing by multiple hosts includes an FPGA chip, an MCU chip, a connector, a first communication module, an IIC module, a first storage unit, a second storage unit, an ethernet module, and a PCIE communication module;

the FPGA chip and the MCU chip are connected through SPI communication;

The FPGA chip is in communication connection with the second storage unit, the FPGA chip is connected with the connector through the PCIE communication module, the FPGA chip is in communication connection with the connector through the first communication module, and the FPGA chip is connected with the connector through the Ethernet module;

The MCU chip is in communication connection with the first storage unit, the MCU chip is in communication connection with the connector through the IIC module, and the MCU chip is in communication connection with the connector through the first communication module.

Further, the first communication module is an RS232 serial port communication module or an RS485 serial port communication module.

Further, the first storage unit is an NVRAM storage chip.

Further, the second storage unit comprises a DDR3 memory and a FLASH memory, the FPGA chip is spliced with the DDR3 memory through a GPIO port, and the FPGA chip is connected with the FLASH memory through a QSPI interface.

Further, the PCIE communication module includes at least a first PCIE interface and a second PCIE interface, the FPGA chip is connected to the connector through the first PCIE interface, and the FPGA chip is connected to the connector through the second PCIE interface and is used for connecting to the connector.

The MCU chip is connected with the connector through the first IIC interface and used for sending management signals to the carrier plate, and the MCU chip is connected with the connector through the second IIC interface and used for collecting information on the carrier plate.

Further, the carrier plate comprises a temperature acquisition module and a voltage acquisition module.

In a second aspect of the present utility model, a host system for sharing multiple hosts is provided, where the communication sub-card is inserted and installed on a carrier board, the carrier board is connected to a first host through a serial port, an optical port or a USB, a second host is connected to the carrier board through a cable interface, the first host, the second host and the communication sub-card are connected in communication, and the first host and the second host are connected to a communication sub-card sharing network.

Further, the carrier plate also comprises a DC-DC & LD0 module, a temperature acquisition module and a voltage acquisition module;

The DC-DC & LD0 module is connected with the connector, the temperature acquisition module is connected with the MCU chip through the IIC module, and the voltage acquisition module is connected with the MCU chip through the IIC module.

The utility model has the following advantages:

According to the utility model, the communication sub-card is designed, the communication sub-card and the carrier plate are connected in an inserting way and can be detachably arranged on the carrier plate, so that the communication sub-card can be conveniently and separately overhauled in a unit module mode, or the standard component equipment for mass production is prevented from being damaged, other components which can normally work are also not operable, and the components can be mutually replaced and arranged, so that the cost is saved;

(2) The utility model adopts a shared network card, namely a communication sub-card, which is shared by a plurality of hosts, the communication sub-card is connected with the plurality of hosts, and the plurality of hosts realize network sharing through hardware connection; in the utility model, the first host and the second host directly share one communication sub-card, and can be connected to one network without the need of the other network card or the connection of an additional switch, thereby reducing the expenditure of the network card, the switch and the optical fiber cable, simultaneously reducing the occupied space of host equipment, saving the occupied space of equipment and meeting the requirements for special structural space in the aviation and aerospace fields.

Drawings

FIG. 1 is a schematic diagram of a communication daughter card according to the present utility model;

FIG. 2 is a schematic diagram of a host system according to the present utility model.

Detailed Description

The present utility model will be further described with reference to the accompanying drawings, but the scope of the present utility model is not limited to the following.

It should be noted that, the azimuth or positional relationship indicated by "left", "right", etc. is based on the azimuth or positional relationship shown in the drawings, or the azimuth or positional relationship conventionally put in use of the inventive product, or the azimuth or positional relationship conventionally understood by those skilled in the art, such terms are merely for convenience of describing the present utility model and simplifying the description, and do not indicate or imply that the apparatus or element referred to must have a specific azimuth, be configured and operated in a specific azimuth, and therefore should not be construed as limiting the present utility model.

It should be noted that, under the condition of no conflict, the embodiments of the present utility model and the features and technical solutions in the embodiments may be combined with each other.

As shown in fig. 1 to fig. 2, a communication sub-card and a host system for sharing by multiple hosts according to the present embodiment are provided;

The first aspect of the present embodiment provides a communication sub-card for sharing by multiple hosts, including an FPGA chip, an MCU chip, a connector, a first communication module, an IIC module, a first storage unit, a second storage unit, an ethernet module, and a PCIE communication module;

The FPGA chip is in communication connection with the MCU chip through an SPI, the FPGA chip is in communication connection with the second storage unit, the FPGA chip is in communication connection with the connector through a PCIE communication module, the FPGA chip is in communication connection with the connector through an Ethernet module, the MCU chip is in communication connection with the first storage unit, in some preferred embodiments, the first storage unit is an NVRAM storage chip, the MCU chip is in communication connection with the connector through an IIC module, the MCU chip is in communication connection with the connector through the first communication module, in some preferred embodiments, the first communication module is an RS232 serial port communication module or an RS485 serial port communication module, and the Ethernet module is a 10G Ethernet interface used for realizing photoelectric signal conversion on the carrier board through the connector.

The second storage unit comprises a DDR3 memory and a FLASH memory, wherein the FPGA chip is spliced with the DDR3 memory through a GPIO port and connected with the FLASH memory through a QSPI interface.

In some embodiments, the PCIE communication module includes a first PCIE interface and a second PCIE interface, where the first PCIE interface is controlled by an IP hard core of the FPGA chip, the FPGA chip is connected to the connector through the first PCIE interface and is used to implement network communication and data forwarding with the host, and the second PCIE interface is controlled by an IP soft core of the FPGA chip, and the FPGA chip is connected to the connector through the second PCIE interface and is used to implement network communication and data forwarding with the host.

In some embodiments, the IIC module includes a first IIC interface and a second IIC interface, the MCU chip is connected to the connector through the first IIC interface and is configured to send a management signal to the carrier through the connector, and the MCU chip is connected to the connector through the second IIC interface and is configured to collect an electrical signal on the carrier through the connector.

The communication sub card is arranged on the carrier plate during operation, the communication sub card is detachably arranged on the carrier plate through the design of the unit module, the chip and the connector are not fixedly connected, the communication sub card is convenient to separately overhaul in the form of the unit module, or other parts which can normally work after one part of the communication sub card is damaged are prevented from being inoperable between standard part equipment for mass production, and the communication sub card can be mutually replaced and arranged so as to save the cost.

The second aspect of the present embodiment provides a host system for sharing by multiple hosts, as shown in fig. 2, where the host system includes a first host, a second host, a carrier board, and a communication sub-card for sharing by multiple hosts according to the first aspect of the present embodiment, where the communication sub-card is plugged onto the carrier board, the carrier board is connected to the first host through a serial port, an optical port or a USB, the second host is connected to the carrier board through a cable interface, and in some implementations, the carrier board is connected to the second host through an outgoing slim sams interface, and the first host, the second host, and the communication sub-card are connected in communication, and the first host and the second host are connected to the communication sub-card to share a network.

In some embodiments, the carrier plate comprises a DC-DC & LD0 module, a temperature acquisition module and a voltage acquisition module, wherein the DC-DC & LD0 module is connected with a connector, the DC-DC & LD0 module is used for carrying out voltage reduction and voltage stabilization operation on power supply voltage and providing stable working voltage for the FPGA through the connector, the temperature acquisition module is connected with an MCU chip through an IIC module, the voltage acquisition module is connected with the MCU chip through the IIC module, and the MCU chip acquires information of the temperature acquisition module and information of the voltage acquisition module through XX and is used for monitoring the working state of the carrier plate.

In operation, the embodiment connects multiple hosts through the communication sub-card, as shown in fig. 2, the communication sub-card is mounted on the carrier plate, the carrier plate is mounted on the first host through serial ports, optical ports or USB plugs for realizing network communication for the first host, the carrier plate is connected with the second host through a slot Sas interface for providing network communication for the second host, and at this time, the first host and the second host are both connected with the communication sub-card through the carrier plate, and share the network through the communication sub-card. For the prior art, as shown in fig. 2, a common network card 1 is installed on a third host computer, a common network card 2 is installed on a fourth host computer, the third host computer and the fourth host computer are connected to the switch through optical fiber cables, at the moment, the third host computer and the fourth host computer are connected to the same network, but the third host computer and the fourth host computer respectively use one network card.

The foregoing examples represent only preferred embodiments, which are described in more detail and are not to be construed as limiting the scope of the utility model. It should be noted that variations and modifications can be made by those skilled in the art without departing from the spirit of the utility model, which falls within the scope of the utility model.

Claims

1. The communication sub-card for sharing by multiple hosts is characterized by comprising an FPGA chip, an MCU chip, a connector, a first communication module, an IIC module, a first storage unit, a second storage unit, an Ethernet module and a PCIE communication module;

the FPGA chip and the MCU chip are connected through SPI communication;

the FPGA chip is in communication connection with the second storage unit, the FPGA chip is connected with the connector through the PCIE communication module, the FPGA chip is in communication connection with the connector through the first communication module, and the FPAGA chip is connected with the connector through the Ethernet module;

2. The communication sub-card for sharing by multiple hosts according to claim 1, wherein the first communication module is an RS232 serial communication module or an RS485 serial communication module.

3. The communication daughter card of claim 1 wherein said first storage unit is an NVRAM storage chip.

4. The communication sub-card for sharing by multiple hosts according to claim 1, wherein the second storage unit comprises a DDR3 memory and a FLASH memory, the FPGA chip is spliced with the DDR3 memory through a GPIO port, and the FPGA chip is connected with the FLASH memory through a QSPI interface.

5. The communication daughter card for sharing by multiple hosts of claim 1 wherein the PCIE communication module comprises a first PCIE interface and a second PCIE interface, the FPGA chip is connected with the connector through the first PCIE interface, and the FPGA chip is connected with the connector through the second PCIE interface.

6. The communication sub-card for sharing by multiple hosts according to claim 1, wherein the IIC module comprises a first IIC interface and a second IIC interface, the MCU chip is connected with the connector through the first IIC interface, and the MCU chip is connected with the connector through the second IIC interface.

7. A host system for sharing by multiple hosts is characterized by comprising a first host, a second host, a carrier board and the communication sub-card for sharing by multiple hosts according to any one of claims 1-6, wherein the communication sub-card is inserted and installed on the carrier board, the carrier board is connected with the first host, the second host is connected with the carrier board through a cable interface, and the first host, the second host and the communication sub-card are in communication connection.

8. The host system shared by multiple hosts of claim 7, wherein the carrier comprises a DC-DC & LD0 module, a temperature acquisition module and a voltage acquisition module;

The DC-DC & LD0 module is connected with the connector, the temperature acquisition module is connected with the MCU chip, and the voltage acquisition module is connected with the MCU chip.