CN220796752U - Fully isolated high-voltage diode - Google Patents

Fully isolated high-voltage diode Download PDF

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CN220796752U
CN220796752U CN202321852800.7U CN202321852800U CN220796752U CN 220796752 U CN220796752 U CN 220796752U CN 202321852800 U CN202321852800 U CN 202321852800U CN 220796752 U CN220796752 U CN 220796752U
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voltage
well region
region
doped
type
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赖大伟
王迪
张文文
韦宇轩
方利泉
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Hangzhou Aoxin Technology Co ltd
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Hangzhou Aoxin Technology Co ltd
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Abstract

The utility model provides a fully isolated high-voltage diode, which comprises a P-type substrate and a high-voltage P-well region, wherein an N-type doped isolation region is arranged between the P-type substrate and the high-voltage P-well region for isolation, the isolation region comprises a first high-voltage N-type well region and an N-type buried layer, and the first high-voltage N-type well region is arranged at two sides of the high-voltage P-well region so as to be isolated from the vertical P-type substrate; the N-type buried layer is arranged below the high-voltage P well region and connected with the first high-voltage N-type well region, so that the high-voltage P well region is isolated from the transverse P substrate. The upper surface of the first high-voltage N-type well region is provided with a doped N+ region, the doped N+ region is led out to a control electrode, the control electrode is connected to a power supply, and the isolation region, the P-type substrate and the high-voltage P-type well region form a reverse depletion region, so that the high-voltage P-type well region and the P-type substrate form absolute electrical isolation, and the problem of parasitic leakage of the diode under a high-voltage application scene is solved.

Description

Fully isolated high-voltage diode
Technical Field
The utility model relates to the field of integrated circuit design, in particular to a fully isolated high-voltage diode.
Background
A diode is a semiconductor device having unidirectional conductivity in which a P-type region and an N-type region are created in a semiconductor material by the formation of a PN junction. An electric field exists between the P-type region and the N-type region on the substrate, so that the unidirectional conduction function is realized.
In integrated circuit design, a diode is widely used as an important component in various circuits, such as a rectifying circuit, an amplifying circuit, an oscillating circuit, an anti-reflection device, and the like. When the diode is used as 'anti-reaction', a diode is usually connected in series in the main loop, and the circuit utilizes the unidirectional conduction characteristic of the diode to realize the anti-reverse connection function by the simplest design, and meanwhile, the design cost of the circuit is reduced. Such low cost solutions are often used in low current applications, such as toys. If the breakdown voltage of the diode is smaller in the circuit, and the reverse connection of the circuit leads the generated breakdown voltage to exceed the breakdown voltage value born by the diode, the diode is invalid and does not have the reverse connection preventing function, so that the diode has high requirement on the breakdown voltage in the application of 'reverse reaction prevention' in order to ensure the reliability of the designed circuit.
In order to meet the requirement of high breakdown voltage of the diode, the diode in the prior art is mainly divided into a P-type diode and an N-type diode, wherein the N-type diode is formed by doping an N-type into a P-type region, as shown in fig. 1; the P-type diode is formed by doping a P-type region into an N-type region as shown in fig. 2. In Bulk process applications, because all devices are on the same substrate, complete isolation cannot be achieved between devices, and parasitic effects between devices cannot be completely avoided, particularly in high voltage BCD processes, which are more significant. Therefore, when the breakdown voltage of the diode is increased, for example, more than 60V, the problem of leakage of the diode is aggravated, so that the diode cannot be used. Thus, in a high voltage circuit, no high voltage diode with high reliability is available.
Disclosure of Invention
The utility model provides a fully isolated high-voltage diode for overcoming the defects in the prior art.
In order to achieve the above object, the present utility model provides a fully isolated high voltage diode comprising: the semiconductor device comprises a P-type substrate, a high-voltage P-well region, an isolation region, a diode structure and a protection structure. And the high-voltage P well region is arranged in the P-type substrate. And the isolation region is used for isolating the high-voltage P well region from the P-type substrate and comprises a first high-voltage N-type well region and an N-type buried layer. The diode structure is arranged in the middle of the high-voltage P well region, a deep P well region is arranged below the diode structure, and the deep P well region is arranged in the high-voltage P well region and is connected with the N-type buried layer.
The utility model provides a fully isolated high voltage diode, comprising: the semiconductor device comprises a P-type substrate, a high-voltage P-well region, an isolation region, a diode structure and a protection structure. And the high-voltage P well region is arranged in the P-type substrate. And the diode structure is arranged in the middle of the high-voltage P well region. And the isolation region is used for isolating the high-voltage P well region from the P-type substrate and comprises a first high-voltage N-type well region and an N-type buried layer.
The utility model provides a fully isolated high voltage diode, comprising: the semiconductor device comprises a P-type substrate, a high-voltage P-well region, an isolation region and a diode structure. And the high-voltage P well region is arranged in the P-type substrate. And the diode structure is arranged in the middle of the high-voltage P well region. And the isolation region is used for isolating the high-voltage P well region from the P-type substrate and comprises a first high-voltage N-type well region and an N-type buried layer.
The utility model provides a fully isolated high voltage diode, comprising: the semiconductor device comprises a P-type substrate, a deep N-well region, a high-voltage P-well region, a diode structure and a protection structure. The deep N well region is arranged in the P-type substrate, the upper surface of the deep N well region is provided with a doped N+ region, and the doped N+ region is connected with a power supply. The high-voltage P well region is arranged in the deep N well. The diode structure is arranged in the middle of the high-voltage P well region, a deep P well region is arranged below the diode structure, and the deep P well region is arranged in the high-voltage P well region and is connected with the deep N well region.
Preferably, the doping concentration range of the first high-voltage N-type well region is 1E14cm < -2 > -1E 18cm < -2 >; the P-type substrate is made of epitaxial material or non-epitaxial material; the first high-voltage N-type well region is arranged around the side part of the high-voltage P well region, the upper surface of the first high-voltage N-type well region is provided with a doped N+ region, and the doped N+ region is connected with the control electrode; the N-type buried layer is perpendicular to the direction of the first high-voltage N-type well region and embedded at the bottom of the P-type substrate, and is connected with the high-voltage P-type well region and the first high-voltage N-type well region.
Preferably, the diode structure comprises:
the second high-voltage N-type well region is arranged in the high-voltage P well region, a doped N+ region is arranged on the upper surface of the second high-voltage N-type well region, and the doped N+ region is connected with the cathode of the fully-isolated high-voltage diode;
the doped P+ region is arranged in the high-voltage P well region at two sides of the doped N+ region and opposite to the doped N+ region, a space is arranged between the doped P+ region and the edge, which is close to the second high-voltage N-type well region and opposite to the second high-voltage N-type well region, and the doped P+ region is connected to the anode of the fully-isolated high-voltage diode.
Preferably, the diode structure comprises:
the second high-voltage N-type well region is arranged in the high-voltage P-type well region, the upper surface of the second high-voltage N-type well region is provided with a doped N+ region, the doped N+ region is connected with the cathode of the fully-isolated high-voltage diode, the bottom of the second high-voltage N-type well region is connected with the deep P-type well region,
the doped P+ region is arranged in the high-voltage P well region at two sides of the doped N+ region and opposite to the doped N+ region, a space is arranged between the doped P+ region and the edge, which is close to the second high-voltage N-type well region and opposite to the second high-voltage N-type well region, and the doped P+ region is connected to the anode of the fully-isolated high-voltage diode.
Preferably, the diode structure comprises:
the second high-voltage N-type well region is arranged in the high-voltage P-type well region, a doped N+ region is arranged on the upper surface of the second high-voltage N-type well region, the doped N+ region is connected to the cathode of the fully-isolated high-voltage diode, and an interval is reserved between the bottom of the second high-voltage N-type well region in the diode structure and the deep P-type well region;
the doped P+ region is arranged in the high-voltage P well region at two sides of the doped N+ region and opposite to the doped N+ region, a space is arranged between the doped P+ region and the edge, which is close to the second high-voltage N-type well region and opposite to the second high-voltage N-type well region, and the doped P+ region is connected to the anode of the fully-isolated high-voltage diode.
Preferably, the diode structure comprises:
the second high-voltage N-type well region is arranged in the high-voltage P-type well region, a doped N+ region is arranged on the upper surface of the second high-voltage N-type well region, the doped N+ region is connected to the cathode of the fully-isolated high-voltage diode, and the depth of the second high-voltage N-type well region is 3 um-8 um;
the doped P+ region is arranged in the high-voltage P well region at two sides of the doped N+ region and opposite to the doped N+ region, a space is arranged between the doped P+ region and the edge, which is close to the second high-voltage N-type well region and opposite to the second high-voltage N-type well region, and the doped P+ region is connected to the anode of the fully-isolated high-voltage diode.
Preferably, the protection structure is disposed in the high voltage P-well region away from the upper surface of the second high voltage N-well region and surrounds the diode structure.
The fully isolated high-voltage diode provided by the utility model has the advantages that: the semiconductor device comprises a P-type substrate and a high-voltage P-well region, and an N-type doped isolation region is arranged between the P-type substrate and the high-voltage P-well region for isolation, wherein the material of the P-type substrate can be an epitaxial material or a non-epitaxial material. The isolation region comprises a first high-voltage N-type well region and an N-type buried layer, and the first high-voltage N-type well region is arranged at two sides of the high-voltage P-type well region so as to be isolated from the vertical P-type substrate; the N-type buried layer is arranged below the high-voltage P well region, so that the high-voltage P well region is isolated from the transverse P substrate, and the N-type buried layer is connected with the first high-voltage N-type well regions at two sides of the high-voltage P well region. The upper surface of the first high-voltage N-type well region is provided with a doped N+ region, the first high-voltage N-type well region is led out to a control electrode through the doped N+ region, the control electrode is connected to a power supply, the isolation region, the P-type substrate and the high-voltage P-type well region form a reverse depletion region, and the high-voltage P-type well region and the P-type substrate form absolute electrical isolation through the depletion region so as to solve the parasitic leakage problem of the diode under a high-voltage application scene. In addition, a diode structure and a protection structure are also arranged in the high-voltage P well region; the diode structure is provided with a second high-voltage N-type well region, the upper surfaces of the high-voltage P-type well regions at the two sides of the diode structure are provided with doped P+ regions, a distance is arranged between the doped P+ regions and the second high-voltage N-type well region, and the breakdown voltage of the diode structure is controlled by controlling the distance. Meanwhile, the breakdown voltage of the diode structure can be increased by shortening the depth of the second high-voltage N-type well region.
Drawings
FIGS. 1-2 are schematic cross-sectional views of prior art P-type and N-type diode structures;
FIG. 3 is a cross-sectional view of a first embodiment of a fully isolated diode according to the present utility model;
FIG. 4 is a cross-sectional view of a second embodiment of a fully isolated diode according to the present utility model;
FIG. 5 is a cross-sectional view of a third embodiment of a fully isolated diode according to the present utility model;
FIG. 6 is a cross-sectional view of a fourth embodiment of a fully isolated diode according to the present utility model;
fig. 7 is a cross-sectional view of a fifth embodiment of a fully isolated diode according to the present utility model.
Detailed Description
The following describes the embodiments of the present utility model in detail with reference to the drawings.
Example 1
As shown in fig. 3, the fully isolated high voltage diode provided by the utility model comprises a P-type substrate 1, wherein the P-type substrate 1 is made of a non-epitaxial material or an epitaxial material, and the P-type substrate 1 made of the epitaxial material can effectively improve the breakdown voltage of the fully isolated high voltage diode, and can also effectively inhibit the parasitic path between the diode and an adjacent device and reduce the leakage problem. The upper surface of the P-type substrate 1 is provided with a doped p+ region 12, and the P-type substrate 1 is connected to an external circuit by leading out a P-type substrate potential Psub through the doped p+ region 12. A high voltage P-well region (HVPW) 2 is disposed in a P-type substrate 1. An isolation region 4 is disposed around the high voltage P-well region (HVPW) 2 for isolating the high voltage P-well region 2 from the P-type substrate 1, the isolation region 4 includes a first high voltage N-well region (HVNW) 41 and an N-type buried layer (NBL) 42, and the first high voltage N-well region 41 is disposed around a side portion of the high voltage P-well region (HVPW) 2 to isolate the high voltage P-well region 2 from the vertical P-type substrate 1, thereby ensuring electrical isolation between the high voltage P-well region 2 and the P-type substrate 1 in a lateral direction. Wherein, the vertical P-type substrate 1 refers to a part of the P-type substrate 1 which is vertical to the upper surface of the fully isolated high-voltage diode; the N-type buried layer 42 is arranged perpendicular to the direction of the first high-voltage N-type well region 41 and embedded at the bottom of the P-type substrate 1, and the N-type buried layer 42 is connected with the high-voltage P-well region 2 and the first high-voltage N-type well region 41. The N-type buried layer 42 isolates the high-voltage P-well region 2 from the lateral P-type substrate 1 to ensure that the high-voltage P-well region 2 is electrically isolated from the P-type substrate 1 in a vertical direction, wherein the lateral P-type substrate 1 refers to a portion of the P-type substrate 1 perpendicular to the first high-voltage N-type well region 41. The combination of the first high-voltage N-type well region 41 and the N-type buried layer 42 enables the high-voltage P-well region 2 of the P-type substrate 1 to be completely isolated, reduces electrical interference between the first high-voltage N-type well region and the N-type buried layer, simultaneously avoids parasitic paths between adjacent devices from leaking electricity to affect breakdown voltage of the fully isolated high-voltage diode, and improves reliability of the fully isolated high-voltage diode.
In this embodiment, the upper surface of the first high-voltage N-type well region 41 is provided with a doped n+ region 11, the first high-voltage N-type well region 41 is led out to the control electrode N through the doped n+ region 11, and in the application process, the control electrode is connected to the power supply voltage; in general, the power supply voltage is the highest voltage among the circuit voltages, and the isolation region 4 forms a reverse depletion region between the P-type substrate 1 and the high-voltage P-well region 2 to block potential interference between the P-type substrate 1 and the high-voltage P-well region 2. Specifically, after the control electrode N is turned on with the power supply voltage, the first high-voltage N-type well region 41 and the N-type buried layer 42 form an isolation region having a power supply voltage potential, and the highest potential of the P-type substrate 1 and the high-voltage P-well region 2 is smaller than the isolation potential of the power supply voltage. Therefore, the isolation region 4 can effectively avoid the problem of potential leakage of both. Meanwhile, the potential signals of the P-type substrate 1 and the high-voltage P-well region 2 are opposite to those of the isolation region 4, so that a reverse depletion region is formed between the isolation region 4 and the P-type substrate 1 and between the isolation region 4 and the high-voltage P-well region 2 after the isolation region 4 is electrified, and the P-type substrate 1 and the high-voltage P-well region 2 are electrically isolated absolutely, so that the parasitic leakage problem of the diode under high voltage is solved. In some embodiments, the doping concentration of the first high voltage N-type well region 41 ranges from 1E14cm < -2 > to 1E18cm < -2 >, which can improve the lateral breakdown voltage of the first high voltage N-type well region 41 and the P-type substrate 1, so that the fully isolated high voltage diode can be used in a circuit with a voltage of 60V or more in a high voltage scene.
In some embodiments, in the high voltage P-well region 2, a diode structure 3 and a protection structure 6 are provided; the diode structure 3 is disposed in the middle of the high voltage P-well region 2, and the diode structure 3 includes a second high voltage N-well region 31 and a doped p+ region 12. The second high voltage N-type well region 31 is disposed in the high voltage P-well region 2, the doped n+ region 11 is disposed on the upper surface of the second high voltage N-type well region 31, and the second high voltage N-type well region 31 is led out through the doped n+ region 11 and connected to a Cathode (Cathode). The doped p+ region 12 is disposed in the high voltage P well region 2 at two sides of the doped n+ region 11, and opposite to the doped n+ region 11, the high voltage P well region 2 is led out through the doped p+ region 12 to be connected to an Anode (Anode). A distance d1 is arranged between the doped P+ region 12 and the second high-voltage N-type well region 31; wherein the range of the spacing d1 is 0um to 50um, and the larger the spacing d1 is, the larger the breakdown voltage of the fully isolated high voltage diode is. The application of the fully isolated high-voltage diode in different scenes is satisfied by adjusting and controlling the distance d1 between the doped P+ region 12 and the second high-voltage N-type well region 31.
In this embodiment, a protection structure 6 is disposed around the diode structure 3 on the upper surface of the high-voltage P-well region 2 away from the second high-voltage N-type well region 31, and the protection structure 6 includes a P region 61, an N region 62, and a P region 61 that are sequentially connected. The protection structure 6 surrounds the diode structure 3 in the high-voltage P-well region 2, so that leakage current generated when the diode structure 3 performs a reverse function in a high-temperature state can be reduced. Thereby improving the reliability of the operation of the fully isolated high-voltage diode in a high-temperature scene.
In this embodiment, a deep P-well (DPW) 7 is disposed below the second high-voltage N-well 31 in the diode structure 3, and the deep P-well (DPW) 7 is also disposed in the high-voltage P-well 2 and connected to the N-buried layer 42, so that the second high-voltage N-well 31 in the diode structure 3 is isolated from the N-buried layer 42, and the potential interference between the second high-voltage N-well 31 and the N-buried layer 42 during operation is avoided, thereby affecting the isolation effect of the isolation region 4. In addition, the bottom of the second high-voltage N-type well region 31 is connected with the deep P-well region 7, and the length of the deep P-well region 7 is smaller than that of the high-voltage P-well region 2, so that the short circuit of the high-voltage P-well region 2 of the deep P-well region 7 is avoided, and the normal operation of the fully-isolated high-voltage diode is influenced.
In order to match various application scenarios, the present utility model further proposes a plurality of improved embodiments based on the first embodiment, so as to widen the application range of the fully isolated high voltage diode, as shown in fig. 4 to 6.
Example two
As shown in fig. 4, the present embodiment is different from the first embodiment in that: in this embodiment, a space W is formed between the bottom of the second high voltage N-type well region 31 and the deep P-well region 7, and the depth of the second high voltage N-type well region 31 can be adjusted within a range of 3um to 8um. In this range, the shallower the depth of the second high-voltage N-type well region 31, the higher the breakdown voltage between the N region of the fully isolated high-voltage diode and the N-type buried layer 42, further improving the voltage withstand performance and reverse protection function of the fully isolated high-voltage diode.
Example III
As shown in fig. 5, this embodiment is another implementation of the second embodiment, and the difference between this embodiment and the second embodiment is that: on the premise that the depth of the second high-voltage N-type well region 31 becomes shallow, the deep P-well region 7 below the second high-voltage N-type well region 31 and in contact with the N-type buried layer 42 is omitted, and the deep P-well region 31 can be applied to designs with lower requirements on breakdown voltage, the number of photoetching layers is saved after the deep P-well region 7 is omitted, the high-voltage diode can be ensured not to generate leakage, and the production cost of the fully-isolated high-voltage diode is also saved.
Example IV
As shown in fig. 6, this embodiment is an implementation manner with respect to the embodiment, and the difference between this embodiment and the embodiment is that: the protection structure 6 which is positioned on the upper surface of the high-voltage P-well region 2 and is arranged around the diode structure 3 is omitted, the deep P-well region 7 which is positioned below the diode structure 3 is omitted, the fully isolated high-voltage diode is suitable for the application occasions with smaller breakdown voltage and higher requirements on the area of a diode chip, the fully isolated high-voltage diode structure in the embodiment can ensure that no electric leakage occurs when the reverse protection function is performed, the area of the fully isolated high-voltage diode is further reduced after the protection structure 6 and the deep P-well region 7 is omitted, and the occupied space of the fully isolated high-voltage diode is reduced.
Example five
This embodiment is another embodiment of the first embodiment, which is different in that the N-type buried layer 42 of the isolation region 4 and the first high voltage N-type well region 41 on both sides of the diode structure 3 are replaced with deep N-well regions (DNWs) 5. The deep N well region is arranged in the P-type substrate. The upper surface of the deep N-well region 5 on both sides of the diode structure 3 is provided with a doped n+ region 11. The high-voltage P-well region 2 is disposed in the deep N-well region 5, and the deep P-well region 7 disposed in the high-voltage P-well region 2 is connected to the deep N-well region 5, so that the second high-voltage N-well region 31 in the diode structure 3 is isolated from the deep N-well region 5. The deep N well region 5 is connected to the control electrode N through the doped n+ region 11, and after the control electrode N is connected to the power source, the deep N well region 5 forms a high-potential isolation region to isolate the P substrate 1 from the high-voltage P well region 2. Similarly, the potential generated by the deep N well region 5 is opposite to the potential of the P-type substrate 1 and the high-voltage P well region 2, so that the deep N well region 5 forms a reverse depletion region to realize potential absolute isolation between the P-type substrate 1 and the high-voltage P well region 2, thereby solving the problem of electric leakage under a diode high-voltage scene.
As shown in fig. 7, the fully isolated high voltage diode provided by the utility model comprises a P-type substrate 1, a deep N-well region 5, a high voltage P-well region 2 and a diode structure 3. The deep N well region 7 is arranged in the P-type substrate 1, the upper surface of the deep N well region 5 is provided with a doped N+ region 11, and the doped N+ region 11 is connected with a power supply. The high voltage P-well region 2 is disposed in the deep N-well region 5. The diode structure 3 is disposed in the middle of the high voltage P-well region 2.
In summary, the fully isolated high voltage diode provided by the utility model comprises a P-type substrate and a high voltage P-well region, and an N-type doped isolation region is arranged between the P-type substrate and the high voltage P-well region for isolation. The material of the P-type substrate can be an epitaxial material or a non-epitaxial material, so that the reliability of the fully-isolated high-voltage diode is improved. The isolation region comprises a first high-voltage N-type well region and an N-type buried layer, and the first high-voltage N-type well region is arranged at two sides of the high-voltage P-type well region so as to be isolated from the vertical P-type substrate; the N-type buried layer is arranged below the high-voltage P well region, so that the high-voltage P well region is isolated from the transverse P substrate, and the N-type buried layer is connected with the first high-voltage N-type well regions at two sides of the high-voltage P well region. The upper surface of the first high-voltage N-type well region is provided with a doped N+ region, the first high-voltage N-type well region is led out to a control electrode through the doped N+ region, the control electrode is connected to a power supply, the isolation region, the P-type substrate and the high-voltage P-type well region form a reverse depletion region, and the high-voltage P-type well region and the P-type substrate form absolute electrical isolation through the depletion region, so that the parasitic leakage problem of the diode in a high-voltage application scene is solved. In addition, a diode structure and a protection structure are also arranged in the high-voltage P well region; the diode structure is provided with a second high-voltage N-type well region, the upper surfaces of the high-voltage P-type well regions at the two sides of the diode structure are provided with doped P+ regions, a distance is arranged between the doped P+ regions and the second high-voltage N-type well region, and the breakdown voltage of the diode structure is controlled by controlling the distance, so that the reverse protection function of the fully-isolated high-voltage diode is improved. Meanwhile, the breakdown voltage of the diode structure can be increased by shortening the depth of the second high-voltage N-type well region.
The foregoing is merely a preferred embodiment of the present utility model, and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the concept of the present utility model, and such modifications and adaptations are intended to be comprehended within the scope of the present utility model.

Claims (19)

1. A fully isolated high voltage diode comprising: the semiconductor device comprises a P-type substrate, a high-voltage P-well region, an isolation region, a diode structure and a protection structure;
the high-voltage P well region is arranged in the P-type substrate;
the isolation region is used for isolating the high-voltage P well region from the P-type substrate and comprises a first high-voltage N-type well region and an N-type buried layer;
the diode structure is arranged in the middle of the high-voltage P well region, a deep P well region is arranged below the diode structure, and the deep P well region is arranged in the high-voltage P well region and is connected with the N-type buried layer.
2. The fully isolated high voltage diode of claim 1, wherein the first high voltage N-well region has a doping concentration in the range of 1E14cm "2 to 1E18 cm" 2; the P-type substrate is made of epitaxial material or non-epitaxial material; the first high-voltage N-type well region is arranged around the side part of the high-voltage P well region, a doped N+ region is arranged on the upper surface of the first high-voltage N-type well region, and the doped N+ region is connected with the control electrode; the N-type buried layer is perpendicular to the direction of the first high-voltage N-type well region and embedded at the bottom of the P-type substrate, and is connected with the high-voltage P-type well region and the first high-voltage N-type well region.
3. The fully isolated high voltage diode of claim 1, wherein the diode structure comprises:
the second high-voltage N-type well region is arranged in the high-voltage P well region, a doped N+ region is arranged on the upper surface of the second high-voltage N-type well region, and the doped N+ region is connected with the cathode of the fully-isolated high-voltage diode;
the doped P+ region is arranged in the high-voltage P well region at two sides of the doped N+ region and opposite to the doped N+ region, a space is arranged between the doped P+ region and the edge, which is close to the second high-voltage N-type well region and opposite to the second high-voltage N-type well region, and the doped P+ region is connected to the anode of the fully-isolated high-voltage diode.
4. The fully isolated high voltage diode of claim 1, wherein the diode structure comprises:
the second high-voltage N-type well region is arranged in the high-voltage P well region, a doped N+ region is arranged on the upper surface of the second high-voltage N-type well region, the doped N+ region is connected with the cathode of the fully-isolated high-voltage diode, and the bottom of the second high-voltage N-type well region is connected with the deep P well region;
the doped P+ region is arranged in the high-voltage P well region at two sides of the doped N+ region and opposite to the doped N+ region, a space is arranged between the doped P+ region and the edge, which is close to the second high-voltage N-type well region and opposite to the second high-voltage N-type well region, and the doped P+ region is connected to the anode of the fully-isolated high-voltage diode.
5. The fully isolated high voltage diode of claim 1, wherein the protection structure is disposed in the high voltage P-well region away from an upper surface of the second high voltage N-well region and around the diode structure.
6. The fully isolated high voltage diode of claim 1, wherein the diode structure comprises:
the second high-voltage N-type well region is arranged in the high-voltage P-type well region, a doped N+ region is arranged on the upper surface of the second high-voltage N-type well region, the doped N+ region is connected to the cathode of the fully-isolated high-voltage diode, and an interval is reserved between the bottom of the second high-voltage N-type well region in the diode structure and the deep P-type well region;
the doped P+ region is arranged in the high-voltage P well region at two sides of the doped N+ region and opposite to the doped N+ region, a space is arranged between the doped P+ region and the edge, which is close to the second high-voltage N-type well region and opposite to the second high-voltage N-type well region, and the doped P+ region is connected to the anode of the fully-isolated high-voltage diode.
7. The fully isolated high voltage diode of claim 6, wherein the diode structure comprises:
the second high-voltage N-type well region is arranged in the high-voltage P-type well region, a doped N+ region is arranged on the upper surface of the second high-voltage N-type well region, the doped N+ region is connected to the cathode of the fully-isolated high-voltage diode, and the depth of the second high-voltage N-type well region is 3 um-8 um.
8. A fully isolated high voltage diode comprising: the semiconductor device comprises a P-type substrate, a high-voltage P-well region, an isolation region, a diode structure and a protection structure;
the high-voltage P well region is arranged in the P-type substrate;
the diode structure is arranged in the middle of the high-voltage P well region;
and the isolation region is used for isolating the high-voltage P well region from the P-type substrate and comprises a first high-voltage N-type well region and an N-type buried layer.
9. The fully isolated high voltage diode of claim 8, wherein the first high voltage N-well region has a doping concentration in the range of 1E14cm "2 to 1E18 cm" 2; the P-type substrate is made of epitaxial material or non-epitaxial material; the first high-voltage N-type well region is arranged around the side part of the high-voltage P well region, a doped N+ region is arranged on the upper surface of the first high-voltage N-type well region, and the doped N+ region is connected with the control electrode; the N-type buried layer is perpendicular to the direction of the first high-voltage N-type well region and embedded at the bottom of the P-type substrate, and is connected with the high-voltage P-type well region and the first high-voltage N-type well region.
10. The fully isolated high voltage diode of claim 8, wherein the diode structure comprises:
the second high-voltage N-type well region is arranged in the high-voltage P well region, a doped N+ region is arranged on the upper surface of the second high-voltage N-type well region, and the doped N+ region is connected with the cathode of the fully-isolated high-voltage diode;
the doped P+ region is arranged in the high-voltage P well region at two sides of the doped N+ region and opposite to the doped N+ region, a space is arranged between the doped P+ region and the edge, which is close to the second high-voltage N-type well region and opposite to the second high-voltage N-type well region, and the doped P+ region is connected to the anode of the fully-isolated high-voltage diode.
11. The fully isolated high voltage diode of claim 8, wherein the diode structure comprises:
the second high-voltage N-type well region is arranged in the high-voltage P-type well region, a doped N+ region is arranged on the upper surface of the second high-voltage N-type well region, the doped N+ region is connected to the cathode of the fully-isolated high-voltage diode, and the depth of the second high-voltage N-type well region is 3 um-8 um.
12. The fully isolated high voltage diode of claim 8, wherein the guard structure is disposed in the high voltage P-well region away from an upper surface of the second high voltage N-well region and around the diode structure.
13. A fully isolated high voltage diode comprising: the semiconductor device comprises a P-type substrate, a high-voltage P-well region, an isolation region and a diode structure;
the high-voltage P well region is arranged in the P-type substrate;
the diode structure is arranged in the middle of the high-voltage P well region;
and the isolation region is used for isolating the high-voltage P well region from the P-type substrate and comprises a first high-voltage N-type well region and an N-type buried layer.
14. The fully isolated high voltage diode of claim 13, wherein the first high voltage N-well region has a doping concentration in the range of 1E14cm "2 to 1E18 cm" 2; the P-type substrate is made of epitaxial material or non-epitaxial material; the first high-voltage N-type well region is arranged around the side part of the high-voltage P well region, a doped N+ region is arranged on the upper surface of the first high-voltage N-type well region, and the doped N+ region is connected with the control electrode; the N-type buried layer is perpendicular to the direction of the first high-voltage N-type well region and embedded at the bottom of the P-type substrate, and is connected with the high-voltage P-type well region and the first high-voltage N-type well region.
15. The fully isolated high voltage diode of claim 13, wherein the diode structure comprises:
the second high-voltage N-type well region is arranged in the high-voltage P well region, a doped N+ region is arranged on the upper surface of the second high-voltage N-type well region, and the doped N+ region is connected with the cathode of the fully-isolated high-voltage diode;
the doped P+ region is arranged in the high-voltage P well region at two sides of the doped N+ region and opposite to the doped N+ region, a space is arranged between the doped P+ region and the edge, which is close to the second high-voltage N-type well region and opposite to the second high-voltage N-type well region, and the doped P+ region is connected to the anode of the fully-isolated high-voltage diode.
16. A fully isolated high voltage diode comprising: the semiconductor device comprises a P-type substrate, a deep N-well region, a high-voltage P-well region, a diode structure and a protection structure;
the deep N well region is arranged in the P-type substrate, a doped N+ region is arranged on the upper surface of the deep N well region, and the doped N+ region is connected with a power supply;
the high-voltage P well region is arranged in the deep N well;
the diode structure is arranged in the middle of the high-voltage P well region, a deep P well region is arranged below the diode structure, and the deep P well region is arranged in the high-voltage P well region and is connected with the deep N well region.
17. The fully isolated high voltage diode of claim 16, wherein the diode structure comprises:
the second high-voltage N-type well region is arranged in the high-voltage P well region, a doped N+ region is arranged on the upper surface of the second high-voltage N-type well region, and the doped N+ region is connected with the cathode of the fully-isolated high-voltage diode;
the doped P+ region is arranged in the high-voltage P well region at two sides of the doped N+ region and opposite to the doped N+ region, a space is arranged between the doped P+ region and the edge, which is close to the second high-voltage N-type well region and opposite to the second high-voltage N-type well region, and the doped P+ region is connected to the anode of the fully-isolated high-voltage diode.
18. The fully isolated high voltage diode of claim 16, wherein the diode structure comprises:
the second high-voltage N-type well region is arranged in the high-voltage P well region, a doped N+ region is arranged on the upper surface of the second high-voltage N-type well region, the doped N+ region is connected with the cathode of the fully-isolated high-voltage diode, and the bottom of the second high-voltage N-type well region is connected with the deep P well region;
the doped P+ region is arranged in the high-voltage P well region at two sides of the doped N+ region and opposite to the doped N+ region, a space is arranged between the doped P+ region and the edge, which is close to the second high-voltage N-type well region and opposite to the second high-voltage N-type well region, and the doped P+ region is connected to the anode of the fully-isolated high-voltage diode.
19. The fully isolated high voltage diode of claim 16, wherein the guard structure is disposed in the high voltage P-well region away from an upper surface of the second high voltage N-well region and around the diode structure.
CN202321852800.7U 2023-07-14 2023-07-14 Fully isolated high-voltage diode Active CN220796752U (en)

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Application Number Priority Date Filing Date Title
CN202321852800.7U CN220796752U (en) 2023-07-14 2023-07-14 Fully isolated high-voltage diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202321852800.7U CN220796752U (en) 2023-07-14 2023-07-14 Fully isolated high-voltage diode

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CN220796752U true CN220796752U (en) 2024-04-16

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