CN219554937U - Ultra-wideband frequency hopping filter - Google Patents

Ultra-wideband frequency hopping filter Download PDF

Info

Publication number
CN219554937U
CN219554937U CN202321256784.5U CN202321256784U CN219554937U CN 219554937 U CN219554937 U CN 219554937U CN 202321256784 U CN202321256784 U CN 202321256784U CN 219554937 U CN219554937 U CN 219554937U
Authority
CN
China
Prior art keywords
pin
chip
frequency hopping
hopping filter
filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202321256784.5U
Other languages
Chinese (zh)
Inventor
陶有红
覃华北
程林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hefei Powersky Electronic Technology Co ltd
Original Assignee
Hefei Powersky Electronic Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hefei Powersky Electronic Technology Co ltd filed Critical Hefei Powersky Electronic Technology Co ltd
Priority to CN202321256784.5U priority Critical patent/CN219554937U/en
Application granted granted Critical
Publication of CN219554937U publication Critical patent/CN219554937U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Landscapes

  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Abstract

The utility model provides an ultra-wideband frequency hopping filter, which comprises a radio frequency input terminal, a first radio frequency switch, a filter component, a second radio frequency switch, a radio frequency output terminal, a drive control circuit and an interface control code conversion circuit which are electrically connected in sequence, wherein the filter component comprises a first frequency hopping filter, a second frequency hopping filter, a third frequency hopping filter and a fourth frequency hopping filter which are connected in parallel; the first frequency hopping filter, the second frequency hopping filter, the third frequency hopping filter and the fourth frequency hopping filter respectively comprise an adjustable capacitor array and a coupling inductance circuit which are electrically connected, and the driving control circuit comprises a driving circuit I and a driving circuit II; the ultra-wideband working frequency band of the frequency hopping filter is divided into four sub-bands, and the ultra-wideband frequency hopping is realized through switching of the first radio frequency switch and the second radio frequency switch, so that four frequency bands of HF, VHF, UHF, L wave bands are covered.

Description

Ultra-wideband frequency hopping filter
Technical Field
The utility model relates to the technical field of wireless communication, in particular to an ultra-wideband frequency hopping filter.
Background
Radio frequency filters play an important role in communication systems, and can filter out-of-band noise and interference signals by design means to obtain effective signals required by the communication systems. The electric tuning filter/numerical control frequency hopping filter is one of main components of a military software radio communication system, the rapid frequency hopping and filtering functions of the electric tuning filter/numerical control frequency hopping filter are guaranteed by anti-interference, anti-interception and confidentiality of a modern military frequency hopping radio station, the traditional frequency hopping filter works in a frequency band below 1GHz, the working frequency band can only cover HF, UHF, VHF, and the ultra-wideband signal processing requirement of the novel military software radio station cannot be met.
Disclosure of Invention
The utility model aims to solve the technical problem that the working frequency band of a frequency hopping filter in the prior art can only cover HF, UHF, VHF.
The utility model solves the technical problems through the following technical scheme: an ultra-wideband frequency hopping filter comprises a radio frequency input terminal, a first radio frequency switch, a filter component, a second radio frequency switch, a radio frequency output terminal, a drive control circuit and an interface control code conversion circuit which are electrically connected in sequence, wherein the filter component comprises a first frequency hopping filter, a second frequency hopping filter, a third frequency hopping filter and a fourth frequency hopping filter which are connected in parallel;
the interface control code conversion circuit is electrically connected with the drive control circuit, the drive control circuit is electrically connected with the first radio frequency switch, the second radio frequency switch, the first frequency hopping filter, the second frequency hopping filter, the third frequency hopping filter and the fourth frequency hopping filter respectively, the first radio frequency switch and the second radio frequency switch are all four switches, the first frequency hopping filter, the second frequency hopping filter, the third frequency hopping filter and the fourth frequency hopping filter respectively comprise an adjustable capacitor array and a coupling inductance circuit which are electrically connected, and the drive control circuit comprises a first drive circuit for controlling the adjustable capacitor array and a second drive circuit for controlling the first frequency hopping filter, the second frequency hopping filter, the third frequency hopping filter and the fourth frequency hopping filter to select segments.
According to the utility model, the ultra-wideband working frequency band of the frequency hopping filter is divided into four sub-bands, and the ultra-wideband frequency hopping is realized through switching of the first radio frequency switch and the second radio frequency switch, so that four frequency bands of HF, VHF, UHF, L wave bands are covered, and the problem that the working frequency band of the frequency hopping filter in the prior art can only cover HF, UHF, VHF is solved. The coupling inductance circuit in the sub-frequency band frequency hopping filter is connected with the adjustable capacitor array to form a multi-order LC resonance filter network, so that the coupling transmission of signals is realized, and the filtering effect of the signals is achieved. The input control signal is transcoded by the interface control code conversion circuit to generate a control signal to the drive control circuit, the drive control circuit controls the first radio frequency switch and the second radio frequency switch to gate the frequency hopping filter of the corresponding frequency band, and then the drive control circuit controls the PIN diode to adjust the adjustable capacitor array to realize the frequency hopping function.
Preferably, the frequency range of the first frequency hopping filter is 30MHz-90MHz, the frequency range of the second frequency hopping filter is 225MHz-512MHz, the frequency range of the third frequency hopping filter is 512MHz-678MHz, and the frequency range of the fourth frequency hopping filter is 1300MHz-1900MHz.
Preferably, the adjustable capacitor array includes ten different capacitors C1, C2, C3, C4, C5, C6, C7, C8, C9, C10 and ten identical PIN diodes D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, one ends of the capacitors C1-C10 are connected and then electrically connected to the input end of the coupled inductor circuit, the other ends of the capacitors C1-C10 are respectively electrically connected to the cathodes of the PIN diodes D1-D10, and the anodes of the PIN diodes D1-D10 are connected and then grounded.
Preferably, the coupling inductance circuit includes an inductance L1, L2, L3, L4, L5, L6, one end of the inductance L3 is electrically connected with a connection point of the inductance L1 and the inductance L2, the other end of the inductance L3 is electrically connected with a switching port of the first radio frequency switch as a first radio frequency port, the other end of the inductance L1 is connected with a common end connected with the capacitors C1-C10 in the adjustable capacitor array, the other end of the inductance L2 is grounded, one end of the inductance L6 is electrically connected with a connection point of the inductance L4 and the inductance L5, the other end of the inductance L6 is electrically connected with a common end connected with the capacitors C1-C10 in the adjustable capacitor array as a second radio frequency port, and the other end of the inductance L5 is grounded.
Preferably, the inductances L1-L6 are all tap inductances.
Preferably, the interface control code conversion circuit includes a chip U1 and a chip U2, where a first pin and a second pin of the chip U1 are respectively connected with an eighth pin and a seventh pin of the chip U2, a third pin of the chip U1 is connected with a second driving circuit in the fourth frequency hopping filter, a fifth pin of the chip U1 is connected with a second driving circuit in the third frequency hopping filter, a sixth pin of the chip U1 is connected with a second driving circuit in the second frequency hopping filter, a seventh pin of the chip U1 is connected with a second driving circuit in the first frequency hopping filter, and an eighth pin of the chip U1 is connected with a capacitor Cv1 in series and then grounded;
the first PIN, the ninth PIN, the tenth PIN, the twelfth PIN and the sixteenth PIN of the chip U2 are connected, the second PIN, the fourth PIN, the sixth PIN and the nineteenth PIN are connected, the third PIN, the fifth PIN and the eighteenth PIN are connected, the seventh PIN, the eighth PIN, the eighteenth PIN and the twenty-fifth PIN are connected with external control signals, the twenty-ninth PIN, the thirty-first PIN, the thirty-third PIN, the thirty-fifth PIN, the thirty-eighth PIN, the fortieth second PIN, the fortieth fourth PIN, the thirty-seventh PIN and the thirty-second PIN are respectively connected to a first driving circuit of PIN diode D1-D10 in the ten controlled adjustable capacitor arrays, the thirty-seventh PIN is connected with a capacitor Cv2 in series and then grounded, and the fortieth sixth PIN, the fortieth PIN and the seventeenth PIN are connected with a seventeenth PIN and then grounded.
Preferably, the first radio frequency switch includes a chip U3 and a chip U4, a first pin of the chip U4 is connected with a seventh pin of the chip U2, a third pin of the chip U4 is connected with an eighth pin of the chip U2, a fourth pin of the chip U4 is connected with a fifth pin of the chip U3, a sixth pin of the chip U4 is connected with a sixth pin of the chip U2, a seventh pin of the chip U3 is electrically connected with a first radio frequency port of the first frequency hopping filter, a third pin of the chip U3 is electrically connected with a first radio frequency port of the second frequency hopping filter, a first pin of the chip U3 is electrically connected with a first radio frequency port of the third frequency hopping filter, and a ninth pin of the chip U3 is electrically connected with a first radio frequency port of the fourth frequency hopping filter.
Preferably, the second radio frequency switch includes a chip U3 and a chip U4, the first pin of the chip U4 is connected with the seventh pin of the chip U2, the third pin of the chip U4 is connected with the eighth pin of the chip U2, the fourth pin of the chip U4 is connected with the fifth pin of the chip U3, the sixth pin of the chip U4 is connected with the sixth pin of the chip U2, the seventh pin of the chip U3 is electrically connected with the second radio frequency port of the first frequency hopping filter, the third pin of the chip U3 is electrically connected with the second radio frequency port of the second frequency hopping filter, the first pin of the chip U3 is electrically connected with the second radio frequency port of the third frequency hopping filter, and the ninth pin of the chip U3 is electrically connected with the second radio frequency port of the fourth frequency hopping filter.
Preferably, the first driving circuit includes resistors R33, R34, R39, R42, a triode Q21, and a chip Q24, where one end of the resistor R33 and one end of the resistor R34 are connected to a high potential 100V, the other end of the resistor R33 is connected to fifth and sixth PINs of the chip Q24, the other end of the resistor R34 is connected to a third PIN of the chip Q24, a collector of the triode Q21 is connected to a fourth PIN of the chip Q24 and to an anode of the PIN diode D1, one end of the resistor R39 is connected to a base of the triode Q21, the other end of the resistor R39 is connected to a second PIN of the three chips Q24 after being connected to the resistor R42 in series, the other end of the resistor R39 is connected to a twenty-ninth PIN of the chip U2, and an emitter of the triode Q21 is connected to the first PIN of the chip Q24 and then grounded.
Preferably, the second driving circuit includes a resistor R19, a cmos tube Q11, and a cmos tube Q13, one end of the resistor R19 is connected to a seventh pin of the chip U1 after the gate of the cmos tube Q11, the other end of the resistor R19 is connected to the gate of the cmos tube Q13, the drain of the cmos tube Q11 is connected to the common end of the capacitors C1-C10 in the tunable capacitor array after the drain of the cmos tube Q13, and the source of the cmos tube Q13 is grounded.
The ultra-wideband frequency hopping filter provided by the utility model has the advantages that: the ultra-wideband working frequency band of the frequency hopping filter is divided into four sub-bands of 30MHz-90MHz, 225MHz-512MHz, 512MHz-678MHz and 1300MHz-1900MHz, the ultra-wideband frequency hopping is realized through switching of a first radio frequency switch and a second radio frequency switch, four frequency bands of HF, VHF, UHF, L wave bands are covered, a coupling inductance circuit in the sub-frequency band frequency hopping filter is connected with an adjustable capacitor array to form a multi-order LC resonance filter network, the coupling transmission of signals is realized, and the filtering effect of the signals is achieved.
The external equipment is connected to an A0-A9 control port of the interface control code conversion circuit through an interface, an input control signal is transcoded through the interface control code conversion circuit to generate a control signal to the drive control circuit, the drive control circuit controls the first radio frequency switch and the second radio frequency switch to gate the frequency hopping filter of the corresponding frequency band, and then the drive control circuit controls the PIN diode to adjust the adjustable capacitor array to realize the frequency hopping function.
Drawings
FIG. 1 is a block diagram of an ultra wideband frequency hopping filter of the present utility model;
FIG. 2 is a circuit diagram of a first frequency hopping filter of the ultra wideband frequency hopping filter of the present utility model;
FIG. 3 is an equivalent circuit diagram of an adjustable capacitor array of a first frequency hopping filter in an ultra wideband frequency hopping filter according to the present utility model;
FIG. 4 is a circuit diagram of a first RF switch in an ultra-wideband frequency hopping filter of the present utility model;
FIG. 5 is a circuit diagram of a chip U1 in an ultra wideband frequency hopping filter according to the present utility model;
FIG. 6 is a circuit diagram of a chip U2 in an ultra wideband frequency hopping filter according to the present utility model;
FIG. 7 is a circuit diagram of a first driving circuit in an ultra wideband frequency hopping filter according to the present utility model;
FIG. 8 is a circuit diagram of a second driving circuit in an ultra wideband frequency hopping filter according to the present utility model;
in the figure: the device comprises a first radio frequency switch 11, a second radio frequency switch 12, a first frequency hopping filter 21, an adjustable capacitor array 211, a 212 coupling inductance circuit, a second frequency hopping filter 22, a third frequency hopping filter 23, a fourth frequency hopping filter 24, a 31 driving control circuit and a 32 interface control code conversion circuit.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the present utility model more apparent, the technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present utility model, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
As shown in fig. 1, the present embodiment provides an ultra wideband frequency hopping filter, which includes a radio frequency input terminal, a first radio frequency switch 11, a filter assembly, a second radio frequency switch 12, a radio frequency output terminal, a driving control circuit 31, and an interface control code conversion circuit 32, wherein the radio frequency input terminal, the first radio frequency switch 11, the filter assembly, the second radio frequency switch 12, and the radio frequency output terminal are electrically connected in sequence, the interface control code conversion circuit 32 is electrically connected with the driving control circuit 31, the driving control circuit 31 is electrically connected with the first radio frequency switch 11, the filter assembly, and the second radio frequency switch 12, and the first radio frequency switch 11 and the second radio frequency switch 12 are all four switches.
The filter assembly includes a first frequency hopping filter 21, a second frequency hopping filter 22, a third frequency hopping filter 23, and a fourth frequency hopping filter 24 connected in parallel, the first frequency hopping filter 21, the second frequency hopping filter 22, the third frequency hopping filter 23, and the fourth frequency hopping filter 24 have the same structure, the input ends of the first frequency hopping filter 21, the second frequency hopping filter 22, the third frequency hopping filter 23, and the fourth frequency hopping filter 24 are respectively electrically connected to the first radio frequency switch 11, the output ends of the first frequency hopping filter 21, the second frequency hopping filter 22, the third frequency hopping filter 23, and the fourth frequency hopping filter 24 are respectively electrically connected to the second radio frequency switch 12, and the output ends of the driving control circuit 31 are respectively electrically connected to the input ends of the first frequency hopping filter 21, the second frequency hopping filter 22, the third frequency hopping filter 23, and the fourth frequency hopping filter 24.
The frequency range of the first frequency hopping filter 21 is 30MHz to 90MHz, the frequency range of the second frequency hopping filter 22 is 225MHz to 512MHz, the frequency range of the third frequency hopping filter 23 is 512MHz to 678MHz, and the frequency range of the fourth frequency hopping filter 24 is 1300MHz to 1900MHz.
Referring to fig. 2, the first frequency hopping filter 21 includes two adjustable capacitor arrays 211 and a coupling inductance circuit 212 that are electrically connected, it should be noted that in the frequency hopping filter of one frequency band, the two adjustable capacitor arrays 211 are identical, for example, in the first frequency hopping filter 21, the two adjustable capacitor arrays 211 have identical structures, referring to fig. 3, the adjustable capacitor arrays 211 include ten different capacitors C1, C2, C3, C4, C5, C6, C7, C8, C9, C10 and ten identical PIN diodes D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, wherein one ends of the capacitors C1-C10 are electrically connected to the input end of the coupling inductance circuit 212, the other ends of the capacitors C1-C10 are respectively electrically connected to the cathodes of the PIN diodes D1-D10, and the anodes of the PIN diodes D1-D10 are electrically connected to the ground.
The drive control circuit 31 includes a first drive circuit for controlling the PIN diodes D1 to D10 in the adjustable capacitor array 211, and a second drive circuit for controlling the selection of the first frequency hopping filter 21, the second frequency hopping filter 22, the third frequency hopping filter 23, and the fourth frequency hopping filter 24.
The ultra-wideband working frequency band of the frequency hopping filter is divided into four sub-bands of 30MHz-90MHz, 225MHz-512MHz, 512MHz-678MHz and 1300MHz-1900MHz, the ultra-wideband frequency hopping is realized through switching of the first radio frequency switch 11 and the second radio frequency switch 12, four frequency bands of HF, VHF, UHF, L wave bands are covered, a coupling inductance circuit 212 in the sub-frequency band frequency hopping filter is connected with an adjustable capacitor array 211 to form a multi-order LC resonance filter network, the coupling transmission of signals is realized, and the filtering effect of the signals is achieved.
The external equipment is connected to the A0-A9 control port of the interface control code conversion circuit 32 through an interface, an input control signal is transcoded through the interface control code conversion circuit 32 and then is generated into a control signal to the drive control circuit 31, the drive control circuit 31 controls the first radio frequency switch 11 and the second radio frequency switch 12 to firstly gate the frequency hopping filter of the corresponding frequency band, and then the drive control circuit 31 controls the PIN diode to adjust the adjustable capacitor array 211 to realize the frequency hopping function.
With continued reference to fig. 2, the coupling inductor circuit 212 includes an inductor L1, L2, L3, L4, L5, L6, one end of the inductor L3 is electrically connected to a connection point of the inductor L1 and the inductor L2, the other end of the inductor L3 is electrically connected to a switching port of the first radio frequency switch 11 as a first radio frequency port, the other end of the inductor L1 is connected to a common end connected to the capacitors C1-C10 in the adjustable capacitor array 211, the other end of the inductor L2 is grounded, one end of the inductor L6 is electrically connected to a connection point of the inductor L4 and the inductor L5, the other end of the inductor L6 is electrically connected to a common end connected to the capacitors C1-C10 in the adjustable capacitor array 211 as a second radio frequency port, and the other end of the inductor L5 is grounded.
The inductors L1-L6 are all tap inductors, and specifically, the inductors L1-L6 are all air-core spiral coils, and particularly, in order to improve the Q value of the inductors, silver plating wires are used for coil wires, and a multi-stage LC resonance filter network is formed by a coupling inductance network formed by the tap inductors and two adjustable capacitor arrays, so that the filtering effect of signals is realized.
The main principle of the first frequency hopping filter 21 is: the first frequency hopping filter 21 composed of the adjustable capacitor array 211 and the coupling inductance circuit 212 changes the center frequency of the first frequency hopping filter 21 by changing the capacitance in the adjustable capacitor array 211, and the working principle of the adjustable capacitor array 211 is to switch the capacitance in the capacitor array by switching on and off of the PIN diode. Specifically, when the PIN diode D1 is turned on, the PIN diodes D2-D10 are turned off, the capacitance value of the adjustable capacitor array 211 is C1, when the PIN diodes D1, D3 are turned on, the PIN diodes D2, D4-D10 are turned off, the capacitance value of the adjustable capacitor array 211 is c1+c3, and so on, the number of on-off combinations of 10 PIN diodes is 2 10 In principle, 1024 values of capacitance are generated, so that the actual combination state is inevitably overlapped, the overlapped state is removed by analysis, and the effective state is stored in the control chip of the interface control code conversion circuit 32.
Specifically, the tunable capacitor array 211 is composed of 10 parallel capacitor arrays, each of which is connected in seriesPIN diode, which controls the on-off state of the capacitors C1-C10 in the capacitor array by controlling the on-off state of the PIN diode, so as to change the total capacitance of the adjustable capacitor array 211, and the relation formula of the resonant frequency and LC of the LC loop is as followsWhen the inductance L is unchanged, the capacitance C can change the magnitude of f, and the theoretical state number of the capacitance value can be 1024 according to the analysis.
As shown in fig. 4, the first radio frequency switch 11 includes a chip U3 and a chip U4, the type of the chip U3 is BGS14PN10, the type of the chip U4 is NL27WZ04DFT2G, the first pin of the chip U4 is connected with the seventh pin of the chip U2, the third pin of the chip U4 is connected with the eighth pin of the chip U2, the fourth pin of the chip U4 is connected with the fifth pin of the chip U3, the sixth pin of the chip U4 is connected with the sixth pin of the chip U2, the seventh pin of the chip U3 is electrically connected with the first radio frequency port of the first frequency hopping filter 21, the third pin of the chip U3 is electrically connected with the first radio frequency port of the second frequency hopping filter 22, and the first pin of the chip U3 is electrically connected with the first radio frequency port of the third frequency hopping filter 23.
Similarly, the second radio frequency switch 12 includes a chip U3 and a chip U4, the type of the chip U3 is BGS14PN10, the type of the chip U4 is NL27WZ04DFT2G, the first pin of the chip U4 is connected with the seventh pin of the chip U2, the third pin of the chip U4 is connected with the eighth pin of the chip U2, the fourth pin of the chip U4 is connected with the fifth pin of the chip U3, the sixth pin of the chip U4 is connected with the sixth pin of the chip U2, the seventh pin of the chip U3 is electrically connected with the second radio frequency port of the first frequency hopping filter 21, the third pin of the chip U3 is electrically connected with the second radio frequency port of the second frequency hopping filter 22, and the first pin of the chip U3 is electrically connected with the second radio frequency port of the third frequency hopping filter 23, and the ninth pin of the chip U3 is electrically connected with the second radio frequency port of the fourth frequency hopping filter 24.
It should be noted that, the working states of the four switching ports of the first RF switch 11 and the second RF switch 12 are completely consistent, for example, when the switch of the first RF switch 11 is switched to the port RF30, the RF signal arrives at the left port of the first frequency hopping filter 21 after passing through the first RF switch 11 from the RF input terminal, arrives at the port RF30 of the second RF switch 12 after passing through the first frequency hopping filter 21, arrives at the RF output terminal through the second RF switch 12, the filtering process of the signal is completed, and so on to realize the switching of the other three frequency bands, and the RF input port and the RF output port are completely consistent and reciprocal.
Specifically, referring to fig. 4, when the control signals A8 and A9 are at high level (in this embodiment, the high level is 3.3V, and the low level is 0V), the RF common port RF port is gated with the port RF30, that is, the tenth pin and the seventh pin of the chip U3 are gated, and the signal flows to: the radio frequency signal is input through the common terminal of the first radio frequency switch 11, passes through the first frequency hopping filter 21, and then is output through the common terminal through the second radio frequency switch 12.
As shown in fig. 5 and 6, the interface control code conversion circuit 32 includes a chip U1 and a chip U2, the model of the chip U1 is SN74LVC1G139DCTT, the model of the chip U2 is SST39VF400A-EKE, A0-A9 are external control interfaces connected to the chip U2, A8 and A9 are also connected to the chip U1 and the chip U4, and D0-D9 of the chip U2 and Y30, Y225, Y512 and Y1300 of the chip U1 are all connected to the driving control circuit. Referring to fig. 5, a first pin and a second pin of the chip U1 are respectively connected to an eighth pin and a seventh pin of the chip U2, a third pin of the chip U1 is connected to a second driving circuit in the fourth frequency hopping filter 24, a fifth pin of the chip U1 is connected to a second driving circuit in the third frequency hopping filter 23, a sixth pin of the chip U1 is connected to a second driving circuit in the second frequency hopping filter 22, a seventh pin of the chip U1 is connected to a second driving circuit in the first frequency hopping filter 21, and the eighth pin of the chip U1 is connected to the capacitor Cv1 in series and then grounded.
Referring to fig. 6, the first, ninth, tenth, twelfth, and sixteenth PINs of the chip U2 are connected, the second, fourth, sixth, and nineteenth PINs are connected, the third, fifth, and eighteenth PINs are connected, the seventh, eighth, and eighteenth PINs access external control signals, the twenty-ninth, thirty-first, thirty-third, thirty-fifth, thirty-eighth, fortieth, and fortieth PINs are respectively connected to the first, thirty-seventh, and thirty-seventh PINs of the driving circuits of the PIN diodes D1-D10 in the ten controlled variable capacitor array 211, and the thirty-seventh PINs are connected in series with the capacitor Cv2 and then grounded, and the fortieth, seventeenth, fortieth, and seventeenth PINs are connected and then grounded.
Ten driving circuits for controlling the PIN diode D1 to D10 are the same, and an example of a driving circuit for controlling the PIN diode D1 is described, and the driving circuit is shown in fig. 7. The first driving circuit comprises a resistor R33, a resistor R34, a resistor R39, a resistor R42, a triode Q21 and a chip Q24, wherein one end of the resistor R33 is connected with one end of the resistor R34 by a high potential of 100V, the other end of the resistor R33 is connected with a fifth PIN and a sixth PIN of the chip Q24, the other end of the resistor R34 is connected with a third PIN of the chip Q24, a collector electrode of the triode Q21 is connected with a fourth PIN of the chip Q24 and is connected with an anode of a PIN diode D1, one end of the resistor R39 is connected with a base electrode of the triode Q21, the other end of the resistor R39 is connected with a second PIN of the three chips Q24 after being connected with the resistor R42 in series, the other end of the resistor R39 is connected with a twenty-ninth PIN of the chip U2, and an emitter of the triode Q21 is connected with a first PIN of the chip Q24 and then grounded.
With continued reference to fig. 7, the driving circuit operates on the principle that the PIN diodes D1-D10 in the controlled variable capacitor array 211 are: when the signal D0 is at a high level, the first pin and the sixth pin of the chip Q24 are turned off, the third pin and the fourth pin are turned on, the triode Q21 is turned on, the PD0 outputs 0V, and the PIN diode D1 is turned off; when the signal D0 is at a low level, the first pin and the sixth pin of the chip Q24 are turned on, the third pin and the fourth pin are turned off, the triode Q21 is turned off, the PD0 outputs 100v, and the pin diode D1 is turned on. Similarly, outputs PD1-PD9 control the on and off of PIN diodes D2-D10, respectively.
The four driving circuits for controlling the first frequency hopping filter 21, the second frequency hopping filter 22, the third frequency hopping filter 23 and the fourth frequency hopping filter 24 to select the segments are the same, and the second driving circuit for controlling the first frequency hopping filter 21 to select the segments is described by taking the second driving circuit as an example, and the second driving circuit is shown in fig. 8, and comprises a resistor R19, a cmos tube Q11 and a cmos tube Q13, one end of the resistor R19 is connected with the gate of the cmos tube Q11 and then connected with the seventh pin of the chip U1, the other end of the resistor R19 is connected with the gate of the cmos tube Q13, the drain of the cmos tube Q11 is connected with the drain of the cmos tube Q13 and then connected with the common end of the adjustable capacitor array 211 in the first frequency hopping filter 21, namely the common ends of the capacitors C1-C10 in the adjustable capacitor array 211, and the source of the cmos tube Q13 is grounded.
Similarly, the driving circuit for controlling the second frequency hopping filter 22 to select the section comprises a resistor R19, a COMS tube Q11 and a COMS tube Q13, one end of the resistor R19 is connected with the grid electrode of the COMS tube Q11 and then connected with the sixth pin of the chip U1, the other end of the resistor R19 is connected with the grid electrode of the COMS tube Q13, and the drain electrode of the COMS tube Q11 is connected with the drain electrode of the COMS tube Q13 and then connected with the common end of the adjustable capacitor array 211 in the second frequency hopping filter 22. The driving circuit resistor R19, the COMS tube Q11 and the COMS tube Q13 for controlling the section selection of the third frequency hopping filter 23 are arranged, one end of the resistor R19 is connected with the grid electrode of the COMS tube Q11 and then connected with the fifth pin of the chip U1, the other end of the resistor R19 is connected with the grid electrode of the COMS tube Q13, and the drain electrode of the COMS tube Q11 is connected with the drain electrode of the COMS tube Q13 and then connected with the common end of the adjustable capacitor array 211 in the second frequency hopping filter 22. The driving circuit resistor R19, the COMS tube Q11 and the COMS tube Q13 for controlling the fourth frequency hopping filter 24 to select segments are arranged, one end of the resistor R19 is connected with the gate of the COMS tube Q11 and then connected with the third pin of the chip U1, the other end of the resistor R19 is connected with the gate of the COMS tube Q13, and the drain of the COMS tube Q11 is connected with the drain of the COMS tube Q13 and then connected with the common end of the adjustable capacitor array 211 in the second frequency hopping filter 22.
The second driving circuit controls the first frequency hopping filter 21, the second frequency hopping filter 22, the third frequency hopping filter 23 and the fourth frequency hopping filter 24 to select the segments according to the working principle that: when Y30 is at a high level, the COMS pipe Q11 is turned off, the COMS pipe Q13 is turned on, the VCC30 outputs 0V, and when Y30 is at a low level, the COMS pipe Q11 is turned on, the COMS pipe Q13 is turned off, and the VCC30 outputs 3.3V. Similarly, when Y225 is high, COMS pipe Q11 is turned off, COMS pipe Q13 is turned on, VCC225 outputs 0V, when Y225 is low, COMS pipe Q11 is turned on, COMS pipe Q13 is turned off, and VCC225 outputs 3.3V.
The VCC30 corresponds to the 30-90MHz frequency band, the VCC225 corresponds to the 225-512MHz frequency band, the VCC512 corresponds to the 512-678MHz frequency band, and the VCC1300 corresponds to the 1300-1900MHz frequency band, for example, the VCC30 is connected to the tunable capacitor array common terminal in the first frequency hopping filter 21, the VCC225 is connected to the tunable capacitor array common terminal in the second frequency hopping filter 22, the VCC512 is connected to the tunable capacitor array common terminal in the third frequency hopping filter 23, and the VCC1300 is connected to the tunable capacitor array common terminal in the fourth frequency hopping filter 24.
The above embodiments are only for illustrating the technical solution of the present utility model, and are not limiting; although the utility model has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present utility model.

Claims (10)

1. An ultra-wideband frequency hopping filter, which is characterized in that: the device comprises a radio frequency input terminal, a first radio frequency switch (11), a filter component, a second radio frequency switch (12), a radio frequency output terminal, a driving control circuit (31) and an interface control code conversion circuit (32), wherein the radio frequency input terminal, the first radio frequency switch (11), the filter component, the second radio frequency switch (12), the radio frequency output terminal, the driving control circuit (31) and the interface control code conversion circuit (32) are electrically connected in sequence, and the filter component comprises a first frequency hopping filter (21), a second frequency hopping filter (22), a third frequency hopping filter (23) and a fourth frequency hopping filter (24) which are connected in parallel;
the interface control code conversion circuit (32) is electrically connected with the drive control circuit (31), the drive control circuit (31) is electrically connected with the first radio frequency switch (11), the second radio frequency switch (12), the first frequency hopping filter (21), the second frequency hopping filter (22), the third frequency hopping filter (23) and the fourth frequency hopping filter (24) respectively, the first radio frequency switch (11) and the second radio frequency switch (12) are all four switches, the first frequency hopping filter (21), the second frequency hopping filter (22), the third frequency hopping filter (23) and the fourth frequency hopping filter (24) respectively comprise an adjustable capacitor array (211) and a coupling inductance circuit (212) which are electrically connected, and the drive control circuit (31) comprises a first drive circuit for controlling the adjustable capacitor array (211) and a second drive circuit for controlling the sections of the first frequency hopping filter (21), the second frequency hopping filter (22), the third frequency hopping filter (23) and the fourth frequency hopping filter (24).
2. The ultra-wideband frequency hopping filter of claim 1, wherein: the frequency range of the first frequency hopping filter (21) is 30MHz-90MHz, the frequency range of the second frequency hopping filter (22) is 225MHz-512MHz, the frequency range of the third frequency hopping filter (23) is 512MHz-678MHz, and the frequency range of the fourth frequency hopping filter (24) is 1300MHz-1900MHz.
3. The ultra-wideband frequency hopping filter of claim 2, wherein: the adjustable capacitor array (211) comprises ten different capacitors C1, C2, C3, C4, C5, C6, C7, C8, C9 and C10 and ten identical PIN diodes D1, D2, D3, D4, D5, D6, D7, D8, D9 and D10, one ends of the capacitors C1-C10 are connected and then electrically connected with the input end of the coupling inductance circuit (212), the other ends of the capacitors C1-C10 are respectively electrically connected with the cathodes of the PIN diodes D1-D10, and the anodes of the PIN diodes D1-D10 are connected and then grounded.
4. An ultra wideband frequency hopping filter according to claim 3, wherein: the coupling inductance circuit (212) comprises an inductance L1, L2, L3, L4, L5 and L6, one end of the inductance L3 is electrically connected with a connection point of the inductance L1 and the inductance L2, the other end of the inductance L3 is used as a first radio frequency port to be electrically connected with a switching port of the first radio frequency switch (11), the other end of the inductance L1 is connected with a common end connected with the capacitors C1-C10 in the adjustable capacitor array (211), the other end of the inductance L2 is grounded, one end of the inductance L6 is electrically connected with a connection point of the inductance L4 and the inductance L5, the other end of the inductance L6 is used as a second radio frequency port to be electrically connected with a switching port of the second radio frequency switch (12), the other end of the inductance L5 is connected with a common end connected with the capacitors C1-C10 in the adjustable capacitor array (211), and the other end of the inductance L4 is grounded.
5. The ultra-wideband frequency hopping filter of claim 4, wherein: the inductances L1-L6 are all tap inductances.
6. An ultra wideband frequency hopping filter according to claim 3, wherein: the interface control code conversion circuit (32) comprises a chip U1 and a chip U2, wherein a first pin and a second pin of the chip U1 are respectively connected with an eighth pin and a seventh pin of the chip U2, a third pin of the chip U1 is connected with a second driving circuit in a fourth frequency hopping filter (24), a fifth pin of the chip U1 is connected with a second driving circuit in a third frequency hopping filter (23), a sixth pin of the chip U1 is connected with a second driving circuit in a second frequency hopping filter (22), a seventh pin of the chip U1 is connected with a second driving circuit in the first frequency hopping filter (21), and the eighth pin of the chip U1 is connected with a capacitor Cv1 in series and then grounded;
the first PIN, the ninth PIN, the tenth PIN, the twelfth PIN and the sixteenth PIN of the chip U2 are connected, the second PIN, the fourth PIN, the sixth PIN and the nineteenth PIN are connected, the third PIN, the fifth PIN and the eighteenth PIN are connected, the seventh PIN, the eighth PIN, the eighteenth PIN and the twenty-fifth PIN are connected with external control signals, the twenty-ninth PIN, the thirty-first PIN, the thirty-third PIN, the thirty-fifth PIN, the thirty-eighth PIN, the fortieth second PIN, the fortieth fourth PIN, the thirty-fourth PIN and the thirty-second PIN are respectively connected to a first driving circuit of PIN diode D1-D10 in the ten controlled adjustable capacitor array (211), the thirty-seventh PIN is connected with a capacitor Cv2 in series and then grounded, and the fortieth sixth PIN, the fortieth PIN and the seventeenth PIN are connected with a seventeenth PIN and then grounded.
7. The ultra-wideband frequency hopping filter of claim 6, wherein: the first radio frequency switch (11) comprises a chip U3 and a chip U4, wherein a first pin of the chip U4 is connected with a seventh pin of the chip U2, a third pin of the chip U4 is connected with an eighth pin of the chip U2, a fourth pin of the chip U4 is connected with a fifth pin of the chip U3, a sixth pin of the chip U4 is connected with a sixth pin of the chip U2, a seventh pin of the chip U3 is electrically connected with a first radio frequency port of the first frequency hopping filter (21), a third pin of the chip U3 is electrically connected with a first radio frequency port of the second frequency hopping filter (22), a first pin of the chip U3 is electrically connected with a first radio frequency port of the third frequency hopping filter (23), and a ninth pin of the chip U3 is electrically connected with a first radio frequency port of the fourth frequency hopping filter (24).
8. The ultra-wideband frequency hopping filter of claim 6, wherein: the second radio frequency switch (12) comprises a chip U3 and a chip U4, wherein a first pin of the chip U4 is connected with a seventh pin of the chip U2, a third pin of the chip U4 is connected with an eighth pin of the chip U2, a fourth pin of the chip U4 is connected with a fifth pin of the chip U3, a sixth pin of the chip U4 is connected with a sixth pin of the chip U2, a seventh pin of the chip U3 is electrically connected with a second radio frequency port of the first frequency hopping filter (21), a third pin of the chip U3 is electrically connected with a second radio frequency port of the second frequency hopping filter (22), a first pin of the chip U3 is electrically connected with a second radio frequency port of the third frequency hopping filter (23), and a ninth pin of the chip U3 is electrically connected with a second radio frequency port of the fourth frequency hopping filter (24).
9. An ultra wideband frequency hopping filter according to claim 3, wherein: the first driving circuit comprises a resistor R33, a resistor R34, a resistor R39, a resistor R42, a triode Q21 and a chip Q24, wherein one end of the resistor R33 and one end of the resistor R34 are connected with high potential 100V, the other end of the resistor R33 is connected with a fifth PIN and a sixth PIN of the chip Q24, the other end of the resistor R34 is connected with a third PIN of the chip Q24, a collector of the triode Q21 is connected with a fourth PIN of the chip Q24 and is connected with an anode of a PIN diode D1, one end of the resistor R39 is connected with a base of the triode Q21, the other end of the resistor R39 is connected with a second PIN of the three chips Q24 after being connected with the resistor R42 in series, the other end of the resistor R39 is connected with a twenty-ninth PIN of the chip U2, and an emitter of the triode Q21 is connected with a first PIN of the chip Q24 and then grounded.
10. An ultra wideband frequency hopping filter according to claim 3, wherein: the driving circuit comprises a resistor R19, a COMS tube Q11 and a COMS tube Q13, one end of the resistor R19 is connected with a seventh pin of the chip U1 after the grid electrode of the COMS tube Q11, the other end of the resistor R19 is connected with the grid electrode of the COMS tube Q13, the drain electrode of the COMS tube Q11 is connected with the common end connected with the capacitors C1-C10 in the adjustable capacitor array (211) after the drain electrode of the COMS tube Q13, and the source electrode of the COMS tube Q13 is grounded.
CN202321256784.5U 2023-05-19 2023-05-19 Ultra-wideband frequency hopping filter Active CN219554937U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202321256784.5U CN219554937U (en) 2023-05-19 2023-05-19 Ultra-wideband frequency hopping filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202321256784.5U CN219554937U (en) 2023-05-19 2023-05-19 Ultra-wideband frequency hopping filter

Publications (1)

Publication Number Publication Date
CN219554937U true CN219554937U (en) 2023-08-18

Family

ID=87701888

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202321256784.5U Active CN219554937U (en) 2023-05-19 2023-05-19 Ultra-wideband frequency hopping filter

Country Status (1)

Country Link
CN (1) CN219554937U (en)

Similar Documents

Publication Publication Date Title
CN104242976B (en) Antenna tuning circuit, the method for tuned antenna, antenna arrangement and the method for operating antenna arrangement
CN209517084U (en) A kind of large-power broadband bounce frequency filter
CN114257213B (en) Adjustable band-pass tuning frequency-selecting circuit, electrically tunable filter and adjusting method thereof
CN103490794A (en) Variable shortwave antenna tuner matching network structure circuit
CN107732424B (en) Antenna tuning network structure and method for realizing impedance matching of short-wave loop antenna
US20150048992A1 (en) Broadband matching circuits
CN105991105A (en) Novel LC electrically-tunable band-pass filter and LC electrically-tunable band-stop filter
CN202050389U (en) Radio frequency band-pass filter circuit
CN219554937U (en) Ultra-wideband frequency hopping filter
CN110289831A (en) A kind of high low pass combination LC band logical electrically tunable filter
CN201096883Y (en) High band digital tuning LC filter
CN113067559A (en) Numerical control integrated adjustable frequency hopping filter
CN209608625U (en) Crystal filter circuit with frequency compensation automatic regulating function
CN201898489U (en) Numerical-control frequency hopping filter
CN213186061U (en) Digital tuning band-pass filter circuit and filter
CN203278771U (en) Ultra wide band frequency hopping filter
CN114710129A (en) Electrically tunable filter and method for widening tuning range
CN215990722U (en) Filter and electronic equipment
CN112367057B (en) Composite structure frequency hopping filter and adjusting method thereof
CN103152003A (en) Ultra-wide band electrically-tunable band-pass filter set and frequency control method thereof
CN113014222B (en) Band-pass filter circuit and electronic equipment
CN220107956U (en) Integrated multi-unit broadband frequency hopping filter
CN205646084U (en) High -power quick frequency hopping combiner
CN202034952U (en) Ultra short wave full frequency band electrically-tunable filter used for handheld communication machine
CN102064787B (en) Radio frequency band-pass filter circuit

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant