CN219478210U

CN219478210U - Multilayer coincide circuit board of error proofing layer

Info

Publication number: CN219478210U
Application number: CN202320380447.0U
Authority: CN
Inventors: 郭达文; 刘智; 罗海春; 旷成龙; 刘根喜
Original assignee: Jiangxi Redboard Technology Co Ltd
Current assignee: Jiangxi Redboard Technology Co Ltd
Priority date: 2023-03-03
Filing date: 2023-03-03
Publication date: 2023-08-04
Anticipated expiration: 2033-03-03

Abstract

The utility model provides a multilayer coincide circuit board of error proofing layer, it includes two outside side pressure plywood and a plurality of interior side pressure plywood, interior side pressure plywood and outside pressfitting board all include set up in middle part big board effective area and set up in the outside of big board outer side board limit area; the inner side pressing plate comprises an outer side plate edge area, an inner layer two-dimensional code is arranged on the outer side plate edge area of the inner side pressing plate, a plurality of small plates are arranged on a large plate effective area of the outer side pressing plate, outer layer two-dimensional codes are arranged at the plate edge positions of the small plates, bayonets are arranged at the outer side ends of the outer side plate edge area of the outer side pressing plate and the outer side plate edge area of the inner side pressing plate, bayonets on each pressing plate are arranged on the same side, but are arranged at different positions, and after the plurality of pressing plates are arranged up and down, a plurality of bayonets can be combined to form a pattern in a regular or special-shaped state. The multi-layer circuit board provided by the utility model adopts multiple mistake proofing, has a good mistake proofing effect, has a tracing function, is high in practicability, and has a relatively strong popularization meaning.

Description

Multilayer coincide circuit board of error proofing layer

Technical Field

The present disclosure relates to circuit boards, and particularly to a multilayer laminated circuit board with staggered layers.

Background

The application of the multi-layer PCB circuit board is more and more mature, and a plurality of substrates are required to be stacked together and subjected to edge sealing treatment during manufacturing. In order to prevent the front and back surfaces of the substrate layer from being misplaced during lamination, the surface of the substrate layer is often marked with a mark to change the electrical characteristics. However, this method, although solving the problem of misplacement of the front and back surfaces, cannot solve the problem of level upside down. At present, there are few prior arts capable of achieving the error proofing layer, however, the technology requires additional processing procedures and materials, so that the material cost is high.

As disclosed in chinese patent CN201921584371.3, a multi-layer PCB with an error-proofing layer is disclosed, in which each substrate unit is provided with a viewing area, a plurality of viewing areas in the same PCB are identical in position, and each viewing area is provided with a plurality of label areas, the number of label areas is identical to the number of layers of the substrate unit of the PCB; each substrate unit is provided with copper bars in the same label area as the number of layers of the substrate unit, and after a plurality of substrate units are laminated, the positions of the copper bars form a method of arranging order. However, this method has a problem that a step of providing a plurality of inspection areas is additionally added, and copper bars are further arranged in the inspection areas, so that the material cost is greatly increased.

Disclosure of Invention

Based on this, it is necessary to provide a multilayer laminated circuit board with an error proofing layer against the defects in the prior art.

The utility model provides a multilayer coincide circuit board of error proofing layer, it includes two outside side pressure plywood and a plurality of interior side pressure plywood, interior side pressure plywood and outside pressfitting board all include set up in middle part big board effective area and set up in the outside of big board outer side board limit area; the inner side pressing plate comprises an outer side plate edge area, an inner layer two-dimensional code is arranged on the outer side plate edge area of the inner side pressing plate, a plurality of small plates are arranged on a large plate effective area of the outer side pressing plate, outer layer two-dimensional codes are arranged at the plate edge positions of the small plates, bayonets are arranged at the outer side ends of the outer side plate edge area of the outer side pressing plate and the outer side plate edge area of the inner side pressing plate, bayonets on each pressing plate are arranged on the same side, but are arranged at different positions, and after the plurality of pressing plates are arranged up and down, a plurality of bayonets can be combined to form a pattern in a regular or special-shaped state.

Further, the display window is arranged on one side face of the pressing shell, and limiting parts are respectively extended on two opposite side faces of the display window.

Further, the outer side pressing plate and the inner side pressing plate are sequentially overlapped in the pressing shell, and a plurality of bayonets are arranged and displayed in the display window.

Further, the small plate comprises a plate edge and a circuit area arranged on the inner side of the plate edge, an outer layer circuit layer is arranged on the circuit area, and the outer layer two-dimensional code is arranged at the position of the plate edge.

Further, the outer side plate edge area of the outer side pressure plate is provided with a visual window, and the visual window is arranged corresponding to the inner layer two-dimensional code.

Further, the edges of the bayonet are formed into identification lines.

In summary, according to the utility model, the traceable two-dimensional code is arranged on each lamination layer, so that during lamination, identification and reading can be performed through the scanner, error placement can be avoided, and the procedures and flows of products can be traced. The upper surface and the lower surface of the product lamination can be identified through a two-dimensional code identification surface; the identification position of the two-dimensional code and the position of the visual window and the bayonet can be used for preventing errors at left and right positions; and the two-dimensional code and the bayonet position can also be used for interlayer mistake proofing between the upper layer and the lower layer. In addition, the design of the two-dimensional code and the bayonet can realize error prevention and tracing without adding extra production steps, and the utility model has strong practicability and strong popularization significance.

Drawings

FIG. 1 is a schematic side view of a multilayer laminated circuit board with error proofing layers according to the present utility model;

FIG. 2 is a schematic diagram of the inner layer of the circuit board in FIG. 1;

FIG. 3 is a schematic view of the outer layer of the circuit board in FIG. 1;

fig. 4 is a schematic structural diagram of the press-fit housing of the circuit board in fig. 1.

Detailed Description

The present utility model will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present utility model more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the utility model.

As shown in fig. 1 to 4, the multi-layer laminated circuit board with an error proofing layer provided by the present utility model includes two outer laminated boards 10 and a plurality of inner laminated boards 20, wherein each of the inner laminated boards 20 and the outer laminated boards 10 includes a middle large board effective area 11 and an outer board edge area 12 arranged outside the large board 11. An inner layer two-dimensional code 13 is arranged on the outer side plate edge area 12 of the inner side pressing plate 10, and the inner layer two-dimensional code 13 is formed by once finishing the inner side pressing plate 10 during production and processing, and no additional processing steps are needed. For example, the inner layer line and the inner layer two-dimensional code 13 are formed simultaneously during exposure and etching processes. The inner layer two-dimensional code 13 includes information such as a plate material, a dimensional parameter, a processing step, and the like of the inner side pressure plate 10.

The big effective board area of outside pressfitting board 20 includes a plurality of smalls 21, smalls 21 include limit 22 and set up in the inboard circuit district 23 of limit 22, be provided with outer circuit layer on the circuit district 23, the outside limit district of outside pressfitting board 20 is equipped with visual 24, visual 24 corresponds the design of inlayer two-dimensional code 13 to be convenient for discern the information of reading inlayer two-dimensional code 13. The design of the inner layer two-dimensional code 13 ensures that the products can be confirmed by scanning codes in sequence when being stacked; and because the visual window 24 corresponds to the position of the inner two-dimensional code 13, when the outermost layer is processed, the code scanning can be finally performed to confirm whether the error layer exists or not, and the product can be traced. The plate edge 22 of the small plate 21 is provided with an outer layer two-dimensional code 25, and the outer layer two-dimensional code 25 comprises information such as pressing, outer layer circuits and the like so as to facilitate identification and tracing.

The outer side plate 10 and the outer side plate edge area 12 of the inner side plate 20 are provided with bayonets 14 at the outer side ends thereof, and the edges of the bayonets 14 are formed into identification lines so as to facilitate visual inspection of the shape and position of the bayonets 14. The identification lines are formed by laser ablation when the pressing plate 10 is cut; is formed for the same V-CUT step without additional steps. In this embodiment, the bayonets 14 on each of the pressing plates are disposed on the same side, but are disposed at different positions, and when the pressing plates are arranged up and down, the bayonets 14 are combined to form a regular or specific pattern.

The multilayer circuit board mistake proofing coincide circuit board outside still is equipped with a lamination and uses pressfitting shell 30, be provided with show window 31 on the side of pressfitting shell 30, the spacing portion 32 has all been extended on the two opposite sides of show window 31 to carry out spacingly to the pressfitting board. During lamination, a scanning instrument is adopted to scan two-dimensional code information on each lamination layer to be laminated, wherein the outer surface of the outermost lamination layer 10 is free of outer two-dimensional codes before lamination, an outer lamination layer 10 is placed at the bottommost part, then an inner lamination layer 20 is scanned and identified, and the lamination layers are sequentially placed in a lamination jig shell 30. When all the layers are laminated, the pattern of the arrangement of the bayonets 14 is displayed through the display window 31, so that a user can visually and further check whether the lamination has an error. After the lamination, an outer layer circuit and an outer layer two-dimensional code are formed on the outer surface of the outermost lamination layer 10.

In summary, according to the utility model, the traceable two-dimensional code is arranged on each lamination layer, so that during lamination, identification and reading can be performed through the scanner, error placement can be avoided, and the procedures and flows of products can be traced. The upper surface and the lower surface of the product lamination can be identified through a two-dimensional code identification surface; the positions of the two-dimensional code identification position, the visible window 24, the bayonet 14 and the display window 31 can be used for preventing errors in left and right positions; the two-dimensional code and the bayonet 14 can also be used for interlayer error prevention between the upper layer and the lower layer. In addition, the design of the two-dimensional code and the bayonet 14 can realize error prevention and tracing without adding extra production steps, and the utility model has strong practicability and strong popularization significance.

The above examples illustrate only one embodiment of the utility model, which is described in more detail and is not to be construed as limiting the scope of the utility model. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the utility model, which are all within the scope of the utility model. Accordingly, the scope of protection of the present utility model is to be determined by the appended claims.

Claims

1. The utility model provides a multilayer coincide circuit board of error proofing layer which characterized in that: the device comprises two outer side pressing plates and a plurality of inner side pressing plates, wherein each of the inner side pressing plates and the outer side pressing plates comprises an effective area arranged in the middle of the large plate and an outer side plate side area arranged at the outer side of the large plate; the inner side pressing plate comprises an outer side plate edge area, an inner layer two-dimensional code is arranged on the outer side plate edge area of the inner side pressing plate, a plurality of small plates are arranged on a large plate effective area of the outer side pressing plate, outer layer two-dimensional codes are arranged at the plate edge positions of the small plates, bayonets are arranged at the outer side ends of the outer side plate edge area of the outer side pressing plate and the outer side plate edge area of the inner side pressing plate, bayonets on each pressing plate are arranged on the same side, but are arranged at different positions, and after the plurality of pressing plates are arranged up and down, a plurality of bayonets can be combined to form a pattern in a regular or special-shaped state.

2. The error-proofing multilayer laminated circuit board of claim 1, wherein: the display window is arranged on one side face of the pressing shell, and limiting parts are respectively extended on two opposite side faces of the display window.

3. The error-proofing multilayer laminated circuit board of claim 2, wherein: the outer side pressing plate and the inner side pressing plate are sequentially overlapped in the pressing shell, and a plurality of bayonets are arranged and displayed in the display window.

4. The error-proofing multilayer laminated circuit board of claim 1, wherein: the small plate comprises a plate edge and a circuit area arranged on the inner side of the plate edge, an outer layer circuit layer is arranged on the circuit area, and the outer layer two-dimensional code is arranged at the position of the plate edge.

5. The error-proofing multilayer laminated circuit board of claim 1, wherein: the outer side plate edge area of the outer side pressure plate is provided with a visual window, and the visual window corresponds to the inner layer two-dimensional code.

6. The error-proofing multilayer laminated circuit board of claim 1, wherein: the edges of the bayonets are formed into identification lines.