CN218771997U - Concentrating photovoltaic cell substrate heat radiation structure - Google Patents
Concentrating photovoltaic cell substrate heat radiation structure Download PDFInfo
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- CN218771997U CN218771997U CN202222945681.1U CN202222945681U CN218771997U CN 218771997 U CN218771997 U CN 218771997U CN 202222945681 U CN202222945681 U CN 202222945681U CN 218771997 U CN218771997 U CN 218771997U
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Abstract
The utility model relates to a technical field of photovoltaic cell base plate, specifically speaking relates to a spotlight photovoltaic cell base plate heat radiation structure, including chip, bare substrate, radiator, second insulating layer, bare substrate includes etching layer and bottom, etching layer one side with the chip switches on, etching layer opposite side with the bottom rigid coupling, etching layer are equipped with fifth etching piece, and fifth etching piece one side switches on with the chip, and the bottom is equipped with the thermovent, and fifth etching piece opposite side stretches into inside the thermovent, the bottom lower part with second insulating layer rigid coupling, second insulating layer covers fifth etching piece, the bottom lower part with the radiator welding; the utility model discloses a second insulating layer can make and insulate between chip and the radiator, avoids the radiator electrified production risk of electrocuting, simultaneously, reduces heat dissipation path, improves the radiating efficiency to only need once to weld between naked base plate and the radiator and can accomplish the connection, simplified the processing step, improve production efficiency.
Description
Technical Field
The utility model relates to a technical field of photovoltaic cell base plate, specifically speaking relates to a spotlight photovoltaic cell base plate heat radiation structure.
Background
The photovoltaic cell is a device for directly converting solar light energy into electric energy, and is called a solar photovoltaic cell, and generally adopts a polycrystalline silicon cell and a monocrystalline silicon cell, however, in recent years, the solar photovoltaic cell has been greatly developed all over the world, and the price of the polycrystalline silicon in the international market is rising all the way due to the limited supply capacity of the raw material polycrystalline silicon, so that a novel high-power light-gathering cell is present, and the cell has the advantages of high conversion rate, small occupied area of the cell and less material consumption.
Chinese patent CN115036383A discloses a gallium arsenide battery heat radiation structure, including the gallium arsenide chip, the power is anodal, power negative pole and radiator, the base plane of gallium arsenide chip passes through the welded layer and connects basic copper, the power negative pole passes through the base plane that basic copper connects the gallium arsenide chip, the gallium arsenide chip passes through the positive wire and connects the copper foil circuit board, the copper foil circuit board is connected the power is anodal, the copper foil circuit board bonds on the basic copper through the insulating heat conduction coating of epoxy, the radiator is connected through the insulating heat conduction coating of pottery copper facing to basic copper opposite side, the insulating heat conduction layer of pottery copper facing is the insulator that the two-sided copper that covers of pottery, two sides adopt the tin welding, one side and basic copper welding, another side and radiator welding, the heat dissipation route of gallium arsenide chip is: the heat dissipation structure can improve the heat conduction efficiency between the gallium arsenide chip and the heat radiator and also can keep the insulating performance between the basic copper plate and the heat radiator.
In summary, in order to maintain the insulating property between the gallium arsenide chip and the heat sink, the ceramic copper-plated insulating and heat-conducting coating is welded between the base copper plate and the heat sink, and a ceramic double-sided copper-plated material is adopted, during processing, one side of the ceramic copper-plated insulating and heat-conducting coating needs to be soldered with the base copper plate, and the other side of the ceramic copper-plated insulating and heat-conducting coating needs to be soldered with the heat sink, so that the insulation between the base copper plate and the heat sink can be realized only by two steps of soldering, and the processing period is long; meanwhile, the ceramic copper-plated insulating heat-conducting coating has a certain thickness and can influence the heat-conducting efficiency, so that the heat-radiating structure of the concentrating photovoltaic cell substrate is urgently needed to be provided, and compared with the prior art, the heat-radiating structure of the photovoltaic cell substrate, which can keep the insulating performance and can simplify the processing steps, is provided.
SUMMERY OF THE UTILITY MODEL
In order to solve the technical problem, the utility model provides a spotlight photovoltaic cell base plate heat radiation structure.
In order to achieve the above purpose, the technical scheme of the utility model is as follows:
the utility model provides a spotlight photovoltaic cell base plate heat radiation structure, includes chip, bare substrate and radiator, bare substrate includes etching layer and bottom, etching layer one side with the chip switches on, etching layer opposite side with the bottom rigid coupling, the etching layer is equipped with the fifth etching piece, fifth etching piece one side with the chip switches on, the bottom is equipped with the thermovent, fifth etching piece opposite side stretches into inside the thermovent, the bottom lower part sets up the second insulating layer, the second insulating layer covers the fifth etching piece, the bottom lower part with the radiator welding.
Further, the second insulating layer adopts insulating printing ink material, second insulating layer thickness is 0.5um.
Furthermore, the lower part of the etching layer is coated with insulating ink.
Furthermore, the lower part of the chip is set as a positive electrode, two ends of the chip are set as negative electrodes, the fifth etching block is conducted with the positive electrode of the chip, and the etching layer is also conducted with the negative electrode of the chip.
Furthermore, the etching layer comprises a first etching layer and a second etching layer, the first etching layer is communicated with the negative terminal seat, and the second etching layer is communicated with the positive terminal seat.
Furthermore, the first etching layer comprises a second etching block and a third etching block, and the second etching block and the third etching block are both communicated with the negative terminal seat; the second etching layer includes a sixth etching block and a seventh etching block, and both the sixth etching block and the seventh etching block are in conduction with the positive terminal base.
Furthermore, the chip cathode is conducted with the first etching layer through a plurality of pins.
Still further, the diode device further comprises a bypass diode, and the bypass diode is respectively connected with the positive terminal seat and the negative terminal seat in parallel through the etching layer.
Furthermore, the first etching layer is further provided with a first etching block, the second etching layer is further provided with a fourth etching block, and the first etching block and the fourth etching block are both conducted with the bypass diode.
Furthermore, a first insulating layer is arranged on the upper portion of the etching layer, and the first etching block, the second etching block, the third etching block, the fourth etching block, the fifth etching block, the sixth etching block and the seventh etching block are arranged to protrude out of the first insulating layer.
Compared with the prior art, the beneficial effects of the utility model are that:
(1) The utility model discloses etching layer one side switches on with the chip, and etching layer opposite side and bottom rigid coupling, the etching layer is equipped with fifth etching piece, and the lateral wall of fifth etching piece one side switches on with the chip positive pole, and the bottom is equipped with the thermovent, and fifth etching piece opposite side can stretch into the thermovent inside, and the bottom downside welds the second insulating layer, and the second insulating layer covers the setting of fifth etching piece, and the bottom downside still welds the radiator, and the radiator is with second insulating layer butt; the chip and the radiator can be insulated through the second insulating layer, and the electric shock risk caused by electrification of the radiator is avoided. Simultaneously, for the connected mode who adopts ceramic copper facing insulating layer among the prior art, the utility model discloses can reduce the heat dissipation route, improve the radiating efficiency to only need once to weld between naked base plate and the radiator and can accomplish the connection, simplified the processing step, improve production efficiency.
(2) The second insulating layer adopts insulating printing ink material to the thickness of second insulating layer is only 0.5um, and the anodal heat of chip passes through chip, fifth etching piece, second insulating layer in proper order, arrives the radiator again, adopts the less second insulating layer of thickness to insulate, can be on the basis of guaranteeing insulating effect, also can play fine heat conduction effect.
(3) The first etching block arranged on the upper portion of the first etching layer can be conducted with one end of the bypass diode, the fourth etching block arranged on the upper portion of the second etching layer can be conducted with the other end of the bypass diode, the bypass diode is connected with the positive terminal seat and the negative terminal seat in parallel, the bypass diode in parallel connection can prevent the photovoltaic cell from becoming a load due to the fact that the partially shielded cell cannot be illuminated under strong light, and therefore heat of other cells which are illuminated is consumed, and the cells are seriously heated and damaged.
Drawings
Fig. 1 is a schematic view of the overall structure of the present invention;
FIG. 2 is an exploded view in front view of the present invention;
FIG. 3 is a schematic structural diagram of an etching layer according to the present invention;
FIG. 4 is a schematic view of the position relationship between the bottom layer and the second insulating layer;
fig. 5 is a schematic structural diagram of the embodiment of the present invention after being mounted on a heat sink.
Description of reference numerals:
1. a chip; 11. a pin; 2. a bare substrate; 21. a first insulating layer; 22; etching the layer; 221. a first etching layer; 2211. a first etching block; 2212. a second etching block; 2213. a third etching block; 222. a second etching layer; 2221. a fourth etching block; 2222. a fifth etching block; 2223. a sixth etching block; 2224. a seventh etching block; 23. a bottom layer; 231. a heat conducting port; 3. a second insulating layer; 4. a bypass diode; 5. a negative terminal base; 6. a positive terminal base; 7. a heat sink; 8. and (6) welding the layers.
Detailed Description
The technical solution of the present invention will be described clearly with reference to the accompanying drawings, and it is obvious that the described embodiments are not all embodiments of the present invention, and all other embodiments obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention. It should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus should not be construed as limiting the present invention.
As shown in fig. 1, the utility model provides a spotlight photovoltaic cell base plate heat radiation structure, including chip 1, bare substrate 2, negative pole terminal seat 5, positive terminal seat 6 and bypass diode 4, bare substrate 2 front side lateral wall central point puts welding chip 1, chip 1 rear side lateral wall central point puts and establishes to be anodal, chip 1's upper and lower both ends position is the negative pole; the lower part of the front side wall of the bare substrate 2 is fixedly connected with a bypass diode 4 and a positive terminal seat 6, the bypass diode 4 and the positive terminal seat 6 are positioned at two ends of the lower part of the front side wall of the bare substrate 2, the bypass diode 4 and the positive terminal seat 6 are positioned on the same horizontal line of the front side wall of the bare substrate 2, the upper part of the front side wall of the bare substrate 2 is also fixedly connected with a negative terminal seat 5, the negative terminal seat 5 is positioned right above the bypass diode 4, the opening of the negative terminal seat 5 faces upwards, the positive terminal seat 6 and the negative terminal seat 5 are positioned at two ends of a diagonal line of the front side wall of the bare substrate 2, and the opening of the positive terminal seat 6 faces right below; the positive terminal seat 6 and the negative terminal seat 5 are arranged, so that the positive electrode and the negative electrode of the chip 1 can be communicated with other devices, and the electric conduction effect can be realized; the bypass diode 4 is arranged, so that the gallium arsenide cell can be effectively prevented from being burnt due to a hot spot effect, and the solar cell can be prevented from being damaged due to serious heating of the shielded cell because some shielded cells become loads due to failure of light irradiation and energy stored by other illuminated cells is consumed under strong light due to shielding.
As shown in fig. 2, the bare substrate 2 is made of copper, the thickness of the bare substrate 2 is 0.8mm, the bare substrate 2 is arranged in layers, the bare substrate 2 sequentially comprises a first insulating layer 21, an etching layer 22 and a bottom layer 23 from top to bottom, the first insulating layer 21 is arranged on the top, and the first insulating layer 21 is arranged to protect the circuit, prevent the circuit from being damaged and play an insulating role; the middle layer is an etching layer 22, the etching layer 22 is made of copper, the lowest layer is a bottom layer 23, and the bottom layer 23 is also made of copper.
As shown in fig. 3, the etching layer 22 includes a first etching layer 221, a second etching layer 222 and a plurality of etching blocks, the first etching layer 221 has an F-shaped cross section along the vertical direction, a first etching block 2211, a second etching block 2212 and a third etching block 2213 are welded to the front side wall of the vertical portion of the first etching layer 221, the first etching block 2211, the second etching block 2212 and the third etching block 2213 are arranged to protrude from the first insulating layer 21, the first etching block 2211, the second etching block 2212 and the third etching block 2213 are located on a vertical line, the front side wall of the first etching block 2211 is plated with nickel to form a negative electrode pad and is electrically connected to the bypass diode 4, and the bypass diode 4 is soldered to the first etching block 2211 above the side wall of the first insulating layer 21; the front side walls of the second etching block 2212 and the third etching block 2213 are also plated with nickel and gold to form a negative electrode pad and are conducted with the negative electrode terminal base 5, and the side wall of the negative electrode terminal base 5 close to the first insulating layer 21 is soldered with the second etching block 2212 and the third etching block 2213; the front side walls of the two horizontal parts of the first etching layer 221 are also plated with nickel and gold to form negative electrode pads, the negative electrode pads are conducted with the negative electrodes at the upper end and the lower end of the chip 1 through a plurality of pins 11, and the negative electrode end of the chip 1 is soldered with the two horizontal parts of the first etching layer 221 through the pins 11; the rear side wall of the first etching layer 221 is brushed with insulating ink.
A fifth etching block 2222 is horizontally welded at the left end of the horizontal part above the second etching layer 222, the fifth etching block 2222 protrudes out of the first insulating layer 21, the thickness of the fifth etching block 2222 is greater than that of the second etching layer 222, the side wall of the front side of the fifth etching block 2222 is plated with nickel and gold to form a positive electrode pad and is conducted with the positive electrode of the chip 1, and the positive electrode of the chip 1 is soldered with the fifth etching block 2222; a fourth etching block 2221 is welded at the left end of the front side wall of the horizontal part below the second etching layer 222, the fourth etching block 2221 is arranged to protrude out of the first insulating layer 21, the front side wall of the fourth etching block 2221 is plated with nickel and gold to form an anode pad and is conducted with the side wall of the bypass diode 4 close to one side of the first insulating layer 21, and the bypass diode 4 is welded with the front side wall of the fourth etching block 2221 under the first insulating layer 21; a sixth etching block 2223 and a seventh etching block 2224 are sequentially welded to the front side wall of the vertical part of the second etching layer 222 from bottom to top, the sixth etching block 2223 and the seventh etching block 2224 protrude out of the first insulating layer 21, the front side walls of the sixth etching block 2223 and the seventh etching block 2224 are plated with nickel and gold to form a positive electrode pad and are communicated with the positive electrode terminal seat 6, and the side wall of the positive electrode terminal seat 6, which is close to the first insulating layer 21, is respectively welded to the sixth etching block 2223 and the seventh etching block 2224 through tin; the rear side wall of the second etching layer 222 is coated with insulating ink, and the rear side wall of the fifth etching block is arranged to protrude out of the insulating ink.
The negative electrode of the chip 1 is conducted with the negative terminal seat 5 through the first etching layer 221, the positive electrode of the chip 1 is conducted with the positive terminal seat 6 through the second etching layer 222, the positive terminal seat 6 and the negative terminal seat 5 are connected with the bypass diode 4 in parallel, the battery can be prevented from generating a spot effect and generating a large amount of heat to be damaged, the side walls of the rear sides of the first etching layer 221 and the second etching layer 222 are coated with insulating ink, and the bottom layer 23 can be prevented from being electrified.
As shown in fig. 4, a heat dissipation port is disposed at a center of an upper side wall of the bottom layer 23, the heat dissipation port is vertically disposed, the heat dissipation port is a through port, a portion of the fifth etching block 2222 protruding out of the insulating ink brushed on a lower side wall of the second etching layer 222 can extend into the heat dissipation port, a length and a width of a cross section of the heat dissipation port in a horizontal direction are the same as those of a cross section of the fifth etching block 2222 in a vertical direction, the second insulating layer 3 is fixedly connected to the center of the lower side wall of the bottom layer 23, the upper side wall of the second insulating layer 3 covers the heat dissipation port, and the fifth etching block 2222 extends out of one side wall of the heat dissipation port and is attached to the second insulating layer 3, the second insulating layer 3 is made of 0.5um insulating ink, and is provided with the second insulating layer 3, so as to prevent the heat sink 7 from being electrified and to achieve an insulating effect, and the second insulating layer 3 is thin in thickness, and can achieve a good heat dissipation effect.
As shown in fig. 5, the lower side wall of the base layer 23 is welded to the heat sink 7 by the welding layer 8, and the heat sink 7 abuts against the side wall of the first insulating layer 21 on the side away from the base layer 23.
Conductive paths of the substrate of the concentrated photovoltaic cell of the embodiment: chip 1 positive electrode-second etching layer 222-positive electrode terminal holder 6; chip 1 negative electrode-pin 11-first etching layer 221-negative electrode terminal base 5.
The heat dissipation path of the concentrating photovoltaic cell of the embodiment is as follows: chip 1-fifth etch block 2222-second insulating layer 3-heat spreader 7.
The utility model discloses when guaranteeing that radiator 7 is uncharged, also can guarantee the radiating efficiency of chip 1, also can simplify the processing step of second insulating layer 3, only need carry out tin welding with second insulating layer 3 and naked base plate 2 lower parts, and radiator 7 then welds with naked base plate 2, radiator 7 and second insulating layer 3 are in the butt relation, thus, processing step simplifies to a welding, and second insulating layer 3 adopts 0.5 um's insulating printing ink material, can also shorten chip 1's heat dissipation route, make chip 1 dispel the heat better, and the radiating efficiency is improved.
The above embodiments are only used to illustrate the technical solutions of the present invention and not to limit, although the present invention has been described in detail with reference to the examples, those skilled in the art should understand that the technical solutions of the present invention can be modified or replaced with equivalents without departing from the scope of the technical solutions of the present invention, which should be covered by the scope of the claims of the present invention.
Claims (10)
1. The utility model provides a spotlight photovoltaic cell base plate heat radiation structure, includes chip, bare substrate and radiator, its characterized in that, bare substrate includes etching layer and bottom, etching layer one side with the chip switches on, etching layer opposite side with the bottom rigid coupling, the etching layer is equipped with fifth etching piece, fifth etching piece one side with the chip switches on, the bottom is equipped with the thermovent, fifth etching piece opposite side stretches into inside the thermovent, the bottom lower part sets up the second insulating layer, the second insulating layer covers the fifth etching piece, the bottom lower part with the radiator welding.
2. The concentrating photovoltaic cell substrate heat dissipation structure of claim 1, wherein the second insulating layer is made of insulating ink, and the thickness of the second insulating layer is 0.5um.
3. The concentrating photovoltaic cell substrate heat dissipation structure of claim 1, wherein the lower portion of the etching layer is coated with insulating ink.
4. The substrate heat dissipation structure of claim 1, wherein an anode is disposed under the chip, cathodes are disposed at two ends of the chip, the fifth etching block is electrically connected to the anode of the chip, and the etching layer is also electrically connected to the cathode of the chip.
5. The PV cell substrate heat dissipation structure of claim 4, further comprising a positive terminal base and a negative terminal base, wherein the etching layer comprises a first etching layer and a second etching layer, the first etching layer is in communication with the negative terminal base, and the second etching layer is in communication with the positive terminal base.
6. The concentrating photovoltaic cell substrate heat dissipation structure of claim 5, wherein the first etching layer comprises a second etching block and a third etching block, and both the second etching block and the third etching block are in conduction with the negative terminal base; the second etching layer includes a sixth etching block and a seventh etching block, and both the sixth etching block and the seventh etching block are in conduction with the positive terminal base.
7. The substrate heat dissipation structure of claim 6, wherein the negative electrode of the chip is electrically connected to the first etching layer through a plurality of pins.
8. The pv cell substrate heat dissipation structure of claim 7, further comprising a bypass diode connected in parallel to the positive terminal block and the negative terminal block through the etching layer.
9. The pv cell substrate heat dissipation structure of claim 8, wherein the first etching layer further comprises a first etching block, the second etching layer further comprises a fourth etching block, and both the first etching block and the fourth etching block are electrically connected to the bypass diode.
10. The pv cell substrate heat dissipation structure of claim 9, wherein a first insulating layer is disposed on the upper portion of the etching layer, and the first etching block, the second etching block, the third etching block, the fourth etching block, the fifth etching block, the sixth etching block, and the seventh etching block are disposed to protrude from the first insulating layer.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202222945681.1U CN218771997U (en) | 2022-11-04 | 2022-11-04 | Concentrating photovoltaic cell substrate heat radiation structure |
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| CN202222945681.1U CN218771997U (en) | 2022-11-04 | 2022-11-04 | Concentrating photovoltaic cell substrate heat radiation structure |
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| CN218771997U true CN218771997U (en) | 2023-03-28 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115580225A (en) * | 2022-11-04 | 2023-01-06 | 大庆华研环保应用技术研发中心有限公司 | A heat dissipation structure for a concentrated photovoltaic cell substrate |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115580225A (en) * | 2022-11-04 | 2023-01-06 | 大庆华研环保应用技术研发中心有限公司 | A heat dissipation structure for a concentrated photovoltaic cell substrate |
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