CN217847928U - Thin film chip packaging structure - Google Patents
Thin film chip packaging structure Download PDFInfo
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- CN217847928U CN217847928U CN202221472534.0U CN202221472534U CN217847928U CN 217847928 U CN217847928 U CN 217847928U CN 202221472534 U CN202221472534 U CN 202221472534U CN 217847928 U CN217847928 U CN 217847928U
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- heat dissipation
- long side
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Abstract
The utility model discloses a film chip packaging structure, it includes: a thin film substrate; the chip is arranged on the upper surface of the film substrate; and the heat dissipation paste comprises a first covering part and at least one second covering part connected with the first covering part, wherein the first covering part covers the chip, each second covering part covers the upper surface of the film substrate on one side of the chip, and each second covering part is provided with at least one hollow area.
Description
Technical Field
The utility model relates to a chip package field, in particular to film chip packaging structure.
Background
In the semiconductor field, COF (chip-on-film) is mainly applied to the driver IC package of the display.
In recent years, as the requirements of the market for screen resolution and refresh rate are gradually increased, the requirements for heat dissipation performance of the driver IC are also increasing. Currently, the mainstream COF driving IC product in the market is to attach a heat dissipation patch on the back surface of the film substrate, and there are also few manufacturers who attach a heat dissipation patch on the front surface of the chip on the film substrate, but there is still room for improvement in the heat dissipation effect.
In order to solve the above problems, a thin film chip package structure is needed in the art.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to disclose a film chip package structure, it can set up the fretwork district in order to ensure that this heat dissipation pastes and the air between this chip and film substrate is got rid of completely by the long limit department of neighbouring chip in the heat dissipation subsides to avoid this heat dissipation to paste and reduce the heat conduction effect because of the separation of bubble.
Another objective of the present invention is to disclose a film chip package structure, which can be disposed with the hollow area by the long edge of the adjacent chip in the heat dissipation sticker to ensure that the air between the heat dissipation sticker and the chip and the film substrate is completely eliminated, so as to avoid the heat dissipation sticker to be separated from the chip and the film substrate due to the thermal expansion of the bubble, thereby enhancing the package reliability of the product.
Another object of the present invention is to disclose a film chip package structure, which can enhance the heat dissipation effect by the solid area of the heat dissipation sticker with the dispersion, thereby reducing the material of the heat dissipation sticker to reduce the package cost.
In order to achieve the above object, the present invention provides a thin film chip package structure, which includes:
a thin film substrate;
the chip is arranged on the upper surface of the film substrate; and
the heat dissipation patch comprises a first covering part and at least one second covering part connected with the first covering part, wherein the first covering part covers the chip, each second covering part covers the upper surface of the film substrate on one side of the chip, and each second covering part is provided with at least one hollow area.
In one possible embodiment, the chip has a first length in the long side direction, and the first covering portion has a second length in the long side direction, and the second length is smaller than the first length.
In one possible embodiment, the chip has a first length in the long side direction, the first covering portion has a second length in the long side direction, and the second length is equal to the first length.
In one possible embodiment, the chip has a first length in the long side direction, the first covering portion has a second length in the long side direction, the second length is greater than the first length, and the first covering portion extends from both sides of the chip along the long side direction to expose both side surfaces of the chip.
In a possible implementation manner, the total length of any heat dissipation paster body of each second covering part in the long side direction is equal to the length of the first covering part in the long side direction.
In a possible implementation manner, the total length of any heat dissipation patch entity of each second covering part in the long side direction is smaller than the length of the first covering part in the long side direction.
In a possible implementation manner, each of the hollowed-out areas of each of the second covering portions is a closed hollowed-out area.
In a possible implementation manner, each of the hollow areas of each of the second covering portions is an open hollow area.
In one possible embodiment, the heat dissipation patch includes a heat dissipation layer and a protection layer, the heat dissipation layer is attached to the film substrate and the chip, and the protection layer covers the heat dissipation layer.
In one possible embodiment, the heat dissipation layer may include at least one material among aluminum, copper, and graphene.
In one possible embodiment, the thin film chip package structure further includes a backside heat spreader attached to the lower surface of the thin film substrate.
According to the utility model discloses a design, the utility model has the advantages of it is following:
1. the utility model discloses a film chip package structure can be by neighbouring chip long limit department sets up the fretwork district in the heat dissipation subsides in order to ensure that this heat dissipation pastes and the air between this chip and film substrate is got rid of completely to avoid this heat dissipation to paste because of the separation of bubble reduces the heat conduction effect.
2. The utility model discloses a film chip packaging structure can be by in the heat dissipation subsides adjacent chip long limit department set up the fretwork district in order to ensure that this heat dissipation pastes and this chip and the film substrate air within a definite time is got rid of completely to avoid this heat dissipation to paste and break away from with this chip and this film substrate because of the thermal energy of bubble, thereby strengthen the encapsulation reliability of product.
3. The utility model discloses a film chip packaging structure can be by set up the entity region that the fretwork district pasted with the dispersion heat dissipation in the heat dissipation subsides and strengthen the radiating effect to reduce the materials that the heat dissipation pasted and in order to reduce the encapsulation cost.
Drawings
Fig. 1 is an external view of a thin film chip package structure according to an embodiment of the present invention.
Fig. 2 is a top view of the thin film chip package structure of fig. 1.
FIG. 3 is a cross-sectional view of the thin film chip package structure of FIG. 1 along a section line V1-V1.
Fig. 4 is a top view of another embodiment of the thin film chip package structure of the present invention.
Fig. 5 and 6 are top views of two other embodiments of the thin film chip package structure of the present invention.
Fig. 7 to 10 are schematic top views illustrating four other embodiments of the thin film chip package structure of the present invention.
Fig. 11 to 14 are schematic top views illustrating four other embodiments of the thin film chip package structure according to the present invention.
Fig. 15 is an external view of another embodiment of the thin film chip package structure of the present invention.
FIG. 16 is a cross-sectional view of the thin film chip package structure of FIG. 15 along the sectional line V2-V2.
Description of the drawings: 10: a thin film substrate; 10a: an upper surface; 10b: a lower surface; 12: a circuit layer; 14: an ink layer; 20: a heat dissipation patch; 20a: a first covering section; 20b: a second covering portion; 20c: a back heat dissipation patch; 22: a heat dissipation layer; 24: a protective layer; 25: a hollowed-out portion; 30: chip and method for manufacturing the same
Detailed Description
Please refer to fig. 1, 2 and 3, wherein fig. 1 is an external schematic view of an embodiment of the thin film chip package structure of the present invention; FIG. 2 is a top view of the thin film chip package structure of FIG. 1; and FIG. 3 is a cross-sectional view of the thin film chip package structure of FIG. 1 along a sectional line V1-V1.
As shown in fig. 1, 2 and 3, the thin film chip package structure includes a thin film substrate 10, a heat sink 20 and a chip 30; the thin film substrate 10 has an upper surface 10a and a lower surface 10b; the chip 30 is disposed on the upper surface 10a and has a length B along the longitudinal direction; the heat dissipation patch 20 includes a first covering portion 20a and two second covering portions 20b, wherein the first covering portion 20a has a length a in the long side direction, each of the second covering portions 20b has a hollow portion 25, the hollow portions 25 have lengths A1 and A2 respectively at the solid portions of the heat dissipation patch 20 on the two sides of the long side direction, and preferably, the hollow portions 25 are relatively close to the chip 30 in the second covering portion 20 b. In the embodiment, the length a is smaller than the length B, and the sum of the lengths A1 and A2 is equal to the length a, so there is a protrusion above and below the hollow portion 25.
In addition, the film substrate 10 further includes a circuit layer 12 and an ink layer 14, and the circuit layer 12 exposes a portion of metal to be press-fit connected with the chip 30; the heat dissipation paste 20 may include a heat dissipation layer 22 and a protection layer 24, wherein the heat dissipation layer 22 may include at least one material selected from aluminum, copper, and graphene, and is attached to the chip 30 and the upper surface 10a of the film substrate 10, and the protection layer 24 completely covers the heat dissipation layer 22 and has a size larger than that of the heat dissipation layer 22.
In addition, in possible variants, said length a may be greater than or equal to length B. Fig. 4 is a top view of another embodiment of the thin film chip package structure of the present invention. As shown in fig. 4, the length a is greater than the length B, and the heat spreader 20 extends from the two short sides of the chip 30 in the long side direction to expose two side surfaces of the chip 30 connected to the two short sides.
In addition, in a possible variant, the heat dissipation patch 20 may also be provided without the projections. Please refer to fig. 5 and 6, which are top views of two other embodiments of the thin film chip package structure of the present invention. As shown in fig. 5, the heat dissipation patch 20 does not have the protrusion, and the length a is smaller than the length B; as shown in fig. 6, the heat dissipation patch 20 does not have the protrusion, and the length a is greater than the length B.
In addition, in a possible variation, the heat dissipation patch 20 may have a plurality of hollowed-out portions 25. Please refer to fig. 7 to 10, which are top views of four other embodiments of the thin film chip package structure of the present invention. As shown in fig. 7, two hollow portions 25 are respectively disposed on two sides of the long side of the chip 30 of the heat dissipation patch 20, the length a is smaller than the length B, the equivalent physical length of the heat dissipation patch 20 in the long side direction of the chip 30 is the sum of the three physical lengths A1, A2 and A3, and the equivalent physical length is equal to the length a; as shown in fig. 8, two hollow portions 25 are respectively disposed on two sides of the long side of the chip 30 of the heat dissipation patch 20, the length a is greater than the length B, the equivalent physical length of the heat dissipation patch 20 in the long side direction of the chip 30 is the sum of the three physical lengths A1, A2 and A3, and the equivalent physical length is equal to the length a; as shown in fig. 9, two pairs of hollow portions 25 are respectively disposed on two sides of the long side of the chip 30 of the heat dissipation patch 20, the length a is smaller than the length B, the equivalent physical length of the heat dissipation patch 20 in the long side direction of the chip 30 is the sum of the lengths A1, A2 and A3 of the three segments of physical lengths, and the equivalent physical length is equal to the length a; as shown in fig. 10, two pairs of hollow portions 25 are respectively disposed on two sides of the long side of the chip 30 of the heat dissipation patch 20, the length a is greater than the length B, the equivalent physical length of the heat dissipation patch 20 in the long side direction of the chip 30 is the sum of the three physical lengths A1, A2 and A3, and the equivalent physical length is equal to the length a.
In addition, although the hollow portions 25 are closed hollow areas in the above embodiments, the present invention is not limited thereto, and may be open hollow areas. Fig. 11 to 14 are top views of four other embodiments of the thin film chip package structure of the present invention. As shown in fig. 11, the heat dissipation paste 20 has an open hollow portion 25 on each of two sides of the long side of the chip 30, the hollow portions 25 have lengths A1 and A2 on the solid portions of the heat dissipation paste 20 on the two sides of the long side direction, the length a is smaller than the length B, and the sum of the lengths A1 and A2 is equal to the length a; as shown in fig. 12, the heat dissipation patch 20 has an open hollow portion 25 on each of two sides of the long side of the chip 30, the solid portions of the heat dissipation patch 20 on the two sides of the hollow portion 25 in the long side direction have lengths A1 and A2, respectively, the length a is greater than the length B, and the sum of the lengths A1 and A2 is equal to the length a; as shown in fig. 13, the heat dissipation paste 20 has two open hollow portions 25 on two sides of the long side of the chip 30, and the equivalent physical length of the heat dissipation paste 20 in the long side direction of the chip 30 is the sum of three physical lengths A1, A2 and A3, the equivalent physical length is equal to the length a, and the length a is smaller than the length B; as shown in fig. 14, the heat dissipation patch 20 has two open hollow portions 25 on two sides of the long side of the chip 30, and the equivalent physical length of the heat dissipation patch 20 in the long side direction of the chip 30 is the sum of three physical lengths A1, A2, and A3, where the equivalent physical length is equal to the length a, and the length a is greater than the length B.
In addition, the present invention can also be provided with a back heat dissipation patch on the lower surface 10b of the film substrate 10 to enhance the heat dissipation effect. Please refer to fig. 15 and 16, wherein fig. 15 is an external view of another embodiment of the thin film chip package structure of the present invention; FIG. 16 is a cross-sectional view of the thin film chip package structure of FIG. 15 along a section line V2-V2. As shown in fig. 15 and 16, the lower surface 10b of the film substrate 10 is provided with a back heat dissipation patch 20c, and the back heat dissipation patch 20c includes a heat dissipation layer 22 and a protection layer 24, wherein the heat dissipation layer 22, which may include at least one material selected from aluminum, copper, and graphene, is attached to the lower surface 10b of the film substrate 10, and the protection layer 24 completely covers the heat dissipation layer 22 and has a size larger than that of the heat dissipation layer 22.
Having described embodiments of the present disclosure, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or improvements to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (10)
1. A thin film chip package structure, comprising:
a thin film substrate;
the chip is arranged on the upper surface of the film substrate; and
the heat dissipation patch comprises a first covering part and at least one second covering part connected with the first covering part, wherein the first covering part covers the chip, each second covering part covers the upper surface of the film substrate on one side of the chip, and each second covering part is provided with at least one hollow area.
2. The structure of claim 1, wherein the chip has a first length in a long side direction, the first covering portion has a second length in the long side direction, and the second length is smaller than the first length.
3. The structure of claim 1, wherein the chip has a first length in a long side direction, the first covering portion has a second length in the long side direction, and the second length is equal to the first length.
4. The structure of claim 1, wherein the chip has a first length in a long side direction, the first covering portion has a second length in the long side direction, the second length is greater than the first length, and the first covering portion extends from two sides of the chip along the long side direction to expose two side surfaces of the chip.
5. The structure of any one of claims 2-4, wherein the total length of any heat dissipating entity of each second covering part in the long side direction is equal to the length of the first covering part in the long side direction.
6. The structure of any one of claims 2-4, wherein the total length of any heat dissipating entity of each second covering part in the longitudinal direction is smaller than the length of the first covering part in the longitudinal direction.
7. The structure of claim 1, wherein each of the hollowed-out regions of each of the second covering portions is a closed hollowed-out region.
8. The structure of claim 1, wherein each of the hollowed-out areas of each of the second covering parts is an open hollowed-out area.
9. The structure of claim 1, wherein the heat spreader includes a heat spreader layer and a protective layer, the heat spreader layer is attached to the film substrate and the chip, and the protective layer covers the heat spreader layer.
10. The structure of any one of claims 1-4, 7-9, comprising:
and the back heat dissipation paste is attached to the lower surface of the film substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221472534.0U CN217847928U (en) | 2022-06-14 | 2022-06-14 | Thin film chip packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221472534.0U CN217847928U (en) | 2022-06-14 | 2022-06-14 | Thin film chip packaging structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217847928U true CN217847928U (en) | 2022-11-18 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202221472534.0U Active CN217847928U (en) | 2022-06-14 | 2022-06-14 | Thin film chip packaging structure |
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| Country | Link |
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| CN (1) | CN217847928U (en) |
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- 2022-06-14 CN CN202221472534.0U patent/CN217847928U/en active Active
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