CN217766782U - LGA module process short circuit automatic test system - Google Patents

LGA module process short circuit automatic test system Download PDF

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CN217766782U
CN217766782U CN202221618327.1U CN202221618327U CN217766782U CN 217766782 U CN217766782 U CN 217766782U CN 202221618327 U CN202221618327 U CN 202221618327U CN 217766782 U CN217766782 U CN 217766782U
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module
lga
test
pin
power supply
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黄佐坚
周钊全
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Junsheng Technology Qinzhou Co ltd
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Abstract

The utility model discloses an LGA module process short circuit automatic test system, which comprises an LGA test module, a thimble clamp, an upper computer and a control panel; the control board comprises a main control module, a power supply circuit module, an LGA reset control circuit module and a slot position control module; the main control module is used for carrying out serial port communication with the upper computer and the LGA test module; the power supply circuit module is used for providing a direct current stabilized voltage power supply for the LGA test module; the power circuit module is used for providing direct-current voltage for the control panel; the LGA reset control circuit module is used for enabling the LGA test module to enter a reset state; the slot position control module is used for controlling the LGA test module in the corresponding slot position in the thimble clamp to enter a GPIO test mode. The utility model discloses set up the GPIO pin that LGA test module is adjacent according to input-output interval, detect the high low level of GPIO input port through the control panel, judge whether the adjacent pin of LGA test module short circuit, improved efficiency of software testing, reduced the test cost.

Description

一种LGA模块制程短路自动测试系统A kind of LGA module process short-circuit automatic test system

技术领域technical field

本实用新型涉及一种测试系统,特别涉及一种LGA模块制程短路自动测试系统。The utility model relates to a test system, in particular to an automatic short-circuit test system for an LGA module process.

背景技术Background technique

现在越来越多公司把单片机和少量外围电路设计集成在一块小的电路板上,做成一个LGA(Land Grid Array,栅格阵列封装,一种焊盘在元件底部的封装方式)封装模块,实现产品的核心功能。由于产品尺寸的限制,一般LGA封装模块的尺寸都要求尽量小,这就导致管脚焊盘间距很小,当生产模块贴在主板上过炉焊接后,相邻GPIO(General PurposeInput Output,通用输入/输出)管脚可能会造成短路。Now more and more companies integrate single-chip microcomputer and a small amount of peripheral circuit design on a small circuit board to make an LGA (Land Grid Array, grid array package, a package method in which the pad is at the bottom of the component) package module. Realize the core functions of the product. Due to the limitation of product size, the size of the general LGA package module is required to be as small as possible, which results in a very small spacing between the pin pads. /Output) pins may cause a short circuit.

由于LGA模块焊在主板上后,焊盘夹在两板中间,肉眼无法直接检查,原有检测方法是X光检测+产品功能测试。但X光检测速度慢、成本高、清晰度差、容易误判,产品功能测试不一定能覆盖所有的管脚,有些管脚短路只会导致功能不稳定,功能测试依然能通过;但X光检测设备昂贵;并且产品放入X光检测设备后,要经过移动扫描、选取检测位置、检查判断等步骤,检查速度慢,效率低;X光由于透过电路板,拍出来的图片并不会很清晰,上下元件和电路板走线也会影响X光图片,一般只能截出80%不良品,细如牛毛的拉锡短路,往往难以发现,清晰度差、容易误判。Since the LGA module is welded on the main board, the solder pad is sandwiched between the two boards, which cannot be directly inspected by naked eyes. The original inspection method is X-ray inspection + product function test. However, the X-ray detection speed is slow, the cost is high, the definition is poor, and it is easy to misjudge. The product function test may not cover all the pins. Some pin short circuits will only lead to unstable functions. The inspection equipment is expensive; and after the product is put into the X-ray inspection equipment, it has to go through steps such as moving scanning, selecting the inspection location, and checking and judging. Very clear, the upper and lower components and circuit board wiring will also affect the X-ray picture, generally only 80% of defective products can be intercepted, and the thin tin short circuit is often difficult to find, the clarity is poor, and it is easy to misjudge.

实用新型内容Utility model content

本实用新型的目的是克服现有技术缺陷,提供一种LGA模块制程短路自动测试系统,将LGA测试模块相邻的GPIO管脚按照输入-输出间隔设置,通过控制板检测GPIO输入口的高低电平,来判断LGA测试模块相邻引脚是否短路,提高了测试效率,降低了测试成本。The purpose of the utility model is to overcome the defects of the prior art and provide an automatic short-circuit test system for the LGA module process. The GPIO pins adjacent to the LGA test module are set according to the input-output interval, and the high and low voltage of the GPIO input port is detected by the control board. Ping, to judge whether the adjacent pins of the LGA test module are short-circuited, which improves the test efficiency and reduces the test cost.

本实用新型的目的是这样实现的:一种LGA模块制程短路自动测试系统,包括LGA测试模块、顶针夹具、上位机和控制板;所述控制板包括主控制模块、电源电路模块、供电电路模块、LGA复位控制电路模块和槽位控制模块;The purpose of this utility model is achieved like this: a kind of LGA module manufacturing process short-circuit automatic test system, comprises LGA test module, thimble fixture, upper computer and control panel; Described control panel comprises main control module, power supply circuit module, power supply circuit module , LGA reset control circuit module and slot control module;

所述主控制模块用于与上位机和 LGA测试模块进行串口通讯;并给LGA测试模块输出测试电压,并对LGA测试模块进行监控和槽位选择,辅助进入GPIO测试模式;Described main control module is used for carrying out serial port communication with upper computer and LGA test module; And output test voltage to LGA test module, and LGA test module is monitored and slot selection, assists to enter GPIO test mode;

所述供电电路模块用于为LGA测试模块提供直流稳压电源;The power supply circuit module is used to provide a DC stabilized power supply for the LGA test module;

所述电源电路模块用于为控制板提供直流电压;The power circuit module is used to provide DC voltage for the control board;

所述LGA复位控制电路模块用于使LGA测试模块进入复位状态;The LGA reset control circuit module is used to make the LGA test module enter the reset state;

所述槽位控制模块用于控制顶针夹具中对应槽位内的LGA测试模块进入GPIO测试模式。The slot control module is used to control the LGA test module in the corresponding slot in the thimble fixture to enter the GPIO test mode.

本实用新型工作时,将LGA测试模块放入顶针夹具中,上位机发送测试信号给控制板,控制板控制LGA测试模块进入GPIO测试模式,将相邻两个GPIO管脚一个设置为输入,并打开上拉电阻,另一个设置为输出,输出为低电平;当主控制模块检测到的输入口状态为低电平时,则两个GPIO管脚连锡或拉锡,也就是两个GPIO管脚出现短路;控制板通过检测LGA测试模块相邻引脚的高低电平,来判断相邻引脚是否短路,实现了LGA测试模块焊接短路的自动测试;当检测到不良LGA测试模块时,会在上位机上显示不良管脚。When the utility model is working, the LGA test module is put into the thimble fixture, the upper computer sends a test signal to the control board, and the control board controls the LGA test module to enter the GPIO test mode, and one of the two adjacent GPIO pins is set as an input, and Turn on the pull-up resistor, set the other as output, and the output is low level; when the state of the input port detected by the main control module is low level, then the two GPIO pins are connected or pulled, that is, two GPIO pins A short circuit occurs; the control board judges whether the adjacent pins are short-circuited by detecting the high and low levels of the adjacent pins of the LGA test module, and realizes the automatic test of the welding short circuit of the LGA test module; when a bad LGA test module is detected, it will Bad pins are displayed on the host computer.

本实用新型采用以上技术方案,与现有技术相比,有益效果为:通过控制板与上位机和LGA测试模块进行通信,控制板控制LGA测试模块进入GPIO测试模式,将LGA测试模块相邻的GPIO管脚按照输入-输出(输出-输入)间隔设置,通过控制板检测输入口的高低电平,实现了LGA测试模块焊接短路的自动测试;降低了测试成本,提高了测试效率,每片电路板耗时仅大约30秒;可靠性高,可100%有效拦截GPIO短路的不良品,操作方便。本实用新型涉及软件程序的内容其功能实现为现有技术,该方案实质上是对硬件部分的组成以及连接关系进行的改进,而并不涉及对软件程序本身进行的改进。The utility model adopts the above technical scheme, compared with the prior art, the beneficial effect is: the control board communicates with the upper computer and the LGA test module, the control board controls the LGA test module to enter the GPIO test mode, and the adjacent LGA test module GPIO pins are set according to the input-output (output-input) interval, and the high and low levels of the input port are detected through the control board, which realizes the automatic test of the welding short circuit of the LGA test module; reduces the test cost and improves the test efficiency. Each circuit The board takes only about 30 seconds; the reliability is high, and it can effectively intercept defective products with GPIO short circuit 100%, and the operation is convenient. The utility model relates to the content of the software program, and its function realization is the prior art. The solution is essentially an improvement on the composition and connection relationship of the hardware part, and does not involve the improvement on the software program itself.

进一步的,所述主控制模块与电源电路模块、供电电路模块、LGA复位控制电路模块和槽位控制模块电连接。Further, the main control module is electrically connected with the power circuit module, the power supply circuit module, the LGA reset control circuit module and the slot control module.

为了提高测试效率,所述顶针夹具包括多个测试槽位,所述LGA测试模块放置在测试槽位内,所述槽位控制模块通过夹具的顶针与对应槽位内的LGA测试模块电连接。In order to improve test efficiency, the thimble fixture includes a plurality of test slots, the LGA test module is placed in the test slot, and the slot control module is electrically connected to the LGA test module in the corresponding slot through the thimble of the fixture.

进一步的,所述控制板通过ISP串口与上位机进行串口通信。Further, the control board communicates with the upper computer via the ISP serial port.

进一步的,所述主控制模块采用STC12C5A60芯片。Further, the main control module adopts STC12C5A60 chip.

进一步的,所述供电电路模块采用LM317稳压芯片,为LGA测试模块提供3V稳压直流电源。Further, the power supply circuit module adopts LM317 voltage regulator chip to provide 3V regulated DC power supply for the LGA test module.

附图说明Description of drawings

图1本实用新型的系统框图。Fig. 1 system block diagram of the utility model.

图2本实用新型主控制模块的电路原理图。Fig. 2 is the schematic circuit diagram of the main control module of the utility model.

图3本实用新型供电电路模块的电路原理图。Fig. 3 is the schematic circuit diagram of the power supply circuit module of the utility model.

图4本实用新型电源电路模块的电路原理图。Fig. 4 is the schematic circuit diagram of the power supply circuit module of the utility model.

图5本实用新型LGA复位控制电路模块的电路原理图。Fig. 5 is a schematic circuit diagram of the LGA reset control circuit module of the utility model.

图6本实用新型槽位控制模块的电路原理图。Fig. 6 is a schematic circuit diagram of the slot control module of the utility model.

图7本实用新型LGA模块的焊盘底部引脚示意图。Fig. 7 is a schematic diagram of pins at the bottom of the pad of the LGA module of the present invention.

图8本实用新型LGA模块的电路原理图。Fig. 8 is a schematic circuit diagram of the utility model LGA module.

具体实施方式Detailed ways

如图1所示的一种LGA模块制程短路自动测试系统,包括LGA测试模块、顶针夹具、上位机和控制板;控制板通过ISP串口与上位机进行串口通信;控制板包括主控制模块、电源电路模块、供电电路模块、LGA复位控制电路模块和槽位控制模块;主控制模块与电源电路模块、供电电路模块、LGA复位控制电路模块和槽位控制模块电连接。As shown in Figure 1, an LGA module process short-circuit automatic test system includes an LGA test module, a thimble fixture, an upper computer and a control board; the control board communicates with the upper computer through the ISP serial port; the control board includes a main control module, a power supply The circuit module, the power supply circuit module, the LGA reset control circuit module and the slot control module; the main control module is electrically connected with the power circuit module, the power supply circuit module, the LGA reset control circuit module and the slot control module.

如图2所示,主控制模块用于与上位机和 LGA测试模块进行串口通讯;并给LGA测试模块输出测试电压,并对LGA测试模块进行监控和槽位选择,辅助进入GPIO测试模式;主控制模块采用STC12C5A60芯片;主控制模块的端口DUT_TX和端口DUT_RX与LGA测试模块的Pin17脚和Pin18脚连接,与LGA测试模块实现串口通信;ISP为控制板与上位机的串口通信,可以下载测试程序到主控制模块;测试过程中,用作控制板与上位机的通信;主控制模块的端口Current_voltage、端口Low_voltage和端口mA_Current_EN用于控制输出测试电压给LGA测试模块;端口DUT_Pin27用于监控LGA测试模块Pin27脚的上电状态,辅助进入GPIO测试模式;端口P20-P25用于LGA测试模块的槽位选择;端口P27用于复位脚测试,控制LGA测试模块进入复位状态。As shown in Figure 2, the main control module is used for serial communication with the host computer and the LGA test module; and outputs test voltage to the LGA test module, monitors and selects slots for the LGA test module, and assists in entering the GPIO test mode; The control module adopts STC12C5A60 chip; the ports DUT_TX and DUT_RX of the main control module are connected with Pin17 and Pin18 of the LGA test module, and realize serial communication with the LGA test module; ISP is the serial communication between the control board and the host computer, and the test program can be downloaded To the main control module; during the test, it is used as the communication between the control board and the host computer; the ports Current_voltage, port Low_voltage and port mA_Current_EN of the main control module are used to control the output test voltage to the LGA test module; the port DUT_Pin27 is used to monitor the LGA test module The power-on state of Pin27 assists in entering the GPIO test mode; ports P20-P25 are used for slot selection of the LGA test module; port P27 is used for the reset pin test and controls the LGA test module to enter the reset state.

如图3所示,供电电路模块用于为LGA测试模块提供直流稳压电源;供电电路模块采用LM317稳压芯片,为LGA测试模块提供3V稳压直流电源。As shown in Figure 3, the power supply circuit module is used to provide a DC regulated power supply for the LGA test module; the power supply circuit module uses an LM317 voltage regulator chip to provide a 3V regulated DC power supply for the LGA test module.

如图4所示,电源电路模块用于为控制板提供直流电压;12V直流适配器与电源插座“DC_12V”相连接;电路稳压出5V直流电供给控制板。As shown in Figure 4, the power circuit module is used to provide DC voltage for the control board; the 12V DC adapter is connected to the power socket "DC_12V"; the circuit stabilizes 5V DC to supply the control board.

如图5所示,LGA复位控制电路模块用于使LGA测试模块进入复位状态;当端口P27导通,LGA测试模块的复位脚与LGA测试模块的地线连接,使LGA测试模块进入复位状态。As shown in Figure 5, the LGA reset control circuit module is used to make the LGA test module enter the reset state; when the port P27 is turned on, the reset pin of the LGA test module is connected to the ground wire of the LGA test module, so that the LGA test module enters the reset state.

如图6所示,槽位控制模块用于控制顶针夹具中对应槽位内的LGA测试模块进入GPIO测试模式;顶针夹具包括多个测试槽位,LGA测试模块放置在测试槽位内,槽位控制模块通过夹具的顶针与对应槽位内的LGA测试模块电连接;As shown in Figure 6, the slot control module is used to control the LGA test module in the corresponding slot in the thimble fixture to enter the GPIO test mode; the thimble fixture includes multiple test slots, and the LGA test module is placed in the test slot. The control module is electrically connected to the LGA test module in the corresponding slot through the thimble of the fixture;

本实施例中顶针夹具包括6个测试槽位,最多能同时测试6个产品,每个槽位对应一个相应的槽位控制模块;夹具加入继电器控制,分时控制6个槽位的测试产品。In this embodiment, the thimble fixture includes 6 test slots, which can test up to 6 products at the same time, and each slot corresponds to a corresponding slot control module; the fixture is controlled by a relay to control the test products in 6 slots in time.

如图6所示,当测试槽位1,只需P20导通,吸合继电器K1/K2,控制槽位1的LGA进入GPIO测试程序;6Pin插座DUT1通过夹具的顶针,在槽位1与LGA待测试产品相连接;As shown in Figure 6, when testing slot 1, only P20 needs to be turned on, the relay K1/K2 is pulled in, and the LGA in slot 1 is controlled to enter the GPIO test program; The product under test is connected;

#1脚(DUT1_Pin32)与LGA测试模块的PIN32脚连接;#1 pin (DUT1_Pin32) is connected to the PIN32 pin of the LGA test module;

#2脚(DUT1_Pin30)与LGA测试模块的PIN30脚连接;#2 pin (DUT1_Pin30) is connected to the PIN30 pin of the LGA test module;

#3脚(DUT1_Reset)与LGA测试模块的PIN29脚连接;#3 pin (DUT1_Reset) is connected to the PIN29 pin of the LGA test module;

#4脚(DUT1_Pin27)与LGA测试模块的PIN27脚连接;#4 pin (DUT1_Pin27) is connected to the PIN27 pin of the LGA test module;

#5脚(DUT1_Pin17)与LGA测试模块的PIN17脚连接;#5 pin (DUT1_Pin17) is connected to the PIN17 pin of the LGA test module;

#6脚(DUT1_Pin18)与LGA测试模块的PIN18脚连接。#6 pin (DUT1_Pin18) is connected to the PIN18 pin of the LGA test module.

当测试槽位2,只需P21导通,吸合继电器K3/K4,控制槽位2的LGA进入GPIO测试程序;6Pin插座DUT2通过夹具的顶针,在槽位2与LGA待测试产品相连接;When testing slot 2, only P21 is turned on, the relay K3/K4 is pulled in, and the LGA in slot 2 is controlled to enter the GPIO test program; the 6Pin socket DUT2 is connected to the LGA product to be tested in slot 2 through the thimble of the fixture;

#1脚(DUT2_Pin32)与LGA测试模块的PIN32脚连接;#1 pin (DUT2_Pin32) is connected to the PIN32 pin of the LGA test module;

#2脚(DUT2_Pin30)与LGA测试模块的PIN30脚连接;#2 pin (DUT2_Pin30) is connected to the PIN30 pin of the LGA test module;

#3脚(DUT2_Reset)与LGA测试模块的PIN29脚连接;#3 pin (DUT2_Reset) is connected to the PIN29 pin of the LGA test module;

#4脚(DUT2_Pin27)与LGA测试模块的PIN27脚连接;#4 pin (DUT2_Pin27) is connected to the PIN27 pin of the LGA test module;

#5脚(DUT2_Pin17)与LGA测试模块的PIN17脚连接;#5 pin (DUT2_Pin17) is connected to the PIN17 pin of the LGA test module;

#6脚(DUT2_Pin18)与LGA测试模块的PIN18脚连接。#6 pin (DUT2_Pin18) is connected to the PIN18 pin of the LGA test module.

当测试槽位3,只需P22导通,吸合继电器K5/K6,控制槽位3的LGA进入GPIO测试程序;6Pin插座DUT3通过夹具的顶针,在槽位3与LGA待测试产品相连接;When testing slot 3, only P22 is turned on, the relay K5/K6 is pulled in, and the LGA in slot 3 is controlled to enter the GPIO test program; the 6Pin socket DUT3 is connected to the LGA product to be tested in slot 3 through the thimble of the fixture;

#1脚(DUT3_Pin32)与LGA测试模块的PIN32脚连接;#1 pin (DUT3_Pin32) is connected to the PIN32 pin of the LGA test module;

#2脚(DUT3_Pin30)与LGA测试模块的PIN30脚连接;#2 pin (DUT3_Pin30) is connected to the PIN30 pin of the LGA test module;

#3脚(DUT3_Reset)与LGA测试模块的PIN29脚连接;#3 pin (DUT3_Reset) is connected to the PIN29 pin of the LGA test module;

#4脚(DUT3_Pin27)与LGA测试模块的PIN27脚连接;#4 pin (DUT3_Pin27) is connected to the PIN27 pin of the LGA test module;

#5脚(DUT3_Pin17)与LGA测试模块的PIN17脚连接;#5 pin (DUT3_Pin17) is connected to the PIN17 pin of the LGA test module;

#6脚(DUT3_Pin18)与LGA测试模块的PIN18脚连接。#6 pin (DUT3_Pin18) is connected to the PIN18 pin of the LGA test module.

当测试槽位4,只需P23导通,吸合继电器K7/K8,控制槽位4的LGA进入GPIO测试程序;6Pin插座DUT4通过夹具的顶针,在槽位4与LGA待测试产品相连接;When testing slot 4, only P23 is turned on, the relay K7/K8 is pulled in, and the LGA in slot 4 is controlled to enter the GPIO test program; the 6Pin socket DUT4 is connected to the LGA product to be tested in slot 4 through the thimble of the fixture;

#1脚(DUT4_Pin32)与LGA测试模块的PIN32脚连接;#1 pin (DUT4_Pin32) is connected to the PIN32 pin of the LGA test module;

#2脚(DUT4_Pin30)与LGA测试模块的PIN30脚连接;#2 pin (DUT4_Pin30) is connected to the PIN30 pin of the LGA test module;

#3脚(DUT4_Reset)与LGA测试模块的PIN29脚连接;#3 pin (DUT4_Reset) is connected to the PIN29 pin of the LGA test module;

#4脚(DUT4_Pin27)与LGA测试模块的PIN27脚连接;#4 pin (DUT4_Pin27) is connected to the PIN27 pin of the LGA test module;

#5脚(DUT4_Pin17)与LGA测试模块的PIN17脚连接;#5 pin (DUT4_Pin17) is connected to the PIN17 pin of the LGA test module;

#6脚(DUT4_Pin18)与LGA测试模块的PIN18脚连接。#6 pin (DUT4_Pin18) is connected to the PIN18 pin of the LGA test module.

当测试槽位5,只需P24导通,吸合继电器K9/K10,控制槽位5的LGA进入GPIO测试程序;6Pin插座DUT5通过夹具的顶针,在槽位5与LGA待测试产品相连接;When testing slot 5, only P24 is turned on, the relay K9/K10 is pulled in, and the LGA in slot 5 is controlled to enter the GPIO test program; the 6Pin socket DUT5 is connected to the LGA product to be tested in slot 5 through the thimble of the fixture;

#1脚(DUT5_Pin32)与LGA测试模块的PIN32脚连接;#1 pin (DUT5_Pin32) is connected to the PIN32 pin of the LGA test module;

#2脚(DUT5_Pin30)与LGA测试模块的PIN30脚连接;#2 pin (DUT5_Pin30) is connected to the PIN30 pin of the LGA test module;

#3脚(DUT5_Reset)与LGA测试模块的PIN29脚连接;#3 pin (DUT5_Reset) is connected to the PIN29 pin of the LGA test module;

#4脚(DUT5_Pin27)与LGA测试模块的PIN27脚连接;#4 pin (DUT5_Pin27) is connected to the PIN27 pin of the LGA test module;

#5脚(DUT5_Pin17)与LGA测试模块的PIN17脚连接;#5 pin (DUT5_Pin17) is connected to the PIN17 pin of the LGA test module;

#6脚(DUT5_Pin18)与LGA测试模块的PIN18脚连接。#6 pin (DUT5_Pin18) is connected to the PIN18 pin of the LGA test module.

当测试槽位6,只需P25导通,吸合继电器K11/K12,控制槽位6的LGA进入GPIO测试程序;6Pin插座DUT6通过夹具的顶针,在槽位6与LGA待测试产品相连接;When testing slot 6, only P25 is turned on, the relay K11/K12 is pulled in, and the LGA in slot 6 is controlled to enter the GPIO test program; the 6Pin socket DUT6 is connected to the LGA product to be tested in slot 6 through the thimble of the fixture;

#1脚(DUT6_Pin32)与LGA测试模块的PIN32脚连接;#1 pin (DUT6_Pin32) is connected to the PIN32 pin of the LGA test module;

#2脚(DUT6_Pin30)与LGA测试模块的PIN30脚连接;#2 pin (DUT6_Pin30) is connected to the PIN30 pin of the LGA test module;

#3脚(DUT6_Reset)与LGA测试模块的PIN29脚连接;#3 pin (DUT6_Reset) is connected to the PIN29 pin of the LGA test module;

#4脚(DUT6_Pin27)与LGA测试模块的PIN27脚连接;#4 pin (DUT6_Pin27) is connected to the PIN27 pin of the LGA test module;

#5脚(DUT6_Pin17)与LGA测试模块的PIN17脚连接;#5 pin (DUT6_Pin17) is connected to the PIN17 pin of the LGA test module;

#6脚(DUT6_Pin18)与LGA测试模块的PIN18脚连接。#6 pin (DUT6_Pin18) is connected to the PIN18 pin of the LGA test module.

如图7-8所示,LGA测试模块封装后的尺寸比较小这就导致管脚焊盘间距很小,当生产模块贴在主板上过炉焊接后,相邻GPIO管脚可能会造成短路;需要对LGA测试模块进行测试。LGA测试模块内已经提前设置了GPIO测试模式。图中的LGA测试模块为UE878 NMDG-R芯片。As shown in Figure 7-8, the size of the LGA test module after packaging is relatively small, which leads to a small spacing between the pin pads. When the production module is pasted on the motherboard and soldered in the oven, adjacent GPIO pins may cause a short circuit; The LGA test module is required for testing. The GPIO test mode has been set in advance in the LGA test module. The LGA test module in the picture is UE878 NMDG-R chip.

本实用新型工作时,将需要检测的LGA测试模块放置在顶针夹具的槽位内,LGA测试模块上电后,LGA测试模块引脚PIN27为高电平;当主控制模块初始化完成后,PIN27保持低电平500毫秒,若在PIN27保持低电平的时间内接受到GPIO测试模式的命令,主控制模块(单片机)进入GPIO测试模式;PIN27恢复高电平后,进入用户功能模式。主控制模块通过PIN17和PIN18进行串口通信,串口给LGA测试模块发送命令,可以设置LGA测试模块的GPIO状态或读取模块的GPIO状态。When the utility model works, the LGA test module to be detected is placed in the slot of the thimble fixture. After the LGA test module is powered on, the pin PIN27 of the LGA test module is at a high level; when the initialization of the main control module is completed, the PIN27 remains low. The level is 500 milliseconds. If the command of GPIO test mode is received during the time when PIN27 remains low, the main control module (single chip microcomputer) enters GPIO test mode; after PIN27 returns to high level, it enters user function mode. The main control module communicates with the serial port through PIN17 and PIN18, and the serial port sends commands to the LGA test module, which can set the GPIO status of the LGA test module or read the GPIO status of the module.

上位机发送测试信号给控制板,通过主控制模块使LGA测试模块进入GPIO测试模式,将LGA测试模块的GPIO管脚先按输入-输出间隔设置,输入口打开上拉电阻,输出口输出低电平,当主控制模块检测到输入口状态不是高电平时,说明此口与相邻的输出口短路了;当主控制模块检测到输入口状态是高电平时,则继续将之前的GPIO管脚按输出-输入间隔设置,原本的输出口变为输入口,并打开上拉电阻,若主控制模板检测到该输入口不是高电平,则说明该口与相邻的输出口短路;当测试LGA测试模块的其余GPIO管脚与VDD脚是否短路时,则将其余GPIO管脚设置为输入口,并打开下拉电阻,若主控制模块检测到输入口不全为低电平时,则有GPIO管脚与VDD短路;当测试LGA测试模块的其余GPIO管脚与GND脚是否短路时,则将其余GPIO管脚设置为输入口,并打开上拉电阻,若主控制模块检测到输入口不全为高电平时,则存在GPIO管脚与GND短路;通过控制板自动检测GPIO的高低电平,实现了LGA测试模块焊接短路的自动测试;当检测到不良LGA测试模块时,会在上位机上显示不良管脚。The host computer sends a test signal to the control board, and the LGA test module enters the GPIO test mode through the main control module. The GPIO pins of the LGA test module are first set according to the input-output interval, the input port opens the pull-up resistor, and the output port outputs a low power Ping, when the main control module detects that the state of the input port is not high level, it means that this port is short-circuited with the adjacent output port; when the main control module detects that the state of the input port is high level, it will continue to press the previous GPIO pin to output - Input interval setting, the original output port becomes an input port, and the pull-up resistor is turned on. If the main control module detects that the input port is not high level, it means that the port is short-circuited with the adjacent output port; when testing LGA test If the other GPIO pins of the module are short-circuited with the VDD pin, set the remaining GPIO pins as input ports and turn on the pull-down resistor. If the main control module detects that the input ports are not all low, then the Short circuit; when testing whether the remaining GPIO pins of the LGA test module are short-circuited with the GND pin, set the remaining GPIO pins as input ports and turn on the pull-up resistors. If the main control module detects that the input ports are not all high, Then there is a short circuit between the GPIO pin and GND; the high and low levels of the GPIO are automatically detected by the control board, and the automatic test of the welding short circuit of the LGA test module is realized; when a bad LGA test module is detected, the bad pin will be displayed on the host computer.

本实用新型并不局限于上述实施例,在本实用新型公开的技术方案的基础上,本领域的技术人员根据所公开的技术内容,不需要创造性的劳动就可以对其中的一些技术特征作出一些替换和变形,这些替换和变形均在本实用新型的保护范围内。The utility model is not limited to the above-mentioned embodiments. On the basis of the technical solutions disclosed in the utility model, those skilled in the art can make some technical features based on the disclosed technical content without creative work. Replacement and deformation, these replacements and deformations are all within the protection scope of the present utility model.

Claims (6)

1.一种LGA模块制程短路自动测试系统,其特征在于,包括LGA测试模块、顶针夹具、上位机和控制板;所述控制板包括主控制模块、电源电路模块、供电电路模块、LGA复位控制电路模块和槽位控制模块;1. A kind of LGA module manufacturing process short-circuit automatic test system, it is characterized in that, comprises LGA test module, thimble fixture, upper computer and control panel; Described control panel comprises main control module, power supply circuit module, power supply circuit module, LGA reset control Circuit modules and slot control modules; 所述主控制模块用于与上位机和 LGA测试模块进行串口通讯;并给LGA测试模块输出测试电压,并对LGA测试模块进行监控和槽位选择,辅助进入GPIO测试模式;Described main control module is used for carrying out serial port communication with upper computer and LGA test module; And output test voltage to LGA test module, and LGA test module is monitored and slot selection, assists to enter GPIO test mode; 所述供电电路模块用于为LGA测试模块提供直流稳压电源;The power supply circuit module is used to provide a DC stabilized power supply for the LGA test module; 所述电源电路模块用于为控制板提供直流电压;The power circuit module is used to provide DC voltage for the control board; 所述LGA复位控制电路模块用于使LGA测试模块进入复位状态;The LGA reset control circuit module is used to make the LGA test module enter a reset state; 所述槽位控制模块用于控制顶针夹具中对应槽位内的LGA测试模块进入GPIO测试模式。The slot control module is used to control the LGA test module in the corresponding slot in the thimble fixture to enter the GPIO test mode. 2.根据权利要求1所述的一种LGA模块制程短路自动测试系统,其特征在于,所述主控制模块与电源电路模块、供电电路模块、LGA复位控制电路模块和槽位控制模块电连接。2. A kind of LGA module manufacturing process short circuit automatic test system according to claim 1, is characterized in that, described main control module is electrically connected with power supply circuit module, power supply circuit module, LGA reset control circuit module and slot position control module. 3.根据权利要求1所述的一种LGA模块制程短路自动测试系统,其特征在于,所述顶针夹具包括多个测试槽位,所述LGA测试模块放置在测试槽位内,所述槽位控制模块通过夹具的顶针与对应槽位内的LGA测试模块电连接。3. A kind of LGA module manufacturing process short-circuit automatic test system according to claim 1, is characterized in that, described thimble fixture comprises a plurality of test slot positions, and described LGA test module is placed in the test slot position, and described slot position The control module is electrically connected to the LGA test module in the corresponding slot through the thimble of the fixture. 4.根据权利要求1所述的一种LGA模块制程短路自动测试系统,其特征在于,所述控制板通过ISP串口与上位机进行串口通信。4. A kind of LGA module manufacturing process short circuit automatic test system according to claim 1, is characterized in that, described control board carries out serial port communication with upper computer through ISP serial port. 5.根据权利要求1所述的一种LGA模块制程短路自动测试系统,其特征在于,所述主控制模块采用STC12C5A60芯片。5. A kind of LGA module process short circuit automatic test system according to claim 1, is characterized in that, described main control module adopts STC12C5A60 chip. 6.根据权利要求1所述的一种LGA模块制程短路自动测试系统,其特征在于,所述供电电路模块采用LM317稳压芯片,为LGA测试模块提供3V稳压直流电源。6. A kind of LGA module manufacturing process short circuit automatic test system according to claim 1, is characterized in that, described power supply circuit module adopts LM317 regulator chip, provides 3V regulated DC power supply for LGA test module.
CN202221618327.1U 2022-06-27 2022-06-27 LGA module process short circuit automatic test system Expired - Fee Related CN217766782U (en)

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