CN215867065U

CN215867065U - Device for testing various connecting wires

Info

Publication number: CN215867065U
Application number: CN202122089872.8U
Authority: CN
Inventors: 万同山; 徐传斌; 姜蓝
Original assignee: Shenzhen Xilin Electrical Technology Co ltd
Current assignee: Shenzhen Xilin Electrical Technology Co ltd
Priority date: 2021-08-31
Filing date: 2021-08-31
Publication date: 2022-02-18
Anticipated expiration: 2031-08-31

Abstract

The utility model discloses a device for testing various connecting wires, which comprises: the device body, the device body includes a plurality of test circuit units and reset switch unit, the test circuit unit includes: first NAND gate circuit, second NAND gate circuit, first LED, second LED, first resistance, second resistance, third resistance, fourth resistance, first binding post, second binding post, first binding post are used for connecting the both ends of the connecting wire of awaiting measuring respectively, the reset switch unit includes: a fifth resistor and a reset switch. The utility model can realize the latching of the fault state, so that the condition of line disconnection and recovery in the test process can be found, and the requirement of dynamic test can be met.

Description

Device for testing various connecting wires

Technical Field

The utility model relates to the technical field of testing devices, in particular to a device for testing various connecting wires.

Background

Almost all electrical devices have some associated connection lines, which are used for power or signal transmission, and the stability and reliability of the connection are very important. Although the connecting lines are required to be tested under common conditions, whether the connecting lines can be normally connected all the time under some harsh conditions such as vibration and severe environment in the application process is an important problem, at present, a lot of devices for testing the connecting lines are provided, but most of the devices are static tests, the connecting lines are separated from the practical application condition, and the convenience is lacked if the connecting lines are directly installed in a machine for testing, for example, the reliability of the inner flat cable under the vibration condition needs to be verified by our large-scale frequency converter, even if the convenience is ignored, if the connecting lines are disconnected and then recovered, the connecting lines are difficult to discover through the test, the existing testing device cannot meet the requirement of the dynamic test, and the situation that the connecting lines are disconnected and recovered is difficult to recognize in the test is difficult to discover.

Accordingly, the prior art is deficient and needs improvement.

SUMMERY OF THE UTILITY MODEL

The utility model aims to overcome the defects of the prior art and provide a device for testing various connecting wires, which can realize dynamic test on the connection reliability of the connecting wires and matching terminals.

The technical scheme of the utility model is as follows: the utility model provides a device for testing various connecting wires, which comprises: the device body, the device body includes a plurality of test circuit units and reset switch unit, the test circuit unit includes: the LED circuit comprises a first NAND gate circuit, a second NAND gate circuit, a first LED, a second LED, a first resistor, a second resistor, a third resistor, a fourth resistor, a first connecting terminal and a second connecting terminal, wherein the first connecting terminal and the second connecting terminal are respectively used for connecting two ends of a connecting line to be tested, one end of the first resistor is electrically connected with a VCC end, the other end of the first resistor is electrically connected with the first connecting terminal, the second connecting terminal is electrically connected with one end of the second resistor and a first input end of the first NAND gate circuit, the other end of the second resistor is grounded, a second input end of the first NAND gate circuit is electrically connected with an output end of the second NAND gate circuit and one end of the fourth resistor, a first input end of the second NAND gate circuit is electrically connected with an output end of the first NAND gate circuit and one end of the third resistor, the other end of third resistance with first LED's positive pole electric connection, the other end of fourth resistance with second LED's positive pole electric connection, first LED's negative pole and second LED's negative pole all ground connection, the reset switch unit includes: fifth resistance and reset switch, reset switch is normally open switch, the one end of fifth resistance with VCC end electric connection, the other end of fifth resistance respectively with reset switch's one end, test circuit unit's second and the second input electric connection of gate circuit, reset switch's other end ground connection.

Further, one reset switch unit is arranged corresponding to one test circuit unit.

Or, one reset switch unit is arranged corresponding to at least 2 test circuit units.

Preferably, the number of the reset switches in the device body is 1, and one reset switch is provided corresponding to all the test circuit units in the device body.

Further, the first nand gate circuit and the second nand gate circuit are integrated on one logic chip.

Further, the model number of the logic chip is 74HC 00.

Further, the device body also comprises a power supply circuit, and the power supply circuit is used for supplying power to the device body.

Further, the power supply circuit comprises a voltage stabilizing chip, a first capacitor, a second capacitor and a third capacitor, wherein the input end of the voltage stabilizing chip is electrically connected with the anode of the external power supply and the anode of the third capacitor respectively, the output end of the voltage stabilizing chip is electrically connected with one end of the first capacitor, the anode of the second capacitor and the VCC end respectively, and the grounding end of the voltage stabilizing chip, the other end of the first capacitor, the cathode of the second capacitor and the cathode of the third capacitor are all grounded.

Further, the model of the voltage stabilization chip is 7805.

By adopting the scheme, the utility model has the beneficial effects that: the device body can be integrated on a PCB, common connecting terminals are arranged on the PCB according to the condition of connecting lines to be tested, connection tests of various connecting lines are achieved, the device body and the connecting lines to be tested are placed in corresponding test environments to conduct dynamic tests during testing, the testing device can achieve latching fault states, the condition that lines are disconnected and recovered in the testing process can be found, and the requirement of dynamic testing can be met.

Drawings

Fig. 1 is a block diagram of structural connections according to an embodiment of the present invention.

Fig. 2 is a circuit diagram of a test circuit unit and a reset switch unit according to an embodiment of the present invention.

Fig. 3 is a circuit diagram of a power circuit according to an embodiment of the utility model.

Detailed Description

The utility model is described in detail below with reference to the figures and the specific embodiments.

Referring to fig. 1 to fig. 3, in this embodiment, the present invention provides an apparatus for testing various connection wires, including: the device body, the device body includes a plurality of test circuit units and reset switch, the test circuit unit includes: the circuit comprises a first nand gate IC16C, a second nand gate IC16D, a first LED, a second LED, a first resistor R93, a second resistor R95, a third resistor R94, a fourth resistor R95, a first connecting terminal and a second connecting terminal, wherein the first connecting terminal and the second connecting terminal are respectively used for connecting two ends of a connecting line to be tested, one end of a first resistor R93 is electrically connected with a VCC end, the other end of the first resistor R93 is electrically connected with the first connecting terminal, the second connecting terminal is respectively electrically connected with one end of the second resistor R95, a first input end of a first nand gate IC16C, the other end of the second resistor R95 is grounded, a second input end of the first nand gate IC16C is electrically connected with an output end of the second nand gate IC16D and one end of a fourth resistor R95, a first input end of the second nand gate IC16D is electrically connected with an output end of the first nand gate IC16C, One end of a third resistor R94 is electrically connected, the other end of the third resistor R94 is electrically connected to the anode of the first LED, the other end of the fourth resistor R95 is electrically connected to the anode of the second LED, the cathode of the first LED and the cathode of the second LED are both grounded, and the reset switch comprises: fifth resistance R97 and reset switch S1, reset switch S1 is normally open switch, fifth resistance R97 one end with VCC end electric connection, fifth resistance R97 ' S the other end respectively with reset switch S1 ' S one end, test circuit unit ' S second NAND gate circuit IC16D ' S second input electric connection, reset switch S1 ' S the other end ground connection.

In the device body of the scheme, one reset switch can be arranged corresponding to one test circuit unit; or, one reset switch is arranged corresponding to at least 2 test circuit units; or some reset switches S1 are arranged corresponding to one test circuit unit, and some reset switches S1 are arranged corresponding to at least 2 test circuit units; alternatively, the number of the reset switches S1 in the apparatus body is 1, and one reset switch S1 is provided for all the test circuit units in the apparatus body.

Further, in this embodiment, the first nand gate IC16C and the second nand gate IC16D are integrated on a logic chip IC16, and the model of the logic chip IC16 is 74HC 00.

Further, the device body also comprises a power supply circuit, and the power supply circuit is used for supplying power to the device body. The power circuit comprises a voltage stabilizing chip, a first capacitor C1, a second capacitor E1 and a third capacitor E2, wherein the model of the voltage stabilizing chip is 7805, the input end of the voltage stabilizing chip is electrically connected with the anode of an external power supply and the anode of the third capacitor E2 respectively, the output end of the voltage stabilizing chip is electrically connected with one end of the first capacitor C1, the anode of the second capacitor E1 and the VCC end respectively, the grounding end of the voltage stabilizing chip, the other end of the first capacitor C1, the cathode of the second capacitor E1 and the cathode of the third capacitor E2 are all grounded, and in the scheme, the power circuit can be electrically connected with an external power supply through an interface CON 2. The input voltage of the power supply circuit is 5V-30V, and a common No. 5 battery, a No. 7 battery and the like can be used as a power supply.

Referring to fig. 1 to fig. 3, a set of test units and reset switches are taken as an example to illustrate the operation of the present embodiment: in the scheme, when a test circuit works, two ends to be tested are respectively connected to the first connecting terminal and the second connecting terminal, the reset key is pressed to reset the test circuit, in the logic chip IC16, the 10 th pin is at low level, the 8 th pin is at high level, the second LED emits light, the 13 th pin of the logic chip IC16 is also at high level as being connected with the 8 th pin, if the connection of a connecting wire is normal, the circuit is conducted, the 12 th pin of the logic chip IC16 is at high level, the 11 th pin is at low level, the first LED is not bright, the 9 th pin of the logic chip IC16 is also at low level, when the test wire is dynamically tested, if the test wire is disconnected with the connecting terminal, the 12 th pin of the logic chip IC16 is at low level, the 11 th pin is at high level, the first LED is turned on, the 9 th pin of the logic chip IC16 is also changed to a high level, since the 10 th pin of the logic chip IC16 is at a high level at this time, the 8 th pin of the logic chip IC16 is at a low level, the second LED is turned off, when the connection line is changed to a normal connection again, the 12 th pin of the logic chip IC16 is at a high level at this time, but the 13 th pin thereof is always at a low level, therefore, the 8 th pin and the 11 th pin of the logic chip IC16 are not affected by the state of the connection line at this time, the effect of latching a fault state can be achieved, the requirement of dynamic testing can be met, the condition that the line is disconnected and connected during testing can be found, only when the reset switch S1 is pressed again, the 10 th pin thereof can be changed to a low level, the 8 th pin thereof is changed to a high level, so that two LEDs are reset, the reset effect is realized. In the scheme, the first resistor R93, the third resistor R94, the fourth resistor R95 and the fifth resistor R97 are current-limiting resistors, the second resistor R95 is a pull-down resistor, and the VCC end is a 5V power supply signal output by the power supply circuit. In this embodiment, the working principle of the other groups of test circuit units is the same as that described above, and is not described herein again.

The device body can be integrated on the PCB, the connecting terminals which are commonly used are arranged on the PCB according to the condition of the connecting wires to be tested, connection tests of various connecting wires are achieved, the device body and the connecting wires to be tested are placed in corresponding test environments to conduct dynamic tests during testing, the testing device can achieve latching fault states, the condition that the circuits are disconnected and recovered in the testing process can be found, and the requirement of dynamic testing can be met.

The present invention is not limited to the above preferred embodiments, and any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. An apparatus for testing various connection lines, comprising: the device body, the device body includes a plurality of test circuit units and reset switch unit, the test circuit unit includes: the LED circuit comprises a first NAND gate circuit, a second NAND gate circuit, a first LED, a second LED, a first resistor, a second resistor, a third resistor, a fourth resistor, a first connecting terminal and a second connecting terminal, wherein the first connecting terminal and the second connecting terminal are respectively used for connecting two ends of a connecting line to be tested, one end of the first resistor is electrically connected with a VCC end, the other end of the first resistor is electrically connected with the first connecting terminal, the second connecting terminal is electrically connected with one end of the second resistor and a first input end of the first NAND gate circuit, the other end of the second resistor is grounded, a second input end of the first NAND gate circuit is electrically connected with an output end of the second NAND gate circuit and one end of the fourth resistor, a first input end of the second NAND gate circuit is electrically connected with an output end of the first NAND gate circuit and one end of the third resistor, the other end of third resistance with first LED's positive pole electric connection, the other end of fourth resistance with second LED's positive pole electric connection, first LED's negative pole and second LED's negative pole all ground connection, the reset switch unit includes: fifth resistance and reset switch, reset switch is normally open switch, the one end of fifth resistance with VCC end electric connection, the other end of fifth resistance respectively with reset switch's one end, test circuit unit's second and the second input electric connection of gate circuit, reset switch's other end ground connection.

2. The apparatus for testing various connection lines according to claim 1, wherein one reset switch unit is provided corresponding to one test circuit unit.

3. The apparatus for testing various connection lines according to claim 1, wherein one reset switch unit is provided for at least 2 test circuit units.

4. The apparatus for testing various connection lines according to claim 3, wherein the number of the reset switches in the apparatus body is 1, and one reset switch is provided for all the test circuit units in the apparatus body.

5. The apparatus for testing various connections of claim 1, wherein the first nand gate and the second nand gate are integrated on a single logic chip.

6. The apparatus for testing various connections of claim 5, wherein said logic chip is model 74HC 00.

7. The device for testing various connecting wires according to any one of claims 1 to 6, wherein the device body further comprises a power supply circuit for supplying power to the device body.

8. The apparatus according to claim 7, wherein the power circuit comprises a voltage regulator chip, a first capacitor, a second capacitor, and a third capacitor, an input terminal of the voltage regulator chip is electrically connected to an anode of an external power source and an anode of the third capacitor, an output terminal of the voltage regulator chip is electrically connected to one end of the first capacitor, an anode of the second capacitor, and a VCC terminal, respectively, and a ground terminal of the voltage regulator chip, the other end of the first capacitor, a cathode of the second capacitor, and a cathode of the third capacitor are all grounded.

9. The apparatus for testing various connecting wires according to claim 8, wherein the model of the voltage stabilization chip is 7805.