CN213844722U - Two-wire cascade application system for simultaneously transmitting data by power supply - Google Patents
Two-wire cascade application system for simultaneously transmitting data by power supply Download PDFInfo
- Publication number
- CN213844722U CN213844722U CN202022649007.XU CN202022649007U CN213844722U CN 213844722 U CN213844722 U CN 213844722U CN 202022649007 U CN202022649007 U CN 202022649007U CN 213844722 U CN213844722 U CN 213844722U
- Authority
- CN
- China
- Prior art keywords
- module
- data
- chip
- cascade
- application system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Control Of El Displays (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The utility model discloses a two line cascade application system of mains operated simultaneous transmission DATA, including controller, cascade chip, LED lamp, the controller is connected and is cascaded the chip, cascades the chip and is connected with the LED lamp, be equipped with voltage clamp module, power supply module, DATA storage module, PWM constant current output drive circuit, R end, G end, B end, W end, VCC/DATA end and GND/DATA end in cascading the chip to and the DATA sampling calibration module, power cord sampling transmission DATA module, the instruction that connect gradually set up chip initial state module, judge whether E-fuse address and chip initial address are the same module, E-fuse module. The utility model discloses to cascading the application, guaranteed to cascade the accuracy of using, saved manufacturing cost, simplified production flow, realized the automation of production, optimized display effect etc..
Description
Technical Field
The utility model relates to a cascade application system especially relates to a two line cascade application system of power supply simultaneous transmission data.
Background
The LED display cascade application system comprises a controller, a cascade chip and the like, wherein the controller sends data, and the cascade chip receives data for display and forwards the data. The existing LED display cascade application system is divided into an LED display series application system and an LED display parallel application system.
The LED display serial application system only needs one controller to generate sending data, and the serial chip receives data display and forwards the data. The LED display serial application system has the advantage of low cost (a single chip address unit and a signal amplifier which can be set at any time are not needed) in the common display application effect; the LED display serial application system has the cost advantage, and when one chip in the serial application system is damaged, subsequent display application errors and the like can be caused, the display effect of the whole LED display serial application system is influenced, and the subsequent display effect is wrong or the maintenance and replacement cost is increased; at present, a cascade chip in an LED display series application system is improved to be a breakpoint continuous transmission chip (one of the channels is used for transmitting data, and more than one channel of communication ports is used for standby), the probability of display errors of the LED display series application system caused by a plurality of dead points in the application process can be reduced (as long as the LED display series application system does not display errors by the plurality of dead points continuously), but the display errors are not completely avoided, so that the LED display parallel application system is considered in a system with high reliability application requirements.
In the LED display parallel application system, the controller generates sending data to be connected with input channels of all parallel chips, and the data of the chip are respectively obtained from parallel data lines and displayed through different chip addresses of the parallel chips. The LED display parallel application system has higher reliability, and the damage of a certain parallel chip in the LED display parallel application system can not influence the data sampling and display of other parallel chips in the LED display parallel application system; meanwhile, the LED display parallel application system is high in cost, not only can a chip address unit (an EEPROM chip is used and packaged together with the parallel chip) which can be set at any time be required, but also IIC protocol communication is used between the EEPROM chip and the parallel chip, and when a system power supply is unstable (the system is electrified or is electrified again after the system is powered down in error, and the like), IIC communication protocol error between the EEPROM chip and the parallel chip can be caused, the address is wrongly written, abnormal display is caused, and the like; in the existing LED display parallel application system, a standard DMX512 communication protocol is used, display data are retransmitted from an address 0, and if the LED display parallel application system has 200 cascade chips, the display color of only the last 100 cascade chips changes next time, the display data are still 200 chip data, the first 100 chip data are invalid data, and the refresh rate of the display data is reduced; due to attenuation of transmission signals and the like, a signal amplifier and the like are required to be added in the LED display parallel application system to amplify the transmission signals, so that correct sampling data and correct display of the LED display parallel application system are guaranteed.
Therefore, in order to take cost and performance into consideration, the existing LED display cascade application system considers two-wire cascade application of power supply and data transmission at the same time, only two wires of VDD and GND are used for connecting the cascade application system, the cascade application system is simplified, and cost is saved.
Therefore, it is an urgent need to solve the problem of the art to develop a two-wire cascade application system for transmitting data while supplying power.
SUMMERY OF THE UTILITY MODEL
The utility model relates to a solve current two line and cascade the lower and demonstration refresh rate not high of application system reliability, provide a two line of mains operated simultaneous transmission data and cascade the application system.
The above object of the present invention is achieved by the following technical solutions: the utility model provides a two line cascade application system of power supply simultaneous transmission data, includes controller, cascade chip, LED lamp, the controller is connected and is cascaded the chip, cascades the chip and is connected with the LED lamp, its characterized in that: the cascade chip is internally provided with a voltage clamping module (the voltage clamping module realizes stable and accurate power supply and DATA transmission when in cascade application), a power supply module, a DATA storage module, a PWM constant-current output driving circuit, an R end, a G end, a B end, a W end, a VCC/DATA end and a GND/DATA end, and a DATA sampling calibration module, a power line sampling DATA transmission module, an instruction setting chip initial state module, a module for judging whether an E-fuse address is the same as a chip initial address or not, and an E-fuse module (the address of a storage chip, the E-fuse is burnt out at any time in the production application process to determine different chip addresses, thereby facilitating the production application);
the VCC/DATA end is respectively connected to the voltage clamping module, the DATA sampling calibration module and the power line sampling transmission DATA module; the output end of the voltage clamping module is respectively connected to the GND/DATA end and the power supply module; the output end of the power supply module is respectively connected with the data sampling calibration module, the power line sampling data transmission module, the instruction setting chip initial state module, the module for judging whether the E-fuse address is the same as the chip initial address, the E-fuse module, the data storage module and the PWM constant current output drive circuit for supplying power; the output end of the power line sampling and data transmission module is respectively connected to the instruction setting chip initial state module and the data storage module; the module for judging whether the E-fuse address is the same as the chip initial address or not is connected to the data storage module; the constant current output driving circuit is connected to the R end, the G end, the B end and the W end;
and the cascade chip is also provided with an oscillating circuit and a reset circuit, and the oscillating circuit and the reset circuit are connected between the power supply module and the power line sampling and data transmitting module.
Furthermore, the controller is provided with VDD and GND ports, and VDD and GND ends of the controller are respectively connected to VDD and GND ends of all the cascade chips; the LED lamp is connected with the R end, the G end, the B end and the W end of the cascade chip.
The utility model discloses a two line cascade application system's of mains operated simultaneous transfer data implementation method, including following step:
step 1: through the voltage clamping module, stable and accurate power supply and data transmission are realized during cascade application;
step 2: the data is transmitted to a data sampling calibration module, the judgment standard of the transmitted data is changed in real time through the data sampling calibration module, and the transmitted data is accurately sampled; after data sampling calibration, a power line sampling transmission data module samples transmission data;
and step 3: if the transmitted data is judged to be an address code writing instruction, writing the address of the E-fuse module of the chip, and setting the address of the chip, otherwise, re-sampling and judging the transmitted data;
and 4, step 4: judging whether the transmission data is instruction data for setting a chip initial address, setting the chip initial address, adding one to the chip initial address after receiving a group of display instruction data, and otherwise, re-sampling and judging the transmission data;
and 5: and judging whether the transmitted data is display instruction data, judging whether the E-fuse address is the same as the initial address of the chip, if so, sampling and storing the display data of the corresponding address and displaying the PWM constant current output, and otherwise, ignoring the display data.
Compared with the prior art, the utility model the advantage be:
for cascade application, the utility model transmits data on the power supply, realizes two-line cascade application (power line and ground line), and saves production cost; the data sampling calibration module changes the judgment standard of the transmission data in real time, accurately samples the transmission data, ensures the correctness of the transmission data and ensures the accuracy of two-wire cascade application; the E-fuse module can be blown at any time to determine the chip address, so that the production flow is simplified, and the production automation is realized; the initial address of the chip is set, so that invalid data is reduced, the refresh rate of the two-wire cascade application is improved, and the display effect is optimized. In a word, the utility model discloses to cascade application, guaranteed cascade application's accuracy, saved manufacturing cost, simplified production flow, realized the automation of production, optimized display effect etc..
Drawings
Fig. 1 is a schematic diagram of a two-wire cascade application system.
Fig. 2 is a schematic block diagram of an internal circuit of a two-wire cascade chip commonly used in the market.
Fig. 3 is a schematic block diagram of an internal circuit of the two-wire cascade chip according to the present invention.
Fig. 4 is a schematic diagram of the implementation steps of the present invention.
Detailed Description
The present invention will be described in detail with reference to the accompanying drawings.
Fig. 1 is a schematic diagram of a two-wire cascade application system.
Fig. 2 is a schematic block diagram of an internal circuit of a two-wire cascade chip commonly used in the market, in which the cascade chip directly samples and transmits data from a power line. When the two-wire cascade application system is long, that is, the two-wire cascade application system connects a plurality of cascade chips in series and parallel, due to the influence of parasitic resistance and capacitance, data transmitted on the power line is abnormal (the width of the high level is lengthened or shortened), an address is wrongly written, and display abnormality is caused. Meanwhile, in a general two-wire cascade application system in the market, transmitted data comprises addresses and displays, one cascade chip has more data, and the number of the cascade chips of the two-wire cascade application system is reduced under the condition of the same refresh rate. The address of the chip is determined by burning out of the Trimming module during crystal original time, and the addressing work of the cascade chip is completed by adopting the addressing program matched with setting such as video camera identification or photosensitive triode identification in the production process of the two-wire cascade application system, so that the production cost is high and the production flow is complex.
Fig. 3 is the utility model discloses a two line cascade chip's internal circuit schematic block diagram, use E-fuse module address to replace Trimming module this moment, increase data sampling calibration module, increase the instruction and set up chip initial address module, judge whether E-fuse address and chip initial address are the same module etc.. When two line cascade application system are longer, two line cascade application system connect in series and connect more cascade chip promptly, because influence such as parasitic resistance electric capacity leads to the data of transmission on the power cord unusual (the width of high level is elongated or is shortened), the utility model discloses a two line cascade chip passes through data sampling calibration module, still can correctly sample transmission data, guarantees that the function is correct etc.. The utility model discloses a two lines cascade chip has increased the instruction and has set up chip initial state module, and transmission data can the instruction set address, then the address order adds one, has reduced the transmission data figure of every chip, has increased two lines and has cascaded application system's cascade chip number under the condition of same refresh rate. The E-fuse module can blow to determine the address of the chip at any time of the cascade chip (for example, the E-fuse module can also blow to determine the address of the chip in the production process), so the two-wire cascade application system can blow to determine the address of the chip according to the requirement in the production process, the two-wire cascade application system is produced according to the sequence defined by the controller, the data transmitted by the receiving controller is displayed correctly and controlled, and the like, the production cost is low, and the production flow is simple.
Combine fig. 2, fig. 3, fig. 4 to show, the utility model discloses a two line cascade application system of mains operated simultaneous transmission data, including controller, cascade chip, LED lamp, the controller is connected and is cascaded the chip, cascades the chip and is connected its characterized in that with the LED lamp: the cascade chip is internally provided with a voltage clamping module (the voltage clamping module realizes stable and accurate power supply and DATA transmission when in cascade application), a power supply module, a DATA storage module, a PWM constant-current output driving circuit, an R end, a G end, a B end, a W end, a VCC/DATA end and a GND/DATA end, and a DATA sampling calibration module, a power line sampling DATA transmission module, an instruction setting chip initial state module, a module for judging whether an E-fuse address is the same as a chip initial address or not, and an E-fuse module (the address of a storage chip, the E-fuse is burnt out at any time in the production application process to determine different chip addresses, thereby facilitating the production application);
the VCC/DATA end is respectively connected to the voltage clamping module, the DATA sampling calibration module and the power line sampling transmission DATA module; the output end of the voltage clamping module is respectively connected to the GND/DATA end and the power supply module; the output end of the power supply module is respectively connected with the data sampling calibration module, the power line sampling data transmission module, the instruction setting chip initial state module, the module for judging whether the E-fuse address is the same as the chip initial address, the E-fuse module, the data storage module and the PWM constant current output drive circuit for supplying power; the output end of the power line sampling and data transmission module is respectively connected to the instruction setting chip initial state module and the data storage module; the module for judging whether the E-fuse address is the same as the chip initial address or not is connected to the data storage module; the constant current output driving circuit is connected to the R end, the G end, the B end and the W end;
and the cascade chip is also provided with an oscillating circuit and a reset circuit, and the oscillating circuit and the reset circuit are connected between the power supply module and the power line sampling and data transmitting module.
Furthermore, the controller is provided with VDD and GND ports, and VDD and GND ends of the controller are respectively connected to VDD and GND ends of all the cascade chips; the LED lamp is connected with the R end, the G end, the B end and the W end of the cascade chip.
As shown in fig. 3, the utility model discloses a method for implementing a two-line cascade application system for transmitting data simultaneously by power supply, which comprises the following steps:
the cascade chip is powered on, and the voltage clamping module realizes stable and accurate power supply and data transmission during cascade application;
the cascade chip changes the judgment standard of the transmission data in real time through the data sampling calibration module 300, and accurately samples the transmission data; after data sampling calibration, a power line sampling transmission data module samples transmission data;
if the transmitted data is judged to be an address code writing instruction, the chip E-fuse module 500 is written, the chip address is set, and otherwise, the transmitted data is re-sampled and judged;
if the transmission data is judged to be instruction data for setting the initial address of the chip, the initial address of the chip is set in the instruction setting chip initial state module 400, and the initial address of the chip is increased by one after a group of display instruction data is received, otherwise, the transmission data is re-sampled and judged;
and judging whether the transmitted data is display instruction data, if so, judging whether the E-fuse address stored in the module 500 is the same as the initial address of the chip stored in the module 400, if so, sampling and storing display data of the corresponding address and displaying the PWM constant current output, and otherwise, ignoring the data.
Use the utility model discloses afterwards, realized a two line cascade application system of mains operated simultaneous transmission data. The cascade LED display application system is universal to the original application system, the use cost is not increased, the application reliability of the LED display cascade application system is improved, the display refresh rate is improved, and the cascade LED display application system is used safely, effectively and correctly.
The utility model discloses a two line cascade application system of mains operated simultaneous transmission data, general original application system does not increase use cost, has improved LED and has shown the application reliability that cascades application system, has improved and has shown the refresh rate etc. safe, effective, the correct LED that uses shows cascades application system. Of course, the present invention is not only suitable for LED display two-line cascade application system, but also suitable for other cascade application system (for example, power line and data line are separated, etc.).
The present specification describes only the preferred embodiments of the present invention, rather than the limitations of the present invention, which are based on the concept of the present invention and are determined by logical analysis, reasoning or limited experiments, the present invention makes some adjustments and changes, such as serial application LED display, parallel application industrial control, serial application industrial control, other cascading application systems (e.g., power line and data line separation, etc.). The gist of the present invention is to be understood within the scope of the present invention.
Claims (2)
1. The utility model provides a two line cascade application system of power supply simultaneous transmission data, includes controller, cascade chip, LED lamp, the controller is connected and is cascaded the chip, cascades the chip and is connected with the LED lamp, its characterized in that: the cascade chip is provided with a voltage clamping module, a power supply module, a DATA storage module, a PWM constant current output driving circuit, an R end, a G end, a B end, a W end, a VCC/DATA end and a GND/DATA end, and a DATA sampling calibration module, a power line sampling transmission DATA module, an instruction setting chip initial state module, an E-fuse module and an E-fuse module which are connected in sequence;
the VCC/DATA end is respectively connected to the voltage clamping module, the DATA sampling calibration module and the power line sampling transmission DATA module; the output end of the voltage clamping module is respectively connected to the GND/DATA end and the power supply module; the output end of the power supply module is respectively connected with the data sampling calibration module, the power line sampling data transmission module, the instruction setting chip initial state module, the module for judging whether the E-fuse address is the same as the chip initial address, the E-fuse module, the data storage module and the PWM constant current output drive circuit for supplying power; the output end of the power line sampling and data transmission module is respectively connected to the instruction setting chip initial state module and the data storage module; the module for judging whether the E-fuse address is the same as the chip initial address or not is connected to the data storage module; the constant current output driving circuit is connected to the R end, the G end, the B end and the W end;
and the cascade chip is also provided with an oscillating circuit and a reset circuit, and the oscillating circuit and the reset circuit are connected between the power supply module and the power line sampling and data transmitting module.
2. The two-wire cascade application of power-on-data as claimed in claim 1, wherein: the controller is provided with VDD and GND ports, and VDD and GND ends of the controller are respectively connected to VDD and GND ends of all the cascade chips; the LED lamp is connected with the R end, the G end, the B end and the W end of the cascade chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022649007.XU CN213844722U (en) | 2020-11-11 | 2020-11-11 | Two-wire cascade application system for simultaneously transmitting data by power supply |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022649007.XU CN213844722U (en) | 2020-11-11 | 2020-11-11 | Two-wire cascade application system for simultaneously transmitting data by power supply |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN213844722U true CN213844722U (en) | 2021-07-30 |
Family
ID=77016902
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202022649007.XU Active CN213844722U (en) | 2020-11-11 | 2020-11-11 | Two-wire cascade application system for simultaneously transmitting data by power supply |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN213844722U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112259046A (en) * | 2020-11-11 | 2021-01-22 | 深圳市梓晶微科技有限公司 | Two-wire cascade application system for simultaneously transmitting data by power supply and implementation method thereof |
-
2020
- 2020-11-11 CN CN202022649007.XU patent/CN213844722U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112259046A (en) * | 2020-11-11 | 2021-01-22 | 深圳市梓晶微科技有限公司 | Two-wire cascade application system for simultaneously transmitting data by power supply and implementation method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN111653233A (en) | Multi-path cascade application system and data processing control method thereof | |
| CN213844722U (en) | Two-wire cascade application system for simultaneously transmitting data by power supply | |
| CN113608936A (en) | Multi-channel interface test system and method | |
| CN105047135A (en) | Lamp panel module group, box body, and LED display screen system | |
| CN212461110U (en) | Multi-path cascade application system | |
| CN111462681B (en) | Multipath cascade application system and control method for detecting and receiving correct data thereof | |
| CN106713094B (en) | 1394 data acquisition module | |
| US20230020550A1 (en) | Dual-line cascade application system and implementation method thereof for simultaneously supplying electrical power and transmitting data | |
| CN118175692A (en) | Serial and parallel connection driving circuit, LED driving chip and driving method for multistage LEDs | |
| CN112259046A (en) | Two-wire cascade application system for simultaneously transmitting data by power supply and implementation method thereof | |
| CN116346117B (en) | IIC port expansion circuit, transmission method, transmission system, computer equipment and medium | |
| US11922864B2 (en) | Display device | |
| CN110120197B (en) | Cascade application system capable of omitting peripheral resistance and capacitance to reduce interference and implementation method thereof | |
| CN212624746U (en) | Multi-path cascade application system | |
| CN115982050A (en) | Multifunctional test system and method for IO-Link master station | |
| CN113985321B (en) | Cable connection performance testing device and method with intelligent self-learning capability | |
| CN216013989U (en) | Expansion module number identification circuit | |
| CN115116385A (en) | Display system, display device thereof and display control method | |
| CN210378416U (en) | Cascade application system for omitting peripheral resistor and capacitor and reducing interference | |
| CN114416622A (en) | Single bus communication system and method | |
| CN211454461U (en) | Be applied to unmanned fork truck's mainboard extension device | |
| CN114282475A (en) | Program burning device system and method | |
| US20240054946A1 (en) | Dual-line cascade application system and implementation method thereof for simultaneously supplying electrical power and transmitting data | |
| CN201828628U (en) | Connector terminal fault detector | |
| CN214895656U (en) | Display chip test equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |