CN212675026U - Voltage detection circuit - Google Patents
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- CN212675026U CN212675026U CN202021428345.4U CN202021428345U CN212675026U CN 212675026 U CN212675026 U CN 212675026U CN 202021428345 U CN202021428345 U CN 202021428345U CN 212675026 U CN212675026 U CN 212675026U
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Abstract
The embodiment of the application provides a voltage detection circuit, which comprises a first voltage sampling circuit and a second voltage sampling circuit. The input end of the first voltage sampling circuit is connected with the input end of a diode in the target circuit, and the first voltage sampling circuit is used for detecting the voltage of the input end of the diode. The input end of the second voltage sampling circuit is connected with the output end of the diode of the target circuit, and the second voltage sampling circuit is used for detecting the voltage of the output end of the diode. The embodiment of the application can detect the voltages of the input end and the output end of the diode in the target circuit simultaneously through the first voltage sampling circuit and the second voltage sampling circuit, so that the detection efficiency of the power supply voltage of the target circuit and the effectiveness of reading the power supply voltage can be improved, and the condition that partial voltage signals are not collected and lost can be effectively avoided. The embodiment of the application can also realize voltage overcurrent monitoring and reverse voltage monitoring by detecting the voltages of the input end and the output end of the diode.
Description
Technical Field
The application relates to the technical field of circuit detection, in particular to a voltage detection circuit.
Background
In order to ensure the normal and stable operation of the target circuit, the power supply voltage of the target circuit needs to be detected, and the operating state of the target circuit can be determined by detecting the power supply voltage. However, the existing voltage detection circuit has low detection efficiency, and therefore, a situation that part of voltage signals are not collected and lost occurs during detection. When this occurs, not only may the supply voltage detection of the target circuit be inaccurate, but also if a disturbance occurs while the supply voltage is in an unmonitored state, catastrophic results may be caused to the system to which the target circuit corresponds.
SUMMERY OF THE UTILITY MODEL
Embodiments of the present application provide a voltage detection circuit to solve or alleviate one or more technical problems in the prior art.
As an aspect of an embodiment of the present application, an embodiment of the present application provides a voltage detection circuit, including a first voltage sampling circuit and a second voltage sampling circuit;
the input end of the first voltage sampling circuit is connected with the input end of a diode in the target circuit, and the first voltage sampling circuit is used for detecting the voltage of the input end of the diode;
the input end of the second voltage sampling circuit is connected with the output end of the diode, and the second voltage sampling circuit is used for detecting the voltage of the output end of the diode.
In one embodiment, the voltage detection circuit further comprises a processing circuit, an input terminal of the processing circuit is connected to an input terminal of the first voltage sampling circuit and an input terminal of the second voltage sampling circuit, respectively, and the processing circuit is configured to compare a voltage at an input terminal of the diode with a voltage at an output terminal of the diode.
In one embodiment, the first voltage sampling circuit includes a first analog-to-digital conversion module, an input end of the first analog-to-digital conversion module is connected with an input end of the diode, and the first analog-to-digital conversion module is configured to perform analog-to-digital conversion on a voltage signal collected from the input end of the diode.
In an embodiment, the first voltage sampling circuit further includes a first processing module, the first processing module is connected to an output end of the first analog-to-digital conversion module, and the first processing module is configured to detect a voltage signal after analog-to-digital conversion by the first analog-to-digital conversion module.
In one embodiment, the second voltage sampling circuit includes a second analog-to-digital conversion module, an input end of the second analog-to-digital conversion module is connected to an output end of the diode, and the second analog-to-digital conversion module is configured to perform analog-to-digital conversion on the voltage signal collected from the output end of the diode.
In an embodiment, the second voltage sampling circuit further includes a second processing module, the second processing module is connected to an output end of the second analog-to-digital conversion module, and the second processing module is configured to detect a voltage signal after analog-to-digital conversion by the second analog-to-digital conversion module.
In one embodiment, the first analog-to-digital conversion module includes a first switch unit and a first analog-to-digital converter, an input end of the first switch unit is connected with an input end of the diode, an output end of the first switch unit is connected with an input end of the first analog-to-digital converter, and the first switch unit is configured to control whether the first analog-to-digital converter collects a voltage signal at the input end of the diode; the output end of the first analog-to-digital converter is connected with the first processing module.
In one embodiment, the first switching unit includes a first transistor, a second transistor, a first switch, and a second switch; the E pole of the first triode is connected with the input end of the diode, the C pole of the first triode is connected with the input end of the first analog-to-digital conversion unit for conversion, and the B pole of the first triode is connected with the first switch; the first switch is connected with the C pole of the second triode, the E pole of the second triode is grounded, the B pole of the second triode is connected with the second switch, and the second switch is connected with the first processing module.
In one embodiment, the second analog-to-digital conversion module includes a second switch unit and a second analog-to-digital converter, an input end of the second switch unit is connected to an output end of the diode, an output end of the second switch unit is connected to an input end of the second analog-to-digital converter, and the second switch unit is configured to control whether the second analog-to-digital converter acquires a voltage signal at the output end of the diode; the output end of the second analog-to-digital converter is connected with the second processing module.
In one embodiment, the second switch includes a third transistor, a fourth transistor, a third switch and a fourth switch, the E pole of the third transistor is connected to the output terminal of the diode, the C pole of the third transistor is connected to the input terminal of the second analog-to-digital converter, the B pole of the third transistor is connected to the third switch, the third switch is connected to the C pole of the fourth transistor, the E pole of the fourth transistor is grounded, the B pole of the fourth transistor is connected to the fourth switch, and the fourth switch is connected to the second processing module.
The embodiment of the application can realize the simultaneous detection of the voltages of the input end and the output end of the diode in the target circuit through the first voltage sampling circuit and the second voltage sampling circuit, so that the detection efficiency of the power supply voltage of the target circuit and the effectiveness of reading the power supply voltage can be improved, and the condition that partial voltage signals are not collected and lost can be effectively avoided. The embodiment of the application can also realize voltage overcurrent monitoring and reverse voltage monitoring by detecting the voltages of the input end and the output end of the diode.
The foregoing summary is provided for the purpose of description only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features of the present application will be readily apparent by reference to the drawings and following detailed description.
Drawings
In the drawings, like reference numerals refer to the same or similar parts or elements throughout the several views unless otherwise specified. The figures are not necessarily to scale. It is appreciated that these drawings depict only some embodiments in accordance with the disclosure and are therefore not to be considered limiting of its scope.
FIG. 1 illustrates a functional block diagram of a voltage detection circuit provided according to an embodiment of the present application;
FIG. 2 illustrates a functional block diagram of a voltage detection circuit provided in accordance with another embodiment of the present application;
FIG. 3 illustrates a functional block diagram of a voltage detection circuit provided in accordance with another embodiment of the present application;
FIG. 4 illustrates a functional block diagram of a voltage detection circuit provided in accordance with another embodiment of the present application;
FIG. 5 illustrates a functional block diagram of a voltage detection circuit provided in accordance with another embodiment of the present application;
FIG. 6 illustrates a functional block diagram of a voltage detection circuit provided in accordance with another embodiment of the present application;
fig. 7 shows a schematic block diagram of a first switching unit and a second switching unit of a voltage detection circuit provided according to an embodiment of the present application;
fig. 8 illustrates a functional block diagram of a voltage detection circuit provided in accordance with another embodiment of the present application.
Detailed Description
In the following, only certain exemplary embodiments are briefly described. As those skilled in the art will recognize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present application. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.
The embodiment of the application provides a voltage detection circuit, as shown in fig. 1, the voltage detection circuit includes a first voltage sampling circuit 1 and a second voltage sampling circuit 2. The input end of the first voltage sampling circuit 1 is connected with the input end of the diode 31 in the target circuit 3, and the first voltage sampling circuit 1 is used for detecting the voltage of the input end of the diode 31. The input end of the second voltage sampling circuit 2 is connected with the output end of the diode 31, and the second voltage sampling circuit 2 is used for detecting the voltage of the output end of the diode 31.
The target circuit 3 can be understood as any operating or supply circuit. The diode 31 may be understood as a diode 31 with different specifications in the prior art, and is not limited in detail. The diode 31 in the embodiment of the present application includes, but is not limited to, a reverse diode 31.
The first voltage sampling circuit 1 detects the voltage at the input terminal of the diode 31, and can be understood as collecting, analyzing, monitoring and detecting the voltage at the input terminal of the diode 31. The second voltage sampling circuit 2 detects the voltage at the output terminal of the diode 31, and can be understood as collecting, analyzing, monitoring and detecting the voltage at the output terminal of the diode 31.
This application embodiment can realize detecting the voltage of the input and the output of diode 31 in target circuit 3 simultaneously through first voltage sampling circuit 1 and second voltage sampling circuit 2, so not only can improve the detection efficiency to target circuit 3's supply voltage and read supply voltage's validity, can effectively avoid appearing partial voltage signal moreover and not gathered the condition that appears losing. In the embodiment of the present application, the voltage at the input end and the voltage at the output end of the detection diode 31 can also be used for monitoring the voltage overcurrent and the reverse voltage.
Specifically, because the first voltage sampling circuit 1 and the second voltage sampling circuit 2 of this application embodiment detect the voltage of the input and the output of the diode 31 simultaneously, therefore when the voltage of the input of the diode 31 is processed by analog-to-digital conversion by the first voltage sampling circuit 1, the voltage of the target circuit 3 can still be collected by the second voltage sampling circuit 2, thereby effectively avoiding that the voltage signal can not be collected when the voltage signal is analog-to-digital converted by the voltage detection circuit if only one voltage detection circuit is used for voltage collection, and the voltage signal caused by the loss is not collected. For example, if the conversion time of an ADC (analog to digital converter) is 100ms, if there is only one ADC, the power supply voltage is not monitored within 100ms of the software process, and if a disturbance occurs, the system may have catastrophic consequences. If there are two ADCs present at the same time, this time interval can be shortened to 50ms, so that the uncertainty probability of the system is greatly reduced. And can also solve the problem that the voltage measured by only one ADC is an instantaneous value, and if the calculation of the ADC has an error, the input error of the whole system corresponding to the working circuit to the power supply voltage value is caused.
Because the first voltage sampling circuit 1 and the second voltage sampling circuit 2 of the embodiment of the present application detect the voltages at the input end and the output end of the diode 31 at the same time, it is possible to realize the voltage overcurrent monitoring of the target circuit 3 by using the voltage at the input end of the diode 31 collected by the first voltage sampling circuit 1, the voltage at the output end of the diode 31 collected by the second voltage sampling circuit 2, and the inquiry voltage of the diode 31 (which can be inquired from the specification according to the model of the diode 31) in one working cycle of the voltage detection circuit.
For example, according to formula VADC0＝VDiode+VADC1The voltage overcurrent condition of the target circuit 3 can be judged. Wherein, VADC0The expression voltage, V, at the input of the diode 31DiodeRepresents the forward conduction voltage of the diode 31 itself (which can be obtained by looking up the table for the type of the diode 31), VADC1Representing the voltage at the output of the diode 31. If V is readADC0And VADC1The value of (C) corresponds to the given logical relationship of the formula, then VADC0And VADC1The value of (b) is accurate and can be adopted as an index for voltage detection. If V is readDiode+VADC1+Vmin≤VADC0≤VDiode+VADC1+V maxThen read to VADC0And VADC1The value of (A) is in accordance with the established logical relationship of the formula, the data is reliable, and the value can be adopted as the index of voltage detection. If V is readADC0<VDiode+VADC1+VminOr VADC0>VDiode+VADC1+V maxIf the logic relation indicates that the system corresponding to the working circuit is in a certain abnormal state, the system can be diagnosed in time, and therefore the system can respond to the abnormal state in time. Wherein, VminRepresenting the minimum error voltage parameter, VmaxRepresenting the maximum error voltage parameter. Note that the voltage V at the input terminal of the diode 31ADC0And the voltage V at the output of the diode 31ADC1May be the voltage acquired at the same time. Voltage V at the input of diode 31ADC0And the voltage V at the output of the diode 31ADC1Also can be used forAre voltages respectively acquired within a preset time interval.
Because the first voltage sampling circuit 1 and the second voltage sampling circuit 2 of the embodiment of the present application detect the voltages of the input end and the output end of the diode 31 at the same time, based on the unidirectional conductivity of the diode 31, the reverse voltage monitoring of the target circuit 3 can be performed by using the voltage magnitudes of the input end and the output end of the diode 31. For example, when the voltage at the input end of the diode 31 collected by the first voltage sampling circuit 1 is zero, and the voltage at the output end of the diode 31 collected by the second voltage sampling circuit 2 is greater than 2V, it can be determined that there is a reverse voltage in the system corresponding to the target circuit 3 with a high probability.
In one embodiment, as shown in fig. 2, the voltage detection circuit further includes a processing circuit 4, an input terminal of the processing circuit 4 is connected to an input terminal of the first voltage sampling circuit 1 and an input terminal of the second voltage sampling circuit 2, respectively, and the processing circuit 4 is configured to compare a voltage at an input terminal of the diode 31 with a voltage at an output terminal of the diode 31.
The processing circuit 4 can be understood as a Central Processing Unit (CPU) or an MCU (micro controller Unit). The processing circuit 4 may also be understood as a data transport processing module within a CPU or MCU.
The processing circuit 4 compares the voltage at the input terminal of the diode 31 with the voltage at the output terminal of the diode 31, and it is understood that the reverse voltage monitoring is performed on the target circuit 3 according to the voltage levels at the input terminal and the output terminal of the diode 31. It can also be understood that the voltage overcurrent monitoring of the target circuit 3 is realized according to the voltage of the input end of the diode 31 collected by the first voltage sampling circuit 1, the voltage of the output end of the diode 31 collected by the second voltage sampling circuit 2 and the query voltage of the diode 31.
In one embodiment, as shown in fig. 3, the first voltage sampling circuit 1 includes a first analog-to-digital conversion module 11, an input terminal of the first analog-to-digital conversion module 11 is connected to an input terminal of a diode 31, and the first analog-to-digital conversion module 11 is configured to perform analog-to-digital conversion on a voltage signal collected from the input terminal of the diode 31.
The first analog-to-digital conversion module 11 may employ any analog-to-digital signal converter in the prior art, and is not limited in particular.
In an embodiment, as shown in fig. 3, the first voltage sampling circuit 1 further includes a first processing module 12, the first processing module 12 is connected to an output end of the first analog-to-digital conversion module 11, and the first processing module 12 is configured to detect a voltage signal after analog-to-digital conversion by the first analog-to-digital conversion module 11.
The first processing module 12 may be understood as a Central Processing Unit (CPU) or a Micro Controller Unit (MCU). The first processing module 12 may also be understood as a data transport processing module within a CPU or MCU. The first processing module 12 detects the voltage signal after analog-to-digital conversion by the first analog-to-digital conversion module 11, which can be understood as analyzing, monitoring and detecting the voltage signal after analog-to-digital conversion.
In one embodiment, as shown in fig. 4, the second voltage sampling circuit 2 includes a second analog-to-digital conversion module 21, an input terminal of the second analog-to-digital conversion module 21 is connected to an output terminal of the diode 31, and the second analog-to-digital conversion module 21 is configured to perform analog-to-digital conversion on the voltage signal collected from the output terminal of the diode 31.
The second analog-to-digital conversion module 21 may employ any analog-to-digital signal converter in the prior art, and is not limited in particular.
In an embodiment, as shown in fig. 4, the second voltage sampling circuit 2 further includes a second processing module 22, where the second processing module 22 is connected to an output end of the second analog-to-digital conversion module 21, and the second processing module 22 is configured to detect a voltage signal after analog-to-digital conversion by the second analog-to-digital conversion module 21.
The second processing module 22 may be understood as a Central Processing Unit (CPU) or a Micro Controller Unit (MCU). The second processing module 22 may also be understood as a data transport processing module within a CPU or MCU. The second processing module 22 detects the voltage signal after analog-to-digital conversion by the second analog-to-digital conversion module 21, which can be understood as analyzing, monitoring and detecting the voltage signal after analog-to-digital conversion.
In one example of an application, the first processing module 12 and the second processing module 22 may be the same processing module. Alternatively, the processing circuit 4, the first processing module 12 and the second processing module 22 may be one and the same processing module. Alternatively, the first processing module 12 and the second processing module 22 are part of the processing circuit 4.
In an embodiment, as shown in fig. 5, the first analog-to-digital conversion module 11 includes a first switch unit 111 and a first analog-to-digital converter 112, an input end of the first switch unit 111 is connected to an input end of the diode 31, an output end of the first switch unit 111 is connected to an input end of the first analog-to-digital converter 112, and the first switch unit 111 is configured to control whether the first analog-to-digital converter 112 collects a voltage signal at the input end of the diode 31, that is, to control a timing when the first analog-to-digital converter 112 collects the voltage signal at the input end of the diode 31. The output of the first analog-to-digital converter 112 is connected to the first processing module 12.
In one embodiment, as shown in fig. 6, the second analog-to-digital conversion module includes a second switch unit 211 and a second analog-to-digital converter 212, an input end of the second switch unit 211 is connected to an output end of the diode 31, an output end of the second switch unit 211 is connected to an input end of the second analog-to-digital converter 212, and the second switch unit 211 is configured to control whether the second analog-to-digital converter 212 acquires a voltage signal at an output end of the diode 31. The output of the second analog-to-digital converter 212 is connected to the second processing module 22.
In one example, the first analog-to-digital converter 112 and the second analog-to-digital converter 212 may employ any ADC known in the art.
It can be seen that the first switch unit 111 can control whether the first adc 112 collects the voltage signal at the input end of the diode 31, and the second switch unit 211 can control whether the second adc 212 collects the voltage signal at the output end of the diode 31, that is, by controlling the first switch and the second switch, the second adc 212 collects the voltage at the output end of the diode 31 while the first adc 112 collects the voltage at the input end of the diode 31. According to the formula that the voltage at the input end of the diode 31 is equal to the sum of the voltage at the output end of the diode 31 and the voltage at the input end of the diode 31 at the same time, the calculated voltage of the diode 31 can be compared with the preset voltage of the diode 31, and whether the actual circuit of the diode 31 is over-current or not can be further judged. Inquiring the maximum value and the minimum value of the voltage of the diode 31 from the specification, adding the output voltage of the diode 31 to the maximum value and the minimum value respectively to obtain the theoretical value range of the voltage of the input end of the diode 31, and if the acquired voltage of the input end of the diode 31 is not in the theoretical range, considering that the target circuit 3 is in an abnormal working state or the acquired voltage value of the input end of the diode 31 is not credible. Similarly, it can be determined whether the collected voltage value at the output end of the diode 31 is authentic or whether the target circuit 3 is in a normal working state.
In one embodiment, as shown in fig. 7, the first switching unit 111 includes a first transistor 1111, a second transistor 1112, a first switch 1113, and a second switch 1114. An E pole (Emitter) of the first transistor 1111 is connected to the input terminal of the diode 31, a C pole (Collector) of the first transistor 1111 is connected to the input terminal of the first analog-to-digital converter 112, and a B pole (Base) of the first transistor 1111 is connected to the first switch 1113. The first switch 1113 is connected to a C-pole (Collector) of the second transistor 1112, an E-pole (Emitter) of the second transistor 1112 is grounded, a B-pole (Base) of the second transistor 1112 is connected to the second switch 1114, and the second switch 1114 is connected to the first processing module 12.
In one embodiment, as shown in fig. 7, the second switch unit 211 includes a third transistor 2111, a fourth transistor 2112, a third switch 2113 and a fourth switch 2114, an E pole (Emitter) of the third transistor 2111 is connected to the output terminal of the diode 31, a C pole (Collector) of the third transistor 2111 is connected to the input terminal of the second analog-to-digital converter 212, the third switch 2113 is connected to a B pole (Base) of the third transistor 2111, the third switch 2113 is connected to the C pole (Collector) of the fourth transistor 2112, the E pole (Emitter) of the fourth transistor 2112 is grounded, the B pole (Base) of the fourth transistor 2112 is connected to the fourth switch 2114, and the fourth switch 2114 is connected to the second processing module 22.
In one embodiment, as shown in fig. 8, the first switching unit 111 is connected to an input terminal of the backward diode 31 of the target circuit 3, and the second switching unit 211 is connected to an output terminal of the backward diode 31 of the target circuit 3. The E-pole of the first transistor 1111 of the first switching unit 111 is connected to the input terminal of the backward diode 31. The E-pole of the first transistor 1111 is also grounded via the first capacitor 71. The C-pole of the first transistor 1111 is connected to the input terminal of the first voltage divider circuit 51. The B-pole of the first transistor 1111 is connected to the C-pole of the second transistor 1112 through a first switch 1113. The B-pole of the first transistor 1111 is also connected to the E-pole through a switch 1115. The B-pole of the second transistor 1112 is connected to the first processing module 12 through a second switch 1114. The E-pole of the second transistor 1112 is grounded. The B-pole of the second transistor 1112 is connected to the E-pole through a switch 1116. An output terminal of the first voltage divider circuit 51 is connected to an input terminal of the second voltage divider circuit 52, and an output terminal of the second voltage divider circuit 52 is connected to an input terminal of the first analog-to-digital converter 112. A zener diode 61 is further connected between the output terminal of the first voltage dividing circuit 51 and the E pole of the second transistor 1112, and the zener diode 61 is configured to protect the first analog-to-digital converter 112 from surge damage. A third voltage dividing circuit 53 is connected between the output terminal of the second voltage dividing circuit 52 and the E-pole of the second transistor 1112. A second capacitor 72 is further connected between the output terminal of the second voltage divider 52 and the E-pole of the second transistor 1112, and the second capacitor 72 is used to improve the accuracy of the first analog-to-digital converter 112.
An E-pole of the third transistor 2111 of the second switching unit 211 is connected to an output terminal of the backward diode 31. The E-pole of the third transistor 2111 is also coupled to ground via a third capacitor 81. The C-pole of the third transistor 2111 is connected to the input terminal of the fourth voltage dividing circuit 91. The B-pole of the third transistor 2111 is connected to the C-pole of the fourth transistor 2112 through a third switch 2113. The B-pole of the third transistor 2111 is also connected to the E-pole through a switch 2115. The B-pole of the fourth transistor 2112 is connected to the second processing module 22 via a fourth switch 2114. The E-pole of the fourth transistor 2112 is grounded. The B-pole of the fourth transistor 2112 is connected to the E-pole through a switch 2116. An output terminal of the fourth voltage dividing circuit 91 is connected to an input terminal of the fifth voltage dividing circuit 92, and an output terminal of the fifth voltage dividing circuit 92 is connected to an input terminal of the second analog-to-digital converter 212. A zener diode 62 is further connected between the output terminal of the fourth voltage dividing circuit 91 and the E-pole of the fourth transistor 2112, and the zener diode 62 is used to protect the second analog-to-digital converter 212 from surge damage. A sixth voltage division circuit 93 is further connected between the output terminal of the fifth voltage division circuit 92 and the E-pole of the fourth transistor 2112. A fourth capacitor 82 is further connected between the output terminal of the fifth voltage division circuit 92 and the E-pole of the fourth transistor 2112, and the fourth capacitor 82 is used for improving the accuracy of the second analog-to-digital converter 212.
Other configurations of the voltage detection circuit of the above embodiments can be adopted in various technical solutions known by those skilled in the art now and in the future, and are not described in detail here.
In the description of the present specification, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and to simplify the description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the present application.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In this application, unless expressly stated or limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can include, for example, fixed connections, removable connections, or integral parts; the connection can be mechanical connection, electrical connection or communication; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly above and obliquely above the second feature, or simply meaning that the first feature is at a lesser level than the second feature.
The above disclosure provides many different embodiments or examples for implementing different structures of the application. The components and arrangements of specific examples are described above to simplify the present disclosure. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive various changes or substitutions within the technical scope of the present application, and these should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. A voltage detection circuit is characterized by comprising a first voltage sampling circuit and a second voltage sampling circuit;
the input end of the first voltage sampling circuit is connected with the input end of a diode in the target circuit, and the first voltage sampling circuit is used for detecting the voltage of the input end of the diode;
the input end of the second voltage sampling circuit is connected with the output end of the diode, and the second voltage sampling circuit is used for detecting the voltage of the output end of the diode.
2. The voltage detection circuit of claim 1, further comprising a processing circuit having inputs coupled to the input of the first voltage sampling circuit and the input of the second voltage sampling circuit, respectively, the processing circuit configured to compare a voltage at the input of the diode with a voltage at the output of the diode.
3. The voltage detection circuit of claim 1, wherein the first voltage sampling circuit comprises a first analog-to-digital conversion module, an input terminal of the first analog-to-digital conversion module is connected to an input terminal of the diode, and the first analog-to-digital conversion module is configured to perform analog-to-digital conversion on the voltage signal collected from the input terminal of the diode.
4. The voltage detection circuit of claim 3, wherein the first voltage sampling circuit further comprises a first processing module, the first processing module is connected to the output end of the first analog-to-digital conversion module, and the first processing module is configured to detect the voltage signal after analog-to-digital conversion by the first analog-to-digital conversion module.
5. The voltage detection circuit of claim 1, wherein the second voltage sampling circuit comprises a second analog-to-digital conversion module, an input terminal of the second analog-to-digital conversion module is connected to an output terminal of the diode, and the second analog-to-digital conversion module is configured to perform analog-to-digital conversion on the voltage signal collected from the output terminal of the diode.
6. The voltage detection circuit of claim 5, wherein the second voltage sampling circuit further comprises a second processing module, the second processing module is connected to the output end of the second analog-to-digital conversion module, and the second processing module is configured to detect the voltage signal after analog-to-digital conversion by the second analog-to-digital conversion module.
7. The voltage detection circuit according to claim 4, wherein the first analog-to-digital conversion module includes a first switch unit and a first analog-to-digital converter, an input terminal of the first switch unit is connected to the input terminal of the diode, an output terminal of the first switch unit is connected to the input terminal of the first analog-to-digital converter, and the first switch unit is configured to control whether the first analog-to-digital converter collects the voltage signal at the input terminal of the diode; the output end of the first analog-to-digital converter is connected with the first processing module.
8. The voltage detection circuit of claim 7, wherein the first switching unit comprises a first transistor, a second transistor, a first switch, and a second switch; the E pole of the first triode is connected with the input end of the diode, the C pole of the first triode is connected with the input end of the first analog-to-digital conversion unit for conversion, and the B pole of the first triode is connected with the first switch; the first switch is connected with the C pole of the second triode, the E pole of the second triode is grounded, the B pole of the second triode is connected with the second switch, and the second switch is connected with the first processing module.
9. The voltage detection circuit according to claim 6, wherein the second analog-to-digital conversion module includes a second switch unit and a second analog-to-digital converter, an input terminal of the second switch unit is connected to the output terminal of the diode, an output terminal of the second switch unit is connected to an input terminal of the second analog-to-digital converter, and the second switch unit is configured to control whether the second analog-to-digital converter collects the voltage signal at the output terminal of the diode; and the output end of the second analog-to-digital converter is connected with the second processing module.
10. The voltage detection circuit of claim 9, wherein the second switch comprises a third transistor, a fourth transistor, a third switch and a fourth switch, wherein an E-pole of the third transistor is connected to the output terminal of the diode, a C-pole of the third transistor is connected to the input terminal of the second analog-to-digital converter, a B-pole of the third transistor is connected to the third switch, the third switch is connected to the C-pole of the fourth transistor, the E-pole of the fourth transistor is grounded, the B-pole of the fourth transistor is connected to the fourth switch, and the fourth switch is connected to the second processing module.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117991143A (en) * | 2024-04-03 | 2024-05-07 | 杭州海康威视数字技术股份有限公司 | Identification of power supply anomalies in circuits and electronic devices |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117991143A (en) * | 2024-04-03 | 2024-05-07 | 杭州海康威视数字技术股份有限公司 | Identification of power supply anomalies in circuits and electronic devices |
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