CN211531102U - High-compatibility optical power sampling monitoring circuit - Google Patents
High-compatibility optical power sampling monitoring circuit Download PDFInfo
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- CN211531102U CN211531102U CN202020624499.4U CN202020624499U CN211531102U CN 211531102 U CN211531102 U CN 211531102U CN 202020624499 U CN202020624499 U CN 202020624499U CN 211531102 U CN211531102 U CN 211531102U
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Abstract
The utility model discloses a high compatibility optical power sampling monitoring circuit, the circuit includes controller, driver, laser instrument, PNP pipe mirror image circuit, NPN pipe mirror image circuit, first resistance, second resistance, third resistance, fourth resistance, fifth resistance and sixth resistance; the controller is connected with the first end of the driver; the second end of the driver is connected with the first end of the laser through a fourth resistor, and the fourth end of the driver is connected with the first end of the PNP tube mirror image circuit through a first resistor; the second end of the PNP tube mirror image circuit is connected with the third end of the laser through a fifth resistor; the first end of the NPN tube mirror image circuit is connected between the driver and the PNP tube mirror image circuit through a second resistor, and is connected between the PNP tube mirror image circuit and the laser through a third resistor; and the second end of the NPN tube mirror image circuit is connected with the third end of the laser through a sixth resistor. The utility model discloses a current sampling solution of different modes has increased the product compatibility, has reduced development cost.
Description
Technical Field
The utility model relates to an optical fiber communication technical field especially relates to a high compatibility luminous power sampling monitoring circuit.
Background
PD (Photo-Diode) is mainly used in an Optical module to monitor the emitted light Power, implement APC (Automatic Optical Power Control) function and provide DDMI (Digital Diagnostic Monitoring Interface) of the emitted light Power. The APC function is a process of setting a target monitor current, and then dynamically adjusting a bias current of an LD (Laser Diode) to control a light emission level according to a sampled backlight current level of the PD, so that a sampled current approaches the target monitor current. The emitted light power monitoring is performed by reading the ADC value of the driver chip (driver) through an IIC (Inter-Integrated Circuit) via an MCU (Micro Controller Unit, single chip microcomputer), and then updating and storing it in the corresponding protocol area in real time after the MCU is converted.
Currently, in optical module applications, in the first aspect, the pin definitions of PDs are not completely the same for different device manufacturers. The common connection mode has two types, wherein one type is that the PD anode is connected with GND, and the other type is that the PD cathode is connected with GND. Different circuit designs are required for driving, so that repeated board beating is caused, and the product development cost is greatly increased. In the second aspect, although most of the driver chips provided by manufacturers support two current sampling modes, namely Sink and Source, a small number of the driver chips of manufacturers only support the Sink current sampling mode, and the conventional design is that the optical power monitoring is realized by sampling the voltage of an ADC, which cannot realize the APC function to control the optical power.
In view of the above, a high compatibility circuit is needed to solve the drawbacks of the prior art.
SUMMERY OF THE UTILITY MODEL
The utility model provides a high compatibility optical power sampling monitoring circuit to solve the not enough of prior art.
In order to achieve the above object, the present invention provides the following technical solutions:
a high-compatibility optical power sampling monitoring circuit comprises a controller, a driver, a laser, a PNP tube mirror image circuit, an NPN tube mirror image circuit, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor and a sixth resistor;
the controller is connected with the first end of the driver;
the second end of the driver is connected with the first end of the laser through the fourth resistor, the third end of the driver is connected with the second end of the laser, and the fourth end of the driver is connected with the first end of the PNP tube mirror image circuit through the first resistor;
the second end of the PNP tube mirror image circuit is connected with the third end of the laser through the fifth resistor;
the first end of the NPN tube mirror image circuit is connected between the driver and the PNP tube mirror image circuit through the second resistor, and is connected between the PNP tube mirror image circuit and the laser through the third resistor; and the second end of the NPN tube mirror image circuit is connected with the third end of the laser through the sixth resistor.
Further, in the high-compatibility optical power sampling monitoring circuit, the PNP transistor mirror circuit includes a first PNP transistor and a second PNP transistor;
the emitting electrode of the first PNP tube and the emitting electrode of the second PNP tube are connected in parallel and then are connected with the positive electrode of the power supply;
the collector and the base of the first PNP tube are respectively connected with the fifth resistor;
and the collector of the second PNP tube is connected with the second resistor, and the base of the second PNP tube is connected with the fifth resistor.
Further, in the high-compatibility optical power sampling monitoring circuit, the characteristics of the first PNP transistor and the second PNP transistor are consistent.
Further, in the high-compatibility optical power sampling monitoring circuit, the NPN transistor mirror circuit includes a first NPN transistor and a second NPN transistor;
the emitter of the first NPN tube and the emitter of the second NPN tube are connected in parallel and then are connected with the negative voltage conversion circuit; the negative voltage conversion circuit is used for generating a negative power supply voltage;
a collector of the first NPN tube is connected with the third resistor, and a base of the first NPN tube is connected with the sixth resistor;
and the collector and the base of the second NPN tube are respectively connected with the sixth resistor.
Further, in the high-compatibility optical power sampling monitoring circuit, the characteristics of the first NPN tube and the second NPN tube are consistent.
Further, in the high-compatibility optical power sampling monitoring circuit, the driver comprises a laser diode and a photodiode;
one end of the photodiode is grounded, and the other end of the photodiode is connected with the fifth resistor and the sixth resistor respectively;
the cathode of the laser diode is connected between the photodiode and the ground, and the anode of the laser diode is connected with the driver.
Further, in the high-compatibility optical power sampling monitoring circuit, the controller and the driver are connected through an I2C bus.
Furthermore, the high-compatibility optical power sampling monitoring circuit further comprises two pull-up resistors, namely a seventh resistor and an eighth resistor;
a first end of the seventh resistor is connected with a serial clock line in the I2C bus, and a second end of the seventh resistor is connected with a positive power supply voltage;
the eighth resistor has a first terminal connected to the serial data line in the I2C bus and a second terminal connected to a positive supply voltage.
The embodiment of the utility model provides a pair of high compatibility luminous power sampling monitoring circuit, circuit design simple structure has considered the function collocation of the different pin modes of laser instrument and driver, has realized the current sampling solution of different modes, does not need repeated beater, has increased product development platform compatibility, has reduced product development cost.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without inventive exercise.
Fig. 1 is a schematic structural diagram of a high-compatibility optical power sampling monitoring circuit provided by an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a high-compatibility optical power sampling monitoring circuit according to an embodiment of the present invention;
fig. 3 is a schematic flowchart of a monitoring method that can be implemented by the high-compatibility optical power sampling monitoring circuit according to an embodiment of the present invention.
Detailed Description
In order to make the objects, features and advantages of the present invention more obvious and understandable, the embodiments of the present invention are clearly and completely described with reference to the drawings in the embodiments of the present invention, and obviously, the embodiments described below are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
In the description of the present invention, it is to be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. When a component is referred to as being "disposed on" another component, it can be directly on the other component or intervening components may also be present.
Furthermore, the terms "long", "short", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships illustrated in the drawings, and are only for convenience of describing the present invention, but do not indicate or imply that the device or element referred to must have the specific orientation, operate in the specific orientation configuration, and thus, should not be construed as limiting the present invention.
The technical solution of the present invention is further explained by the following embodiments with reference to the accompanying drawings.
Example one
Referring to fig. 1 and 2, an embodiment of the present invention provides a high-compatibility optical power sampling monitoring circuit, including a controller, a driver, a laser, a PNP mirror image circuit, an NPN mirror image circuit, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor;
the controller is connected with the first end of the driver;
the second end of the driver is connected with the first end of the laser through the fourth resistor, the third end of the driver is connected with the second end of the laser, and the fourth end of the driver is connected with the first end of the PNP tube mirror image circuit through the first resistor;
the second end of the PNP tube mirror image circuit is connected with the third end of the laser through the fifth resistor;
the first end of the NPN tube mirror image circuit is connected between the driver and the PNP tube mirror image circuit through the second resistor, and is connected between the PNP tube mirror image circuit and the laser through the third resistor; and the second end of the NPN tube mirror image circuit is connected with the third end of the laser through the sixth resistor.
Wherein, the controller is connected with the driver through an I2C bus.
The driver comprises a laser diode and a photodiode;
one end of the photodiode is grounded, and the other end of the photodiode is connected with the fifth resistor and the sixth resistor respectively;
the cathode of the laser diode is connected between the photodiode and the ground, and the anode of the laser diode is connected with the driver.
It should be noted that, in the present invention, one of the functions, namely, the optical power monitoring function, is realized by configuring the Driver (i.e., the U3 in fig. 2) register through the I2C by the controller (i.e., the MCU, i.e., the U4 in fig. 2) to control the magnitude of the output bias current to drive the laser (J1) to emit light strongly and weakly, the optical power is sampled by the Photodiode (PD) and then input to the ADC of the Driver, and then the MCU reads the Driver ADC register through the I2C in real time and stores the Driver ADC register to the protocol storage address after conversion processing. When the emitter normally works, the test value of the optical power meter is Po, and K is taken as a fixed coefficient considering all other factors such as backlight current conversion efficiency and the like. The optical power is
PO＝Imonitor·K；
When a light emitter manufacturer produces the light emitter, the K value can be obtained through software calibration once, and the light power can be monitored in real time without cutting off light path measurement after system networking.
Another function is to constitute an APC function, and the process of maintaining the emitted light power stable is to control the light emission by setting a target monitor current and dynamically adjusting the Laser Diode (LD) bias current according to the backlight current of the sampling PD so that the sampling current approaches the target monitor current.
Because the drain of the I2C is open-circuited, it is preferable that the high-compatibility optical power sampling monitoring circuit must be provided with two pull-up resistors for realizing level inversion, namely a seventh resistor (R7) and an eighth resistor (R8);
a first end of the seventh resistor is connected with a serial clock line in the I2C bus, and a second end of the seventh resistor is connected with a positive power supply voltage of reference GND;
the first end of the eighth resistor is connected with the serial data line in the I2C bus, and the second end is connected with the positive power supply voltage of the reference GND.
In this embodiment, the PNP transistor mirror circuit (i.e., U1 in fig. 2) includes a first PNP transistor and a second PNP transistor;
the emitting electrode of the first PNP tube and the emitting electrode of the second PNP tube are connected in parallel and then are connected with the positive electrode of the power supply;
the collector and the base of the first PNP tube are respectively connected with the fifth resistor;
and the collector of the second PNP tube is connected with the second resistor, and the base of the second PNP tube is connected with the fifth resistor.
Wherein the first PNP tube and the second PNP tube have the same characteristics.
In this embodiment, the NPN transistor mirror circuit (i.e., U2 in fig. 2) includes a first NPN transistor and a second NPN transistor;
the emitter of the first NPN tube and the emitter of the second NPN tube are connected in parallel and then are connected with the negative voltage conversion circuit; the negative voltage converting circuit is used to generate a negative power supply voltage (i.e., generate a-Vcc voltage as in fig. 2, while the negative voltage converting circuit is not shown in fig. 2); specifically, a positive voltage is converted into a negative voltage through a charge pump chip; the positive electrode of the direct current power supply has high potential, the negative level has low potential, and the current flows from high potential to low potential; the positive and negative power supplies are relative values, typically referenced to ground at 0, above which the potential is positive and below which it is negative.
A collector of the first NPN tube is connected with the third resistor, and a base of the first NPN tube is connected with the sixth resistor;
and the collector and the base of the second NPN tube are respectively connected with the sixth resistor.
And the characteristics of the first NPN tube and the second NPN tube are consistent.
The utility model provides a monitor circuit design is earlier through NPN negative pressure geminate transistor mirror image output, again through PNP geminate transistor mirror image output, need reach the purpose that changes the current direction through 2 mirror images, and concrete principle explains as follows:
(1) when the anode of the PD is connected with GND, the cathode of the PD is used as a pin, and the pin is input into the driver sampling ADC through the current mirror Sink. At the moment, the circuit configuration is that the second resistor (R2), the third resistor (R3), the fourth resistor (R4) and the sixth resistor (R6) are disconnected, the PNP transistor mirror circuit works, and a driver current sampling Sink mode is supported.
The circuit principle analysis is calculated as follows:
the first PNP tube has the same characteristics as the two PNP tubesPressure drop U ofEBOAnd UECOAnd the first PNP tube always works in the amplification area. U of the first PNP pipe and the second PNP pipeEBOAnd therefore, the base current and the collector current of the first PNP tube and the second PNP tube are equal.
When β > 2, Imonitor＝IMPD＝IC。
(2) When the anode of the PD is connected with GND and the cathode is used as a pin, if the driver supports a Source current mode, a bias voltage can be directly provided for the PD, at the moment, the peripheral circuit is simplest, the circuit configuration is that a first resistor (R1), a second resistor (R2), a third resistor (R3), a fifth resistor (R5) and a sixth resistor (R6) are disconnected, and the mPD is directly driven through the driver current Source mode;
(3) when the cathode of the PD is connected with GND and the anode is used as a pin, a negative bias voltage needs to be provided to ensure that the PD can normally work. If the driver supports the ADC sampling of the Source output current, the circuit configuration is that the first resistor (R1), the third resistor (R3), the fourth resistor (R4) and the fifth resistor (R5) are disconnected, the negative-voltage NPN tube mirror image circuit works, and the Source mode of the current sampling of the driver is supported;
the circuit principle analysis is calculated as follows:
the voltage drop U of the first NPN tube is consistent due to the characteristics of the two NPN tubes (the first NPN tube and the second NPN tube)EBOAnd UECOAnd the first NPN tube always works in an amplification region. U due to the first NPN tube and the second NPN tubeEBOAnd therefore, the base current and the collector current of the first NPN tube and the second NPN tube are equal.
When β > 2, Imonitor＝IMPD＝IC。
(3) When the cathode of the PD is connected with GND and the anode is used as a pin, a negative bias voltage needs to be provided to ensure that the PD can normally work. If the driver supports Sink input current ADC sampling, the second resistor (R2), the fourth resistor (R4) and the fifth resistor (R5) are disconnected, the negative-voltage NPN tube mirror image circuit and the PNP tube mirror image circuit work, and a driver current sampling Sink mode is supported.
Specifically, the monitoring circuit provided in this embodiment may be used to implement a high-compatibility optical power sampling monitoring method, where the method specifically includes the following steps:
s201, judging whether a photodiode in the laser is grounded at an anode or a cathode, and judging whether the driver is in a Sink current sampling mode or a Source current sampling mode;
s202, when the anode of the photodiode is grounded and the driver is in a Sink current sampling mode, the second resistor, the third resistor, the fourth resistor and the sixth resistor are disconnected, and the PNP tube mirror image circuit works to support the Sink current sampling mode of the driver;
s203, when the anode of the photodiode is grounded and the driver is in a Source current sampling mode, disconnecting the first resistor, the second resistor, the third resistor, the fifth resistor and the sixth resistor, and directly driving the mPD through the Source current sampling mode of the driver;
s204, when the cathode of the photodiode is grounded and the driver is in a Source current sampling mode, the first resistor, the third resistor, the fourth resistor and the fifth resistor are disconnected, and the NPN tube mirror image circuit works to support the Source current sampling mode of the driver;
s205, when the cathode of the photodiode is grounded and the driver is in the Sink current sampling mode, the second resistor, the fourth resistor and the fifth resistor are disconnected, and the NPN tube mirror image circuit works to support the Sink current sampling mode of the driver.
The embodiment of the utility model provides a pair of high compatibility luminous power sampling monitoring circuit, circuit design simple structure has considered the function collocation of the different pin modes of laser instrument and driver, has realized the current sampling solution of different modes, does not need repeated beater, has increased product development platform compatibility, has reduced product development cost.
The foregoing description of the embodiments has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but, where applicable, are interchangeable and can be used in a selected embodiment, even if not specifically shown or described. The same elements or features may also vary in many respects. Such variations are not to be regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of the disclosure.
Example embodiments are provided so that this disclosure will be thorough and will fully convey the scope to those skilled in the art. Numerous details are set forth, such as examples of specific parts, devices, and methods, in order to provide a thorough understanding of embodiments of the present disclosure. It will be apparent to those skilled in the art that specific details need not be employed, that example embodiments may be embodied in many different forms and that neither should be construed to limit the scope of the disclosure. In certain example embodiments, well-known processes, well-known device structures, and well-known technologies are not described in detail.
The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms "comprises" and "comprising" are intended to be inclusive and therefore specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The method steps, processes, and operations described herein are not to be construed as necessarily requiring their performance in the particular order discussed and illustrated, unless explicitly indicated as an order of performance. It should also be understood that additional or alternative steps may be employed.
When an element or layer is referred to as being "on" … … "," engaged with "… …", "connected to" or "coupled to" another element or layer, it can be directly on, engaged with, connected to or coupled to the other element or layer, or intervening elements or layers may also be present. In contrast, when an element or layer is referred to as being "directly on … …," "directly engaged with … …," "directly connected to" or "directly coupled to" another element or layer, there may be no intervening elements or layers present. Other words used to describe the relationship of elements should be interpreted in a similar manner (e.g., "between … …" and "directly between … …", "adjacent" and "directly adjacent", etc.). As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. Although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms may be only used to distinguish one element, component, region or section from another element, component, region or section. Unless clearly indicated by the context, use of terms such as the terms "first," "second," and other numerical values herein does not imply a sequence or order. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the example embodiments.
Spatially relative terms, such as "inner," "outer," "below," "… …," "lower," "above," "upper," and the like, may be used herein for ease of description to describe a relationship between one element or feature and one or more other elements or features as illustrated in the figures. Spatially relative terms may be intended to encompass different orientations of the device in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the example term "below … …" can encompass both an orientation of facing upward and downward. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted.
Claims (8)
1. A high-compatibility optical power sampling monitoring circuit is characterized by comprising a controller, a driver, a laser, a PNP tube mirror image circuit, an NPN tube mirror image circuit, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor and a sixth resistor;
the controller is connected with the first end of the driver;
the second end of the driver is connected with the first end of the laser through the fourth resistor, the third end of the driver is connected with the second end of the laser, and the fourth end of the driver is connected with the first end of the PNP tube mirror image circuit through the first resistor;
the second end of the PNP tube mirror image circuit is connected with the third end of the laser through the fifth resistor;
the first end of the NPN tube mirror image circuit is connected between the driver and the PNP tube mirror image circuit through the second resistor, and is connected between the PNP tube mirror image circuit and the laser through the third resistor; and the second end of the NPN tube mirror image circuit is connected with the third end of the laser through the sixth resistor.
2. The high-compatibility optical power sampling monitoring circuit according to claim 1, wherein the PNP transistor mirror circuit includes a first PNP transistor and a second PNP transistor;
the emitting electrode of the first PNP tube and the emitting electrode of the second PNP tube are connected in parallel and then are connected with the positive electrode of the power supply;
the collector and the base of the first PNP tube are respectively connected with the fifth resistor;
and the collector of the second PNP tube is connected with the second resistor, and the base of the second PNP tube is connected with the fifth resistor.
3. The optical power sampling monitor circuit of claim 2, wherein the first PNP transistor and the second PNP transistor have the same characteristics.
4. The high-compatibility optical power sampling monitoring circuit according to claim 2, wherein the NPN transistor mirror circuit includes a first NPN transistor and a second NPN transistor;
the emitter of the first NPN tube and the emitter of the second NPN tube are connected in parallel and then are connected with the negative voltage conversion circuit; the negative voltage conversion circuit is used for generating a negative power supply voltage;
a collector of the first NPN tube is connected with the third resistor, and a base of the first NPN tube is connected with the sixth resistor;
and the collector and the base of the second NPN tube are respectively connected with the sixth resistor.
5. The circuit of claim 4, wherein the first NPN transistor and the second NPN transistor have the same characteristics.
6. The high compatibility optical power sampling monitoring circuit of claim 1, wherein the driver comprises a laser diode and a photodiode;
one end of the photodiode is grounded, and the other end of the photodiode is connected with the fifth resistor and the sixth resistor respectively;
the cathode of the laser diode is connected between the photodiode and the ground, and the anode of the laser diode is connected with the driver.
7. The optical power sampling monitor circuit according to claim 1, wherein the controller and the driver are connected via an I2C bus.
8. The optical power sampling monitoring circuit according to claim 7, further comprising two pull-up resistors, a seventh resistor and an eighth resistor;
a first end of the seventh resistor is connected with a serial clock line in the I2C bus, and a second end of the seventh resistor is connected with a positive power supply voltage;
the eighth resistor has a first terminal connected to the serial data line in the I2C bus and a second terminal connected to a positive supply voltage.
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