CN211125642U - Multi-chip structure - Google Patents

Multi-chip structure Download PDF

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Publication number
CN211125642U
CN211125642U CN201922028197.0U CN201922028197U CN211125642U CN 211125642 U CN211125642 U CN 211125642U CN 201922028197 U CN201922028197 U CN 201922028197U CN 211125642 U CN211125642 U CN 211125642U
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China
Prior art keywords
chip
mounting groove
base plate
electrically connected
connection
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Active
Application number
CN201922028197.0U
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Chinese (zh)
Inventor
刘新华
杨明
雷潇鹏
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Shenzhen City Sinomarc Semiconductor Technology Co ltd
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Shenzhen City Sinomarc Semiconductor Technology Co ltd
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Priority to CN201922028197.0U priority Critical patent/CN211125642U/en
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Abstract

The utility model discloses a multi-chip structure, including the packaging body, the inside bottom tiling of packaging body is installed the base plate, and packaging structure well base plate chooses for use copper alloy or aluminum alloy material, and printed circuit board has been installed to its upper surface for realize the series connection of a plurality of chips, the left side department shaping of base plate surface has first mounting groove, and the tiling is installed first chip in the first mounting groove inside, and carries out electric connection between first chip and the base plate, the right side department shaping of base plate surface has the second mounting groove, and the tiling is installed the second chip in the second mounting groove inside, and carries out electric connection between second chip and the base plate; the utility model has the advantages that: through the setting of being connected first chip and second chip, improve interconnection convenience, can provide good control output for the lamp decoration simultaneously, promote the performance of lamp decoration.

Description

Multi-chip structure
Technical Field
The utility model belongs to the technical field of the lamp decoration and specifically relates to a multichip structure is related to.
Background
The lamp decoration, namely the artificial lighting apparatus using electricity as energy, also is a kind of ornament in people's room, the lamp decoration can change electricity into light, has promoted the progress of the human civilization greatly, the common lamp decoration kind has incandescent lamp, fluorescent lamp, L ED lamp, however because the fluorescent tube of some lamp decorations is more, only installs a control chip in the lamp decoration inside, can be easy wire part lamp tube can't work, can't reach the lamp decoration and play the illumination and the effect of decorating, propose a multichip structure for this reason.
SUMMERY OF THE UTILITY MODEL
The utility model discloses an it is not enough to overcome above-mentioned condition, aims at providing the technical scheme that can solve above-mentioned problem.
The utility model provides a multichip structure, includes the packaging body, the inside bottom tiling of packaging body installs the base plate, and packaging structure well base plate chooses for use copper alloy or aluminum alloy material, and printed circuit board has been installed to its upper surface for realize the series connection of a plurality of chips, the left side department shaping on substrate surface has first mounting groove, and the inside tiling of first mounting groove installs first chip to carry out electric connection between first chip and the base plate, the right side department shaping on substrate surface has the second mounting groove, and the inside tiling of second mounting groove installs the second chip, and carries out electric connection between second chip and the base plate.
Preferably, the left side and the right side of the bottom surface in the first mounting groove are respectively formed with a first connection base point; the left side and the right side of the bottom surface of the first chip are respectively electrically connected with a second pin, and the second pins are in welding connection with the first connection base points, so that the first chip is electrically connected with the substrate.
Preferably, the left side and the right side of the bottom surface in the second mounting groove are respectively formed with a second connection base point; and the left side and the right side of the bottom surface of the second chip are respectively electrically connected with a third pin, and the third pins are in welding connection with the second connection base points, so that the second chip is electrically connected with the substrate.
Preferably, the left side of the first chip is electrically connected to a wire, and the first chip is electrically connected to the second chip through the wire.
Preferably, the left side and the right side of the bottom surface of the package body are respectively provided with a first pin, and the top end of the first pin penetrates through the bottom surface of the package body in a sealing manner and is electrically connected with the bottom surface of the substrate.
Compared with the prior art, the beneficial effects of the utility model are that: through the setting of being connected first chip and second chip, improve interconnection convenience, can provide good control output for the lamp decoration simultaneously, promote the performance of lamp decoration.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
FIG. 1 is a schematic diagram of a multi-chip structure;
FIG. 2 is a schematic structural diagram of a first chip;
FIG. 3 is a schematic diagram of another structure of the first chip;
FIG. 4 is a schematic structural diagram of a second chip;
FIG. 5 is a schematic diagram of another structure of a second chip;
fig. 6 is a schematic structural view of a substrate.
Shown in the figure: 1. the package body, 2, the base plate, 3, first pin, 4, first chip, 5, wire, 6, second chip, 7, second pin, 8, third pin, 9, first mounting groove, 10, first connection base point, 11, second mounting groove, 12, second connection base point.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Please refer to fig. 1-6, in an embodiment of the present invention, a multi-chip structure, includes a package body 1, a substrate 2 is installed in the tiling of the inner bottom of the package body 1, and the substrate 2 selects copper alloy or aluminum alloy material for use in the package structure, and a printed circuit board is installed on the upper surface of the substrate for realizing the series connection of a plurality of chips, a first mounting groove 9 is formed on the left side of the surface of the substrate 2, a first chip 4 is installed in the tiling of the inner portion of the first mounting groove 9, and an electric connection is performed between the first chip 4 and the substrate 2, a second mounting groove 9 is formed on the right side of the surface of the substrate 2, and a second chip 6 is installed in the tiling of the inner portion of the second mounting groove 9, and an electric connection is performed.
First connection base points 10 are respectively formed on the left side and the right side of the bottom surface in the first mounting groove 9; the left side and the right side of the bottom surface of the first chip 4 are respectively electrically connected with a second pin 7, and the second pin 7 is connected with the first connection base point 10 by welding, so that the first chip 4 is electrically connected with the substrate 2.
Second connection base points 12 are respectively formed on the left side and the right side of the bottom surface in the second mounting groove 11; the left side and the right side of the bottom surface of the second chip 6 are respectively electrically connected with a third pin 8, and the third pin 8 is connected with a second connection base point 12 by welding, so that the second chip 6 is electrically connected with the substrate 2.
The left side of the first chip 4 is electrically connected with a wire 5, and the first chip 4 is electrically connected with the second chip 6 through the wire 5, so that data transmission among a plurality of chips is performed.
First pin 3 is installed respectively to the left and right sides of packaging body 1 bottom surface, and the sealed bottom surface that runs through packaging body 1 in top of first pin 3 and carry out electric connection with the bottom surface of base plate 2 to make packaging body 1 carry out electric connection through first pin 3 and the circuit board on the lamp decoration, so that use.
It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims (5)

1. The utility model provides a multi-chip structure, includes the packaging body, its characterized in that, the inside bottom tiling of packaging body installs the base plate, and among the packaging structure base plate chooses for use copper alloy or aluminum alloy material, and printed circuit board has been installed to its upper surface for realize the series connection of a plurality of chips, the left side department shaping of substrate surface has first mounting groove, and the inside tiling of first mounting groove installs first chip to carry out electric connection between first chip and the base plate, the right side department shaping of substrate surface has the second mounting groove, and the inside tiling of second mounting groove installs the second chip, and carry out electric connection between second chip and the base plate.
2. The multi-chip structure according to claim 1, wherein the first mounting groove is formed with first connection base points on left and right sides of the bottom surface thereof; the left side and the right side of the bottom surface of the first chip are respectively electrically connected with a second pin, and the second pins are in welding connection with the first connection base points, so that the first chip is electrically connected with the substrate.
3. The multi-chip structure according to claim 1, wherein the second mounting groove is formed with second connection base points on the left and right sides of the bottom surface inside; and the left side and the right side of the bottom surface of the second chip are respectively electrically connected with a third pin, and the third pins are in welding connection with the second connection base points, so that the second chip is electrically connected with the substrate.
4. The multi-chip structure of claim 1, wherein the first chip is electrically connected to the second chip by a wire.
5. The multi-chip structure of claim 1, wherein the first leads are mounted on the left and right sides of the bottom surface of the package body, and the top ends of the first leads penetrate through the bottom surface of the package body in a sealing manner and are electrically connected to the bottom surface of the substrate.
CN201922028197.0U 2019-11-22 2019-11-22 Multi-chip structure Active CN211125642U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201922028197.0U CN211125642U (en) 2019-11-22 2019-11-22 Multi-chip structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201922028197.0U CN211125642U (en) 2019-11-22 2019-11-22 Multi-chip structure

Publications (1)

Publication Number Publication Date
CN211125642U true CN211125642U (en) 2020-07-28

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201922028197.0U Active CN211125642U (en) 2019-11-22 2019-11-22 Multi-chip structure

Country Status (1)

Country Link
CN (1) CN211125642U (en)

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