CN210804406U - Auxiliary test device based on SPI simulation acquisition chip - Google Patents

Abstract

The utility model discloses an auxiliary testing device based on an SPI analog acquisition chip, which belongs to the technical field of power batteries and electric vehicles. The test device of the utility model adopts the analog acquisition chip to replace the real physical circuit, and directly transmits the test signal to the BAU, thereby avoiding various problems of the physical circuit in the actual test process; at the same time, the device does not need complicated battery connections, which simplifies the The construction process of the test environment; using the CAN communication bus, the modified value of the register sent by the PC is received and stored in the memory, so as to realize the function of controlling the register from the PC side, so that the automatic test can be realized and the test efficiency is improved. The test device uses the memory RAM to simulate the register of the acquisition chip. When the register modification command sent by the PC is not received, the voltage value and temperature value read by the BAU terminal remain unchanged, which improves the stability of the test and makes the test device in some Boundary conditions play an important role in testing occasions.

Description

An auxiliary test device based on SPI analog acquisition chip

technical field

The utility model relates to the technical field of power batteries and electric vehicles, in particular to an auxiliary testing device based on an SPI analog acquisition chip.

Background technique

Electric vehicle is a complex electrical system. Its electrical system is divided into low-voltage part and high-voltage part. The low-voltage part supplies power to electronic equipment (such as lights, wipers, speakers and other low-voltage electrical equipment) in the car. Generally, 12V/24V power supply is used. The negative pole is directly connected to the vehicle chassis; the high-voltage part supplies power to the vehicle's power system (such as motor controller, vehicle-mounted DC-DC power converter, etc.); Each battery is formed in series and managed and controlled using a dedicated battery management system.

The battery management system (BMS for short) is usually composed of a battery monitoring unit (BMU for short) and a battery control unit (BCU for short). Combining the two into one, they form an integrated BMS (BAU for short). Since the BAU still needs to monitor the voltage and temperature of each string of single cells, it is necessary to provide the same amount of cell voltage and cell temperature externally when verifying the battery management strategy. For the purpose of stimulating the system for verification, it is common practice to use dedicated HIL equipment, or a self-made test bench to simulate battery voltage and battery temperature. For the test of the single voltage, the real voltage needs to be output through the HIL device or the bench; for the test of the single temperature, it is necessary to check the temperature table in advance to find the resistance value at the corresponding temperature, then adjust the sliding resistor, and confirm the resistance value with a multimeter Then connect the sliding resistor to the temperature acquisition circuit; or use a complex resistance matrix, switch the resistance switch through the relay, and switch the prepared resistance to the temperature acquisition circuit. However, using the above method needs to build a real physical circuit, the circuit is complex and there are problems: (1) simulating the voltage output of the monomer, there are problems of low precision and slow response; (2) simulating the temperature output of the monomer, it is necessary to query the temperature table, There are problems that the temperature cannot be adjusted in real time and the output temperature value is discontinuous; (3) Affected by the ambient temperature, the resistance has a temperature drift problem, which will affect the test results.

After retrieval, the Chinese patent number is ZL201410196149.1, the name of the invention is: a BMS verification and monitoring system and its method, the application date is: May 11, 2014, the BMS verification and monitoring system disclosed in the application includes the host computer and A single voltage analog unit, a temperature analog unit, an insulation resistance analog unit, a total current analog unit, a digital analog unit, and an overvoltage and undervoltage detection unit connected to the host computer through the CAN bus respectively; the BMS verification monitoring method disclosed in this application, Including single voltage test steps, temperature test steps, digital I/O test steps, battery pack insulation resistance test steps, system overvoltage test steps and total current simulation test steps; this application can test the comprehensive performance of BMS and verify Its function; however, in the temperature test, the application still needs to build a real physical circuit, which cannot solve the problems that may occur in the test of the real physical circuit; at the same time, the application sets up multiple test units to test different functions of the BMS. It makes the system structure complex and inconvenient to build.

SUMMARY OF THE INVENTION

1. Technical problems to be solved by the utility model

In view of the fact that the testing of BAU in the prior art generally uses special HIL equipment or self-made test benches, it is necessary to build a real physical circuit, and the existing real circuit has low output precision of analog monomer voltage and slow response speed when testing BAU. The temperature output of the simulated monomer cannot adjust the temperature in real time, and the output temperature value is discontinuous. Affected by the ambient temperature, the resistance has temperature drift, which leads to the problem of inaccurate test results. The utility model provides an auxiliary test based on an SPI analog acquisition chip. The device uses the analog acquisition chip to replace the real physical circuit, and directly transmits the test data signal to the BAU, avoiding various problems of the physical circuit in the actual test process.

2. Technical solutions

In order to achieve the above object, the technical scheme provided by the present utility model is:

The utility model is an auxiliary testing device based on an SPI analog acquisition chip, comprising a control module, a test module and a signal acquisition module. The control module is electrically connected with the test module to monitor the state of the test module; the signal acquisition modules are respectively It is electrically connected with the control module and the test module, receives the instructions transmitted by the control module and the test module and gives feedback; the signal acquisition module includes an SPI level conversion circuit, an embedded microprocessor MCU and a CAN communication circuit, and the embedded The type microprocessor MCU is electrically connected to the test module through the SPI level conversion circuit, and is also electrically connected to the control module through the CAN communication circuit.

Further, the control module adopts a PC, and is connected to the test module and the signal acquisition module respectively through a USB-CAN conversion device.

Further, the SPI level conversion circuit includes a voltage level conversion chip U1; the Vref_A pin of the voltage level conversion chip U1 is connected to the 3.3V power supply, and the A1, A2, A3, and A4 pins are divided into two channels. , one way is connected to 3.3V power supply through resistors R4, R3, R2, R1 respectively, the other way is connected to MCU through resistors R5, R6, R7, R8 respectively; Vref_B pin is connected to 5V power supply, B1, B2, B3, B4 leads The pins are divided into two channels, one is connected to the 5V power supply through the resistors R9, R10, R11, R12, and the other is connected to the BCU through the resistors R14, R15, R16, R17; the EN pin is connected to the 5V power supply through the resistor R13, and the GND leads feet grounded.

Further, the SPI level conversion circuit also includes two dual power bus transceiver chips U2 and U3; on the dual power bus transceiver chip U2, the VCCA pin is connected to the 3.3V power supply, the VCCB pin is connected to the 5V power supply, and the pin is connected to the 5V power supply. A is connected to MCU, pin B is connected to BCU, GND pin is grounded, DIR pin is connected to VCCB pin of dual power bus transceiver chip U3 through resistor R18; on dual power bus transceiver chip U3, VCCA pin is connected to 3.3V Power supply, VCCB pin is connected to 5V power supply, pin A is connected to MCU, pin B is connected to BCU, GND pin is grounded, and DIR pin is grounded through resistor R19.

Further, the CAN communication circuit includes a CAN transceiver chip U4, on which the TXD pin and the RXD pin are connected to the MCU, the VCC pin is connected to the 3.3V power supply, and the GND pin is grounded; Resistor R20 is grounded; CANH, CANL, VRef pins are grounded through capacitors C3, C2, and C1, respectively. At the same time, CANH and CANL pins are connected to USB-CAN conversion through terminals 1, 2, 3, and 4 of common mode inductor L1, respectively. equipment.

Further, the signal acquisition module further includes a memory RAM for storing data transmitted by the control module; the memory RAM is electrically connected with the embedded microprocessor MCU.

Further, the model of the voltage level conversion chip U1 is LSF0204PWR; the model of the two dual-power bus transceiver chips U2 and U3 is SN65HVD230QD; the model of the USB-CAN conversion device is USBCAN-II; the CAN transceiver chip U4 The model number is SN65HVD230QD.

3. Beneficial effects

Using the technical solution provided by the present utility model, compared with the existing known technology, has the following remarkable effects:

(1) In view of the fact that a real physical circuit needs to be built for the BAU test in the prior art, there will be low output precision of the analog cell voltage, slow response speed, the temperature output of the analog cell cannot be adjusted in real time, and the output temperature value is discontinuous. Due to the influence of ambient temperature, the resistance has temperature drift, which leads to the problem of inaccurate test results. The utility model provides an auxiliary test device based on an SPI analog acquisition chip, which adopts the analog acquisition chip to replace the real physical circuit and directly transmits the test data signal to the BAU. , which avoids various problems in the actual testing process of the physical circuit; at the same time, the device does not require complicated battery connections, which greatly simplifies the construction process of the testing environment and reduces the testing cost.

(2) in view of the mismatch between the existing acquisition chip and the BAU internal program, if the acquisition chip is used, the internal program of the BAU needs to be reprogrammed, the use process is complicated, time-consuming and labor-intensive, the auxiliary test device of the present utility model utilizes the SPI level conversion circuit , embedded microprocessor MCU and CAN communication circuit replace the acquisition chip, receive the acquisition instruction sent by the BAU, and respond to the acquisition instruction, the use process is simple, and the work cost is saved.

(3) The auxiliary test device of the present utility model utilizes the CAN communication bus to receive the register modification command sent by the PC, and save the modified value in the memory, so as to realize the function of controlling the register from the PC end, so that the automatic test can be realized, thereby optimizing the The test method improves the test efficiency.

(4) The auxiliary test device of the present utility model utilizes the memory RAM to simulate the register of the acquisition chip, and when the register modification command sent by the PC is not received, the value of the register is always kept unchanged, that is, the voltage value and the temperature read by the BAU end The value remains unchanged, which makes the test data controllable and improves the stability of the test, especially in some test occasions with boundary conditions, it plays an important role.

Description of drawings

Fig. 1 is the module block diagram of the utility model testing device;

Fig. 2 is the data communication schematic diagram of the utility model testing device;

Fig. 3 is the SPI level conversion circuit diagram in the utility model;

Fig. 4 is the CAN communication circuit circuit diagram in the utility model;

Fig. 5 is the flow chart of SPI communication receiving and processing in the utility model;

Fig. 6 is the execution control command program flow diagram of the SPI communication command execution flow in the utility model;

Fig. 7 is the write configuration register program flow diagram of the SPI communication command execution flow in the utility model;

Fig. 8 is the read configuration register program flow diagram of the SPI communication command execution flow in the utility model;

Fig. 9 is the program flow diagram of reading and collecting data register of SPI communication command execution flow in the utility model;

Fig. 10 is the SPI transmission buffer processing flow block diagram in the utility model;

FIG. 11 is a block diagram of the CAN communication program flow in the utility model.

Detailed ways

In order to further understand the content of the present utility model, the present utility model is described in detail with reference to the accompanying drawings and embodiments.

Example 1

This embodiment provides an auxiliary test device based on an SPI analog acquisition chip, which is used to solve the problem that the excitation signal is difficult to accurately control during the current BAU verification.

Referring to FIG. 1 , the auxiliary test device of this embodiment includes a control module, a test module and a signal acquisition module, and the control module is electrically connected with the test module to monitor the state of the test module. The signal acquisition module is electrically connected with the control module and the test module respectively, receives the instructions transmitted by the control module and the test module and gives feedback. Among them, 105 is a test module, that is, the BAU device to be tested; 106 is a control module, and a PC is used as the control module in this embodiment. The control module is connected with the signal acquisition module and the test module respectively through the USB-CAN conversion devices 107 and 108 . The model of the USB-CAN conversion device is USBCAN-II.

The signal acquisition module includes an SPI level conversion circuit, an embedded microprocessor MCU, a memory RAM and a CAN communication circuit, wherein 101 is an embedded microprocessor (MCU) supporting SPI communication and CAN communication; 102 is an SPI level Conversion circuit; 103 is a memory RAM electrically connected to the embedded microprocessor MCU, used for storing data transmitted by the control module; in this embodiment, the memory RAM is an on-chip random access memory of the MCU; 104 is a CAN communication circuit. The embedded microprocessor MCU is electrically connected with the test module through the SPI level conversion circuit, and is electrically connected with the control module through the CAN communication circuit. The auxiliary test device of this embodiment replaces the ISL78600 acquisition chip by using the SPI level conversion circuit, the embedded microprocessor MCU and the CAN communication circuit, receives the acquisition instruction sent by the BAU, and responds to the acquisition instruction, the use process is simple, and the work cost is saved , to avoid the problem of incompatibility with the BAU internal program caused by the use of the ISL78600 acquisition chip.

Referring to Fig. 3, in the auxiliary test device of this embodiment, since the logic level of the MCU used is 3.3V, and the logic level of the BCU is 5V, the logic level conversion needs to be performed between the two, in order to realize the 3.3V level and the 5V level For the mutual conversion of levels, the SPI level conversion circuit is used to convert the levels. Since the ISL78600 chip uses a total of 6 signals, this circuit uses a voltage level conversion chip LSF0204PWR to complete the SPI signal level conversion, and the other two DREADY signals and EN signals are completed by two dual power bus transceiver chips SN74LVC1T45 complete the level conversion .

The SPI level conversion circuit includes a voltage level conversion chip U1 and two dual power bus transceiver chips U2 and U3. The model of the voltage level conversion chip U1 is LSF0204PWR; the model of the two dual-power bus transceiver chips U2 and U3 is SN65HVD230QD. Its specific circuit is as follows:

The Vref_A pin of the voltage level conversion chip U1 is connected to the 3.3V power supply. The A1, A2, A3, and A4 pins are divided into two channels. One channel is connected to the 3.3V power supply through the resistors R4, R3, R2, and R1. Resistors R5, R6, R7, R8 are connected to MCU; Vref_B pin is connected to 5V power supply, B1, B2, B3, B4 pins are divided into two channels, one is connected to 5V power supply through resistors R9, R10, R11, R12, and the other is connected to 5V power supply. One way is connected to the BCU through resistors R14, R15, R16, R17 respectively; the EN pin is connected to the 5V power supply through the resistor R13, and the GND pin is grounded. On the dual power bus transceiver chip U2, the VCCA pin is connected to the 3.3V power supply, the VCCB pin is connected to the 5V power supply, the pin A is connected to the MCU, the pin B is connected to the BCU, the GND pin is grounded, and the DIR pin is connected to the resistor R18. The VCCB pin of the dual power bus transceiver chip U3. On the dual power bus transceiver chip U3, the VCCA pin is connected to the 3.3V power supply, the VCCB pin is connected to the 5V power supply, the pin A is connected to the MCU, the pin B is connected to the BCU, the GND pin is grounded, and the DIR pin is grounded through the resistor R19.

Referring to FIG. 4 , the CAN communication circuit of this embodiment includes a CAN transceiver chip U4, and the model of the CAN transceiver chip is SN65HVD230QD. On this chip, TXD pin and RXD pin are connected to MCU, VCC pin is connected to 3.3V power supply, GND pin is grounded; pin Rs is grounded through resistor R20; CANH, CANL, VRef pins are connected to capacitor C3, C2 respectively , C1 is grounded, at the same time, the CANH and CANL pins are connected to the USB-CAN conversion device through the 1, 2 and 3, 4 ends of the common mode inductor L1 respectively.

Referring to FIG. 2 , the communication flow of the auxiliary testing device in this embodiment is as follows: the BAU sends an operation instruction 201 through the SPI, and reads the value of the register 1 in 205 . After the MCU reads the data, it sends the response data 202, that is, the value of register 1 in 205, to the BAU through the SPI. During the test, the PC sends a modification command 203 through CAN to modify the value of register 1 in 205 . After the MCU modifies the data successfully, it sends the response data 204 to the PC through CAN, indicating that the value of the register 1 in 205 is successfully modified. 205 is a storage area for storing register values in this embodiment, that is, a part of the memory RAM.

In the actual test, the acquisition task will be started after the BAU is started, and the acquisition command 201 will be sent to the MCU through the SPI. After the MCU receives the acquisition command 201, it parses the protocol content. The parsed command is to read the value of register 1 in 205. Then the MCU reads the value of register 1 from the memory RAM and packs the value of register 1 into the response data 202. , sent to the BAU through SPI, and the BAU reads the value of register 1. The register 1 may be a voltage register, a temperature register, and a fault register, and the operation mode is the same as the above-mentioned mode, which will not be repeated here.

In order to adjust data such as voltage value and temperature value according to the test requirements, in this embodiment, the control module PC sends a request 203 for modifying register 1 to the MCU through CAN communication. When the MCU receives the request data, it changes the protocol content. After parsing, the parsed command is to modify the value of register 1 in 205. The MCU stores the parsed value of register 1 in the memory RAM, and packs the result of the command execution into the response data 204, and sends it to the PC through CAN communication. machine. Thus, the PC completes the command for modifying the value of register 1, wherein register 1 may be a voltage register, a temperature register, or a fault register, and the operation mode is the same as the above-mentioned mode, which will not be repeated here. At the same time, the PC reads the real-time status of the BAU through CAN communication, and then judges whether its strategy meets expectations. The device of this embodiment implements a closed loop of test logic. The specific implementation cases are as follows:

To verify whether the BAU disconnects the function of the relay when the cell voltage is 3.8V, first package the command to modify the cell voltage to 3.8V according to the protocol, and then send it to the MCU through CAN communication. After the MCU receives the modification command, it will The value of the voltage register is modified to 3.8V. When the next acquisition cycle of the BAU arrives, the BAU sends an instruction to read the voltage register to the MCU through SPI. At this time, the MCU will package the value of the voltage register that has taken effect according to the protocol and then pass the SPI through the package. Sent to BAU. After receiving the new voltage value, the BAU finally disconnects the relay through a series of internal logic operations, thus judging that this function is in line with expectations.

The workflow of the embedded software in this embodiment can be divided into two parts: SPI communication and CAN communication. The SPI communication is divided into the following main processes:

1. SPI reception processing flow (see Figure 5);

2. SPI command execution flow: a. Execute the control command (see Figure 6); b. Write the configuration register (see Figure 7); c. Read the configuration register (see Figure 8); d. Read the acquisition data register (see Figure 9) );

3. SPI send buffer processing flow (see Figure 10).

With reference to Figure 11, the CAN communication process is that after the CAN transceiver chip receives the signal, it sequentially judges whether the command is: a voltage modification command, a current modification command, a cable fault modification command or a balanced state reading command, and after the judgment is completed, the signal is It is transmitted to the MCU to proceed to the next step.

An auxiliary test device based on an SPI analog acquisition chip in this embodiment adopts an analog acquisition chip instead of a real physical circuit, and directly transmits test data signals to the BAU, thereby avoiding various problems arising from the physical circuit in the actual test process; at the same time, the device There is no need for complicated battery connections, which greatly simplifies the construction process of the test environment and reduces the test cost. At the same time, the CAN communication bus is used to receive the register modification command sent by the PC, and the modified value is saved in the memory to realize the function of controlling the register from the PC side, so that the automatic test can be realized, thereby optimizing the test method and improving the test efficiency. The test device uses the memory RAM to simulate the register of the acquisition chip. When the register modification command sent by the PC is not received, the value of the register is always kept unchanged, that is, the voltage value and temperature value read by the BAU terminal remain unchanged, so that the test data It is controllable, improves the stability of the test, and makes the test device play an important role in the test occasions of some boundary conditions.

The present invention and its embodiments have been schematically described above, and the description is not restrictive, and what is shown in the accompanying drawings is only one of the embodiments of the present invention, and the actual structure is not limited thereto. Therefore, if those of ordinary skill in the art are inspired by it, without departing from the purpose of creation of the present invention, without creative design of the structure and embodiment similar to the technical solution, all should belong to the present invention. protected range.

Claims (7)

1. An auxiliary testing device based on an SPI analog acquisition chip comprises a control module and a test module, wherein the control module is electrically connected with the test module and used for monitoring the state of the test module; the method is characterized in that: the device also comprises a signal acquisition module which is respectively and electrically connected with the control module and the test module, receives the instructions transmitted by the control module and the test module and feeds back the instructions; the signal acquisition module comprises an SPI level switching circuit, an embedded microprocessor MCU and a CAN communication circuit, wherein the embedded microprocessor MCU is electrically connected with the test module through the SPI level switching circuit and is electrically connected with the control module through the CAN communication circuit.

2. The auxiliary test device based on the SPI analog acquisition chip of claim 1, characterized in that: the control module adopts a PC and is respectively connected with the test module and the signal acquisition module through a USB-CAN conversion device.

3. The auxiliary test device based on the SPI analog acquisition chip according to claim 1 or 2, characterized in that: the SPI level conversion circuit comprises a voltage level conversion chip U1; the Vref _ A pin of the voltage level conversion chip U1 is connected with a 3.3V power supply, the pins A1, A2, A3 and A4 are divided into two paths, one path is connected to the 3.3V power supply through resistors R4, R3, R2 and R1, and the other path is connected to the MCU through resistors R5, R6, R7 and R8; the Vref _ B pin is connected with a 5V power supply, the pins B1, B2, B3 and B4 are divided into two paths, one path is connected to the 5V power supply through resistors R9, R10, R11 and R12, and the other path is connected to a BCU through resistors R14, R15, R16 and R17; the EN pin is connected to a 5V power supply through a resistor R13, and the GND pin is grounded.

4. The auxiliary test device based on the SPI analog acquisition chip of claim 3, characterized in that: the SPI level switching circuit also comprises two pieces of dual-power bus transceiver chips U2 and U3; on the dual-power bus transceiving chip U2, a VCCA pin is connected with a 3.3V power supply, a VCCB pin is connected with a 5V power supply, a pin A is connected to the MCU, a pin B is connected to the BCU, a GND pin is grounded, and a DIR pin is connected to a VCCB pin of the dual-power bus transceiving chip U3 through a resistor R18; on the dual power bus transceiver chip U3, the VCCA pin is connected with a 3.3V power supply, the VCCB pin is connected with a 5V power supply, the pin A is connected with the MCU, the pin B is connected with the BCU, the GND pin is grounded, and the DIR pin is grounded through a resistor R19.

5. The auxiliary test device based on the SPI analog acquisition chip according to claim 4, characterized in that: the CAN communication circuit comprises a CAN transceiver chip U4, wherein on the chip, a TXD pin and an RXD pin are both connected to the MCU, a VCC pin is connected with a 3.3V power supply, and a GND pin is grounded; pin Rs is grounded through resistor R20; pins CANH, CANL and VRef are grounded through capacitors C3, C2 and C1 respectively, and meanwhile, pins CANH and CANL are connected to the USB-CAN conversion equipment through terminals 1 and 2, and terminals 3 and 4 of a common mode inductor L1 respectively.

6. The auxiliary test device based on the SPI analog acquisition chip according to claim 5, characterized in that: the signal acquisition module also comprises a memory RAM used for storing the data transmitted by the control module; the memory RAM is electrically connected with the embedded microprocessor MCU.

7. The auxiliary test device based on the SPI analog acquisition chip of claim 6, characterized in that: the voltage level conversion chip U1 is LSF0204 PWR; the two-piece dual-power bus transceiver chip has models of SN65HVD230QD, U2 and U3; the USB-CAN conversion equipment is USBCAN-II in model number; the CAN transceiver chip U4 is model SN65HVD230 QD.

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