CN210294465U - Superconducting chip low temperature testing arrangement - Google Patents

Superconducting chip low temperature testing arrangement Download PDF

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CN210294465U
CN210294465U CN201920847926.2U CN201920847926U CN210294465U CN 210294465 U CN210294465 U CN 210294465U CN 201920847926 U CN201920847926 U CN 201920847926U CN 210294465 U CN210294465 U CN 210294465U
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chip
superconducting
joint
tested
temperature
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李建国
洪国同
梁惊涛
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Technical Institute of Physics and Chemistry of CAS
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Technical Institute of Physics and Chemistry of CAS
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Abstract

本实用新型提供的超导芯片低温测试装置,包括:接头安装盒、密封法兰、线缆引出管、安装支架、设置于所述安装支架上的至少一芯片安装座模块,任意一所述芯片安装座模块上固定有一待测试芯片,所述线缆引出管的两端分别连接所述接头安装盒及所述安装支架,所述接头安装盒上设有与待测试芯片管脚数量一致的接头,所述接头通过线缆与常温下的测试设备相连接;所述密封法兰设置在所述接头安装盒和所述安装支架之间,且所述密封法兰可沿所述线缆引出管滑动,本实用新型提供的超导芯片低温测试装置,通过设置在安装支架上独立的芯片安装座模块,可以实现多芯片同时测量,安装简单,操作方便,测量准确,测量效率高。

Figure 201920847926

The low-temperature testing device for superconducting chips provided by the utility model includes: a joint installation box, a sealing flange, a cable lead-out pipe, an installation bracket, and at least one chip mounting base module arranged on the installation bracket, any one of the chip A chip to be tested is fixed on the mounting base module, and both ends of the cable outlet pipe are respectively connected to the connector mounting box and the mounting bracket, and the connector mounting box is provided with the same number of pins as the number of pins of the chip to be tested. , the joint is connected to the test equipment at room temperature through a cable; the sealing flange is arranged between the joint installation box and the installation bracket, and the sealing flange can be along the cable outlet pipe Sliding, the low temperature testing device for superconducting chips provided by the utility model can realize the simultaneous measurement of multiple chips by setting the independent chip mounting base module on the mounting bracket, with simple installation, convenient operation, accurate measurement and high measurement efficiency.

Figure 201920847926

Description

Superconducting chip low temperature testing arrangement
Technical Field
The utility model relates to a low temperature test device field, in particular to superconductive chip low temperature test device.
Background
In the process of developing a superconducting electronic component, high-frequency performance tests are required, main tests are carried out at low temperature, for a superconducting chip, related performance tests are required to be carried out in a low-temperature environment of 4.2K, a superconducting chip low-temperature testing device is a device for connecting a superconducting device and normal-temperature measuring equipment, one end of the testing device, which is connected with the device, is inserted into a liquid helium Dewar, so that the superconducting chip is in the low-temperature environment of 4.2K, and the other end of the testing device is in the normal-temperature environment and is connected with the normal-temperature measuring equipment, and further the performance tests of the superconducting chip are realized.
Chinese patent CN107589333A introduces a device and a method for testing the low-temperature electrical performance of an electronic component, the device is used for testing the electrical performance of the electronic component in a liquid nitrogen environment, when the device is used for testing a plurality of components, the device needs to be installed on the same IC locking seat, and the corresponding relation between a pin and a normal-temperature joint needs to be recorded, otherwise, the test cannot be carried out, the test of the plurality of components is easy to cause confusion, and the accuracy and the test efficiency of the test result are influenced; in addition, the device is not provided with a temperature sensor and a heater, the temperature of the component to be detected cannot be monitored, and the temperature of the component to be detected cannot be controlled, so that the relationship between the electrical performance of the component and the temperature is difficult to obtain.
SUMMERY OF THE UTILITY MODEL
Therefore, it is necessary to provide a superconducting chip low-temperature testing apparatus with accurate testing and high testing efficiency for the defects of the prior art.
In order to achieve the above purpose, the utility model adopts the following technical scheme:
a superconducting chip cryogenic test apparatus, comprising: connect mounting box, sealing flange, cable fairlead, installing support, set up in at least a chip mount pad module on the installing support, arbitrary one be fixed with a chip of waiting to test in the chip mount pad module, wherein:
two ends of the cable leading-out pipe are respectively connected with the joint mounting box and the mounting bracket, joints with the number consistent with that of pins of the chip to be tested are arranged on the joint mounting box, and the joints are connected with testing equipment at normal temperature through cables; the sealing flange is arranged between the joint mounting box and the mounting bracket, and can slide along the cable leading-out pipe.
In some preferred embodiments, the chip to be tested is fixed on the chip mounting base module through a PCB board.
In some preferred embodiments, the electrodes on the PCB board correspond one-to-one to the resilient contact pads on the chip mounting base module.
In some preferred embodiments, a temperature sensor is disposed on any one of the chip mounting base modules, the temperature sensor is close to the chip to be tested, and a lead of the temperature sensor passes through the cable outlet tube to be electrically connected with the joint.
In some preferred embodiments, a heater is disposed on any one of the chip mounting base modules, the heater is close to the chip to be tested, and a lead of the heater passes through the cable outlet tube to be electrically connected with the connector.
In some preferred embodiments, the temperature sensor and the heater are at the same height when inserted in liquid helium.
In some preferred embodiments, a magnetic shield is also provided on the exterior of the chip mount module.
The utility model adopts the above technical scheme's advantage is:
the utility model provides a superconductive chip low temperature test device, include: the test device comprises a connector mounting box, a sealing flange, a cable outlet pipe, a mounting support and at least one chip mounting seat module arranged on the mounting support, wherein a chip to be tested is fixed on any one chip mounting seat module, two ends of the cable outlet pipe are respectively connected with the connector mounting box and the mounting support, connectors with the number consistent with that of pins of the chip to be tested are arranged on the connector mounting box, and the connectors are connected with test equipment at normal temperature through cables; sealing flange sets up the joint mounting box with between the installing support, just sealing flange can follow the cable fairlead slides, the utility model provides a superconductive chip low temperature test device through setting up independent chip mount pad module on the installing support, can realize the multicore piece simultaneous measurement, and the installation is simple, convenient operation, and it is accurate to measure, and measurement efficiency is high.
Furthermore, the utility model provides a superconductive chip low temperature test device through setting up temperature sensor and the heater on the chip mount pad, can realize the temperature monitoring and the temperature control to being surveyed the chip, can make the chip reach the quench temperature rapidly, can carry out the capability test of chip under the different temperatures simultaneously.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a superconducting chip low-temperature testing apparatus provided by an embodiment of the present invention.
Fig. 2 is a schematic structural diagram of a modular arrangement of the chip mounting base provided in the embodiment of the present invention.
Fig. 3 is a schematic cross-sectional view of a chip mounting base module according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
Referring to fig. 1 and fig. 2, for the structural schematic diagram of the superconducting chip low-temperature testing apparatus and the modular chip mounting structure schematic diagram provided in the embodiment of the present invention, for convenience of description, only the parts related to the embodiment of the present invention are shown, and the detailed description is as follows.
The utility model provides a superconductive chip low temperature test device 100, include: the test device comprises a connector mounting box 1, a sealing flange 2, a cable leading-out pipe 3, a mounting bracket 4 and at least one chip mounting seat module 5 arranged on the mounting bracket 4, wherein a chip to be tested is fixed on any one chip mounting seat module 5.
Two ends of the cable leading-out tube 3 are respectively connected with the joint mounting box 1 and the mounting bracket 4, joints with the number consistent with that of pins of a chip to be tested are arranged on the joint mounting box 1, and the joints are connected with testing equipment at normal temperature through cables; the sealing flange 2 is arranged between the joint mounting box 1 and the mounting bracket 4, and the sealing flange 2 can slide along the cable leading-out pipe 3.
It can be understood that the cable outlet pipe 3 can be sealed with the dewar mouth under the action of the sealing flange 2.
The utility model provides a superconductive chip low temperature test device through setting up independent chip mount pad module on the installing support, can realize the multicore piece simultaneous measurement, and the installation is simple, convenient operation, and it is accurate to measure, and measurement efficiency is high.
Please refer to fig. 3, which is a schematic cross-sectional view of a chip mounting base module according to an embodiment of the present invention.
In some preferred embodiments, the chip to be tested is fixed on the chip mount module 5 through a PCB board 11, and electrodes on the PCB board 11 correspond to the elastic contact pieces 12 on the chip mount module 5 one by one.
In some preferred embodiments, a temperature sensor 9 is disposed on any one of the chip mount modules 5, the temperature sensor 9 is close to the chip 10 to be tested, and a lead of the temperature sensor 9 passes through the cable outlet tube 3 to be electrically connected to the connector.
In some preferred embodiments, a heater 8 is disposed on any one of the chip mounting base modules 5, the heater 8 is close to the chip 10 to be tested, and a lead of the heater 8 passes through the cable outlet tube 3 to be electrically connected with the connector.
It can be understood that, in addition to the temperature sensor 9 and the heater 8, one end of other chip test cables accommodated in the cable outlet 3 is welded to a joint arranged on the joint mounting box 1 at the normal temperature side, and the other end is welded to the elastic contact piece 12 on the chip mounting base module 5 at the low temperature side.
It can be understood that because temperature sensor 9 and heater 8 have been arranged on every chip mount pad module 5, and temperature sensor 9 and heater 8 are nearer with the chip distance that awaits measuring, are in same height when inserting liquid helium, can carry out accurate temperature monitoring and temperature control to the chip after the installation, can make the chip reach the quench temperature rapidly, can carry out the test of chip performance under the different temperatures simultaneously.
In some preferred embodiments, a magnetic shield 6 is also provided on the outside of the chip-mount module 5 to shield the external environment from magnetic flux.
The utility model provides a superconductive chip low temperature test device through setting up independent chip mount pad module on the installing support, can realize the multicore piece simultaneous measurement, and the installation is simple, convenient operation, and it is accurate to measure, and measurement efficiency is high.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
Of course, the superconducting chip low-temperature testing device of the present invention may also have various changes and modifications, and is not limited to the specific structure of the above-described embodiment. In conclusion, the scope of the present invention should include those changes or substitutions and modifications which are obvious to those of ordinary skill in the art.

Claims (7)

1. A superconducting chip low temperature testing device is characterized by comprising: connect mounting box, sealing flange, cable fairlead, installing support, set up in at least a chip mount pad module on the installing support, arbitrary one be fixed with a chip of waiting to test in the chip mount pad module, wherein:
two ends of the cable leading-out pipe are respectively connected with the joint mounting box and the mounting bracket, joints with the number consistent with that of pins of the chip to be tested are arranged on the joint mounting box, and the joints are connected with testing equipment at normal temperature through cables; the sealing flange is arranged between the joint mounting box and the mounting bracket, and can slide along the cable leading-out pipe.
2. The superconducting chip cryogenic test device of claim 1, wherein the chip to be tested is fixed to the chip mount block by a PCB board.
3. The superconducting chip cryogenic test device of claim 2, wherein the electrodes on the PCB board correspond one-to-one to the resilient contact pads on the chip mount module.
4. The superconducting chip low-temperature testing device of claim 3, wherein a temperature sensor is arranged on any one of the chip mounting seat modules, the temperature sensor is close to the chip to be tested, and a lead of the temperature sensor passes through the cable outlet pipe to be electrically connected with the joint.
5. The superconducting chip low-temperature testing device of claim 4, wherein a heater is arranged on any one of the chip mounting base modules, the heater is close to the chip to be tested, and a lead of the heater passes through the cable outlet pipe to be electrically connected with the joint.
6. The superconducting chip cryogenic test device of claim 5, wherein the temperature sensor and the heater are at the same height when inserted in liquid helium.
7. The superconducting chip cryogenic test device of claim 1, wherein a magnetic shield is further disposed outside the chip mount module.
CN201920847926.2U 2019-06-05 2019-06-05 Superconducting chip low temperature testing arrangement Active CN210294465U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110161401A (en) * 2019-06-05 2019-08-23 中国科学院理化技术研究所 A kind of superconduction chip low temperature test device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110161401A (en) * 2019-06-05 2019-08-23 中国科学院理化技术研究所 A kind of superconduction chip low temperature test device

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