CN2080678U - Simple digital ic tester - Google Patents

Abstract

Disclosed is a simple digital integrated circuit tester, which is composed of a machine casing, an operation displaying panel, a printing board, a group of electric level detection and electric level input circuits, an impulse testing machine circuit, a pulse generator circuit, a power supply circuit, a set of accessories, etc. The operation panel is provided with two rows of display lamps, two rows of electric level switches, two rows of foot testing holes of the integrated circuit, at least an integrated circuit plug socket, two resistance dividers, a group of seven-segment digital displaying assemblies, etc. Each foot testing hole is connected with the cutter end of the electric level switches through a resistance; the electric level switches have at least a hanging bit and a bit connecting with a low electric level.

Description

Simple digital ic tester

The present invention relates to a kind of testing unit for digital integrated circuit.

Because general digital IC(integrated circuit) various in style, present IC tester product all is a self-action.If the IC tester of self-action roughly is divided into high, medium and low three kinds of class, then for general IC user, the problem of these testers is: high-grade costs an arm and a leg, and volume is big; Low-grade performance is low excessively; And middle-grade price is not low, and volume is not little, and performance is still limited to some extent.In addition, for Electronic Design, maintenance and education experiment personnel, self-action IC tester is not easy to IC is carried out progressively test, intervention and analysis with pointwise.Early stage hand IC tester and present digital circuit experiment case etc. though can carry out progressively test with pointwise to IC, are operated pretty troublesome.Widespread use along with IC, requirement to the IC on-line testing also increases gradually, but has only some senior dynamic on-line testing device products that are unsuitable for popularizing and the low excessively on-line testing device product (as logic test pen, logic testing folder and IC comparer etc.) of some performances at present.

The patent documentation of reflection prior art is as follows:

China: 85203558,86101612,86205229,88211707,80203080,87206369,88211155; Japan: special permission communique (A), clear 59-139640; The U.S.: 3670245,3882386,3883801,3946310,4189673,4282633,4348636.

The objective of the invention is: a kind of simple and easy digital IC tester is provided, easy and simple to handle directly perceived though it is the tester of hand, can not only off-line test numeral IC, can also on-line testing numeral IC, and also volume is little, and cost is not high.On this digital IC tester, set up very few elements, can also the off-line test operational amplifier and linear integrated circuit commonly used such as voltage comparator.

Principle of the present invention, structure and embodiment represent with following accompanying drawing:

Fig. 1---operating board structure

Fig. 2---power circuit

Fig. 3---level detection and level input circuit

Fig. 4---digital display circuit

Fig. 5---test threshold is selected circuit

Fig. 6---comparative voltage and bias voltage control circuit

Fig. 7---pulse-generator circuit

Fig. 8---have the level detection and the level input circuit of comparing function concurrently

See Fig. 1:

On the guidance panel 2 of tester 1 of the present invention, two row's diode displaying lamp LD1～24 are arranged.In the outside of display lamp, level switch KA1～24 that have two rows and display lamp to aim at one by one.In the outside of level switch, integrated circuit (IC) pin instrument connection JIC1～24 that have two rows and level switch to aim at one by one.The IC socket SIC1 of one 20 pin and the IC socket SIC2 of one 24 pin are arranged, and the IC socket is contained in the outside of two row's display lamps, two row's level switches and two row's pin instrument connections.The pin of IC socket and JIC1～24 are connected one to one.Between two row's display lamps, two row's level switches and two row's pin instrument connections, the zone that has and can place (but not being a to place) IC picture 3.As having placed the picture of a TTLIC-SN7400 on now should the zone, the two row IC pin of being drawn on the IC picture of putting well are (being not only to aim at one by one with display lamp) that can aim at one by one with display lamp, level switch and pin instrument connection.On panel 2, also has power switch KS, power mode selector switch KSM, test mode selector switch KIS, threshold criteria selector switch KTC, pull-up resistor K switch RU, pulse mode selector switch KPM, impulse speed selector switch KPF, threshold value and biasing selected K switch TB, threshold level selector switch KVT, bias level selector switch KVB, digital display mode selector switch KDS, analog quantity output adjusting knob (potentiometer) W1, W2, line power input jack JVBG, accessory power supply input jack JVAG, testing power supply (+5V) output plughole JVC, testing power supply (OV) output plughole JTG, auxiliary logic pulse test input jack JLTP, auxiliary logic pulse display lamp LDP, aanalogvoltage output plughole JW1, JW2, pulse output plughole JPSO and one group of 16 system seven segment numerical decoding monitor DS201～203.

Should illustrate:,, do not break away from feature of the present invention yet even three's interior external position is exchanged with the pairing display lamp of each IC pin, level switch and pin instrument connection.In addition, see all display lamps, level switch or pin instrument connection separately, they all are to arrange by the order and the relative position of the double pin of IC respectively.

Be being connected on the operation display panel between all jacks and the jack with the bonding line cross-over connection, plug can be equipped with in the two ends of bonding line, is the plug bonding line.With this JIC1～24 and plug bonding line power supply, clock etc. can be connected intuitively with the IC pin, promptly when using this instrument, can pass through the plug bonding line: (1) links to each other power positive end (JVC) and ground end (JTG) with any two pin instrument connections, with to being powered by side IC; (2) JLTP is linked to each other with arbitrary pin instrument connection, with the current intelligence of test I C pin; (3) JPSO is linked to each other with arbitrary pin test, to go into pulse to the IC footnote.

The using method of tester of the present invention can be described by Fig. 1:

During off-line test numeral IC, IC is inserted among the SIC1, operation KA1～24(places M, H, L to be respectively not feed signals, send " 1 " signal, send " 0 " signal), and judge the quality of IC according to the truth table whether demonstration of LDA1～24 meets IC.

During on-line testing numeral IC, provide VB power supply to circuit board, again this power supply is drawn VB and OV from plank), give JVBG, select for use the online IC connector of a cover (to have and be suitable for different pin numbers, every set of connectors comprises a flat cable, cable one end is an IC emulation plug, and the other end is the IC folder), the emulation plug is inserted SIC1, IC is clipped on the IC on the plank, can observes LDA1～24.And judge that normally whether truth table and level.Also can observe the demonstration number of DS201～203, as correct digital value record was arranged in the past, can also can operate KA1～24 this moment by relatively noting abnormalities, by force to relevant input end injection level signal.Overload is overheated and impaired continuously in order to prevent other IC output terminal that links to each other, and operation should soon and can suitably reduce the VB value.

At jack JW1 and the JW2 on 2 on the guidance panel, its output size is regulated by W1 and W2 respectively, and JW1 can link to each other with arbitrary IC pin with the plug bonding line with JW2, so this test can also be tested analog ICs such as operational amplifier, voltage comparator qualitatively.

Mandatory declaration: two row's display lamps and two row's level switches, two row's pin instrument connections are aimed at one by one, could just observe and operate like this---and especially operation becomes very convenient.As not being, even put the IC-card sheet two rows between the display lamps, but the IC pin on the card only aims at one by one with display lamp, and can not aim at one by one with level switch and pin instrument connection, and operation is still very inconvenient so.

IC picture, bonding line and IC connector etc. can be used as one of this tester and overlap annex or part annex.When the internal circuit of tester is shown in Fig. 2～7, promptly become one embodiment of the present of invention.

See Fig. 2:

Voltage stabilizer IC101+5V output VW uses for the circuit in this tester, and voltage stabilizer IC102 exports VC for tested IC(off-line) use.Be serially connected in the protective effect that triode D101 on the incoming line of IC101 and IC102 and triode T102 play the reverse input voltage of blocking-up (VA that misconnection is anti-and VB) respectively, and very little to the forward saturation voltage drop of VB.The constant current source of being made up of diode D104, triode T103 and resistance R 111, R112 is connected on the base stage of T102, so that enough big and constant saturated input current to be provided.Form the bistable power protecting and controling circuit that triode T102 is in time turn-offed by resistance R 105～R110, triode T104, T105, T107, T108, capacitor C 111, diode D105, D102, D103; its overvoltage protection signal is obtained from power supply VW and VB through D105, D102, D103, stabilivolt Z103, Z104 and resistance R 104; its overcurrent protection signal is via resistance R 101, R102, R103, R114; the current sampling circuit that potentiometer W101 and triode T106 form is obtained from the input current ID of voltage stabilizer IC102.Protect when too high or ID is excessive as VW, VB.After getting rid of the protection reason, through disconnected, logical VB and VA(again as using), and by the reset response of capacitor C 111 and KS4, triode T102 can recover conducting.Be connected across the stabilivolt Z101 of voltage stabilizer IC101 input end and voltage stabilizer IC102 output terminal, the clamping protection effect that Z102 plays local instantaneous overvoltage.Power supply VB, VA and ground wire (OV) that three cutter two-position switch KS can lead to (ON position) simultaneously, break (OFF position) inserted from the outside.When the K switch SM of two of four blades places the L position, can also can share the VB of 2～8V and the VA of 8～15V singly with the VB of 8～18V or the VA of 8～15V, when KSM places the R position, can only be singly with the VB of 5V, and to the current-limiting protection defunctionalization of ID.Electric capacity among Fig. 2 is except that C111, and C101～C114 all plays power supply filtering and decoupling effect.When K switch IS placed the S position, JVC and jack JTG and+5V and OV connected, and KIS is when placing the I position, and JVC and JTG all disconnect.VF is the integrated voltage in the instrument, VF=VW during off-line test, VF=VB during on-line testing.VE is the power supply (see figure 3) that voltage comparator is used in the flat testing circuit of power supply.On the base stage of T102, be connected in series the electronic switch of forming by triode T101 and resistance R 115 that is subjected to contact KA control, send into if any VA, KA turn-offs, and T101 turn-offs, and promptly T102 turn-offs; And send into as no VA, have only VB to send into, then KA, T101 and T102 conducting, VB is sent to each circuit in the instrument.As can be seen, this power circuit comprised mu balanced circuit and holding circuit, and holding circuit comprises the holding circuit of back-pressure, overvoltage and overcurrent, but the protection switch of holding circuit.Be at least one PNP transistor D101 or T102, the emitter of this pipe connects the input end of external power (VA or VB), and collector connects the input end of mu balanced circuit (IC101 or IC102).

See Fig. 3:

This is in 24 (one group) identical level detection and the level input circuit one, and wherein code name N represents any in several 1～24.ICAN is a voltage comparator, by level sensitive circuit is used.RAN is a comparer input current-limiting resistance, RBN comes down to pull-up resistor or the level pull-up resistor between tested IC pin of cross-over connection and the positive supply (VF), this mainly is to be provided with for the IC that surveys the output of opener electrode, but because of being of little use, so diode DAN of each forward ground serial connection, and on the public negative terminal CTU of DAN, a shared K switch RU, lead to VF(and see Fig. 2), can cut off all resistance R BN.RFN is the current-limiting resistance of LDAN.REN is the bypass resistance of LDAN, and in the time of can making display lamp power supply VWN be OV, the opener electrode of corresponding comparer ICAN output BSN always is that OV(is to cooperate the XOR gate of Fig. 4).CTT is the threshold value comparative voltage of comparer ICAN.CTB(sees below and states) be bias voltage, deliver to jack JICN through current-limiting resistance RCN.VLH, VLL are that high and low level voltage use in IC test input, can deliver to jack JICN through level switch KAN and current-limiting resistance RDN, and JICN is with the corresponding one by one connection of pin of SIC1, SIC2.In fact, because of RCN＞＞RDN, so only when K switch AN is unsettled, CTB just come in handy (see below and state).Because the RDN resistance is enough little, and JICN during on-line testing IC, can inject the bigger electric current that can force original level to change from JICN to IC by the cutter end that RDN meets KAN under the control of KAN.Can find out, the pin instrument connection JICN of the input termination correspondence of each level sensitive circuit, the display lamp LDAN of output termination correspondence, each level sensitive circuit uses a voltage comparator, an input end of comparer connects corresponding pin instrument connection by a resistance, and another input termination comparative voltage CTT(sees Fig. 6).

See Fig. 4:

Three digital decoding monitor DS201～203 are arranged here.When fading to " 1111 " by " 0000 ", then show by " 0 " to fade to " F " as the input of each display.Display DS201～203 are removed to monitor 24 level detector output BSN(by 12 biconditional gate IC201～212 and are seen Fig. 3).Because the effect of K switch DS, when promptly KDS places L or H position, DS201～203 will the row of descending or 12 binary codes of the row's of going up display lamp show with three 16 ary codes.But when K switch DS was placed the M position, what display showed was the row of going up and following row's the value of binary code after " XNOR " handled, and still is three 16 system numbers, and this reading to the user is more convenient, and element is also economized.Can think the output terminal of the level sensitive circuit of the scale-of-two input termination correspondence of display.

See the effect of KDS again: when placing the L position, VW1～12 and VW(+5V) connect, VW13～K24 and OV connect; VW1 when placing the H position～12 are connected with OV, and VW3～24 are connected with VW, and when placing the M position, VWN all connects with VW.KDS can be the switch of three 24 cuttves, also can be made up of electronic circuit, because of extremely simply scheming slightly.

See Fig. 5:

By voltage divider or the reducing transformer that resistance R 301～307, triode T301 and diode D301 form, be used for producing the threshold value comparative voltage of 0.8V, 2.2V, 0.3VF and 0.7VF.When four blade two-position switch KIS places I position (on-line testing), high level voltage VLH=VK, low level voltage VLL=OV all is to hang down internal resistance.But when K switch IS places S position (off-line test), place C position (CMOSI test), VLH=0.7VF then, VLL=0.3VF as the K switch TC of two on five cuttves; Place T position (TTLIC test) as KTC, VLH=2.2V then, VLL=0.8V.Be to be fit to the TTLIC(off-line test), with diode D301 pouring into big low level current, with triode T301 can pull out than high level of current greatly.VLH, VLL see Fig. 3 for K switch AN() take, to provide input signal to tested IC.

See Fig. 6:

This circuit has only two output line CTT and CTB(to remove Fig. 3).Electricity R409～R411, diode D401, D402 form produce in threshold level 0.5VF(for CMOS) and 1.3V(for TTL) voltage divider.Be 10HZ, 5VPP(amplitude on the PSL line) square wave.The amplifier of being made up of resistance R 412～R414 and triode T404 changes to VF with the amplitude of PSL.Form voltage divider with the PSL synchronization fluctuate by resistance R K401～RK408, triode T401, T402.When the K switch VT of three on hilted broadsword places M, produce height (0.7VF of CMOS or the 2.2V of TTL), low (0.3VF of CMOS or the 0.8V of TTL) threshold voltage square wave of rotating with the 10HZ Automatic Frequency on resistance R 402 and the R403 tie point.When the K switch TB of two of double-poles places the T position, and when the K switch VT that hilted broadsword is three places the M position, the CTT line is promptly exported high and low threshold voltage square wave, and threshold level in exporting on the CTB line, when K switch TB places the KVB of three on B position and hilted broadsword to place the M position, threshold level in the output of CTT line, and output is rotated with the 10HZ Automatic Frequency on the CTB line height (VF), low (OV) square wave.When K switch TC placed T or C position, high, medium and low threshold level met TTL or CMOS requirement.When H or the L position, the square wave of CTT line may become constant high or low threshold value to K switch VT by the M position.K switch VB is changed when placing H or L position by the M position, and the square wave of CTB line becomes constant height (VF) or low level (OV).

Because the square wave on the CTT line is sent to level sensitive circuit voltage as a comparison, thereby the testing circuit that makes each single lamp, single comparer becomes the testing circuit of dual threshold three-state, promptly be higher than high threshold, be lower than threshold value or between high and low threshold value the time as the level on the jack JICN, then Dui Ying display lamp LDAN bright, do not work or flash with the 10HZ frequency.Square wave on the CTB line is sent to the input end JICN of each level sensitive circuit respectively by big resistance resistance, as inclined to one side threshold voltage.Because of the unsettled input end of CMOSIC do not resemble TTLIC be defined as middle level, send square-wave signal by resistance R CN to the pin instrument connection JICN of correspondence this moment, can learn that the measured point is unsettled or open circuit by flashing of display lamp LDAD.Though also may flash when on the JICN fluctuating signal being arranged, can test to distinguish with pulse test device (JLTP and LDP see Fig. 1) again.

Obviously, CTT is the gentle high lower threshold level square wave of selecting through switch of rotating with the 10HZ Automatic Frequency of high threshold level, middle threshold level, low-threshold power, and CTB is through high level, low level, the middle threshold level of switch selection and the high-low level square wave of rotating with the 10HZ Automatic Frequency.

Resistance R 415 is used to limit may be by the electric current from the VF outflow of D401, D402, KVB and KTB communication.K switch RU and lead-in wire CTU lead to Fig. 3.

See Fig. 7:

Here comprise a slow continuous impulse (10HZ) generator, form by inverter ic 503, IC504, resistance R 503, R504 and capacitor C 502; A fast continuous impulse (1KHZ) generator is made up of inverter ic 501, IC502, resistance R 501, R502 and capacitor C 501; A single pulse generator is made up of Sheffer stroke gate IC505, IC506 and resistance R 505, R506; K switch PM and a double-pole two-position switch KPF that hilted broadsword is two, they connect by figure, and attainable function is: when K switch PM places the S position, can be with K switch PF fade to the H position by the L position, pulse signal-line PS(is anti-phase) by 1 change 0, vice versa quiveringly for nothing.When K switch PM places the C position, PS(is anti-phase) be continuous impulse, but its speed depends on H or L position that K switch PF is put.AI is a current amplifier, and PS(is anti-phase) after AI amplifies, bring out by JPSO, because of exporting big electric current (internal resistance is little), so clock end that can the tested IC of online driving.Inverter ic 504 is exported 10HZ square wave PSL(all the time and is removed Fig. 6).

The 10HZ frequency of being mentioned is herein all easily discovered to flash for naked eyes and is determined; The 1KHZ frequency of being mentioned is observed for oscillograph is easy and general can the response of circuit-under-test determines all do not have strict demand.

As for the impulse testing machine circuit in the instrument, can adopt various commercially available logic test pens' (probe) scheme.The input end jointing holes JLTP of this circuit, output termination display lamp LDP.The function of this circuit has pulseless requirement as long as can satisfy to differentiate.For example, when the narrow monopulse of plus or minus was arranged on the JLTP, LDP was once glittering; When on the JLTP continuous impulse being arranged, LDP is bright; When JLTP was high or low level, LDP did not work.JLTP links to each other with arbitrary pin instrument connection through the plug bonding line.

All circuit and components and parts among Fig. 2～7 or Fig. 8 can be contained in the printed board, and printed board is contained in the casing, and all components and parts that relate to operation and show can touch on operation display panel or see on the plank.

Among Fig. 2～Fig. 8, the parameter or the model of main element device are:

R101=2.4R, R102=470R, R103=10KR, R104=2KR, R105=1KR, R106=10KR, R107=100KR, R108=20KR, R109=82KR, R110=10KR, R111=750KR, R112=150KR, R113=100KR, R114=10KR, R115=4.7KR, W101=1KR, RAN=20KR, RBN=8.2KR, RCN=1MR, RDN=15R, REN=51KR, RFN=510R, R301=30KR, R302=300R, R303=16KR, R304=51KR, R305=30KR, R306=1.5KR, R307=33KR, R401=37.1KR, R402=18.91KR, R403=8.12KR, R404=51KR, R405=2.6KR, R406=20KR, R407=51KR, R408=33.3KR, R409=51KR, R410=51KR, R411=4.7KR, R412=30KR, R413=200KR, R414=10KR, R415=10KR, R501=100KR, R502=100KR, R503=100KR, R504=1MR, R505=51KR, R506=51KR, RGN=RGN=1MR, RHN=RDN, RI=51KR, RJ=51KR, (R is ohm), C101=0.1UF, C102=22UF, C103=0.1UF, C104=22UF, C105=0.1UF, C106=0.1UF, C107=22UF, C108=0.1UF, C109=22UF, C110=0.1UF, C111=1UF, C112=22UF, C113=22UF, C114=0.1UF, C501=1000PF, C502=0.033UF, (UF is a microfarad) IC101=78MO5, IC102=78MO5, ICAN=LM339, IC201～IC212=CD4077, IC501～IC504=CD74HC04, IC505～IC506=CD74HC00, ICBN=CD4030, ICCN=CD4043, ICDN=CD74HC158, Z101=30V, Z102=6.5V, Z103=3.5V, Z104=23V.

Certainly,, can make multiple modification, to satisfy different purposes or requirement to the above embodiment of the present invention according to feature of the present invention.For example: wish that IC tester cost of the present invention is lower, operate easier, and only satisfy the scope of not too wide off-line test IC, can adopt following any, appoint several or whole modifications: only with one 20 pin IC socket (SIC1), the also corresponding minimizing of level sensitive circuit (Fig. 3); Power circuit (Fig. 2) all saves, only keep a ground end and anode, to send into from the outside+the 5V power supply, use for the tested IC of tester circuitry, level switch (KAN) with two on hilted broadsword rather than three, promptly have only unsettled position and one to connect low level, and the ohmic load of cross-over connection changes into and can not turn-off between each IC pin instrument connection (JICN) and the power positive end, be diode (DAN), and all conductings of switch (KRU), bias voltage is not provided with in addition yet.So, when level switch disconnects, not high level (connecing tested IC input pin) on the corresponding pin instrument connection, be to change (connecing tested IC output pin) with the IC output level, need when the IC input low level, the turn-on level switch gets final product; The voltage comparator that level detection is used (ICAN) changes single threshold into, even available common CMOS phase inverter (as CD4040 etc.) substitute; The signal of pulse producer can directly be exported to the tested IC of off-line without current amplifier; Seven segment numerical decoding display circuit need not or the like.

Tester of the present invention can be used as the part of Other Instruments, for example: as the auxiliary manual part of detecting of the IC of circuit ATE (automatic test equipment).

From now on, if the orthoscopic multidigit switch commodity that volume is little or size is suitable, performance good, price is low can occur, the then connection of tested IC pin such as power supply, pulse output, available switch is realized, even the pin instrument connection can be saved, but the pin gaging hole is saved at this moment belongs to the variation of equivalence, do not break away from feature of the present invention yet.

For luminous diode LDAN, if adopt double-coloredly, can constitute the ternary or display of more polymorphic (increase displaying contents) of single lamp certainly, but still belong to that equivalence changes or replenishing on the original basis.

When principle of the present invention, structure and feature are combined with present commercially available IC comparer product, promptly improve a small amount of cost as long as set up a spot of element, just the function of former IC comparer is improved greatly, by can only onlinely comparing IC, become can be online IC relatively, again can off-line test IC.Here it is another embodiment of the present invention, the difference of it and the foregoing description mainly is on the level input circuit of level detection.As shown in Figure 8:

This level sensitive circuit has used a dual input XOR gate ICBN and a RS latch ICCN.With the input end pin instrument connection of ICBN, another input end is connected on the pin PICN of line IC connector, and promptly having an end at least is the input end of level sensitive circuit.During off-line test IC, be input end with the A of ICBN; Online relatively the time, be input end with A and the B of ICBN; During on-line testing IC, be input end with the B of ICBN.Figure medium size representation 1～20(establishes only with one 20 pin IC socket SIC1).JICN is connected one to one with the SIC1 pin.The panel layout of JICN, level switch KAN, display lamp LDAN, identical with Fig. 1.As cancel diode DAN, DNA ', resistance R BN, RBN ', RHN, K switch RU, KRU ', KAB and data selector ICDN etc., and the L position of cancellation K switch AV, Fig. 8 has promptly represented a typical case and the 20(or 16 of common IC comparer) in the individual same channels one.During compare test, in SIC1, insert with PICN on identical IC, the KAN of corresponding IC input end and power supply is placed the H position, promptly the input pin of two contrast IC and supply pin accordingly and connect, promptly relatively whether identical two IC correspondence output pins are for ICBN.Owing to set up the load RBN that turn-offs and DAN and the KRU that is connected across between positive supply VW and the JICN, tested IC among the SIC1 just can be the OC door, in like manner set up the RBN ' of corresponding identical (parameter and effect) between PICN and VW, DAN ' and KRU ', the online IC that PICN connect also can be the OC door, though this is the improvement to common IC comparer, but further, set up L end and current-limiting resistance RHN to KAN again, during off-line test, on the effect of RHN and the cutter end that is connected the RDN(equivalent string KAN in Fig. 8 that is equivalent among Fig. 1), when making off-line test IC, when KAN places the M position, JICN is high (as connect tested IC input end) or the output state of following tested IC, and when KAN placed the L position, JICN was low (connecing the input end of tested IC).This RBN and the method that the KAN that has a unsettled position and to connect low level bit matches have realized simple (a last enforcement) off-line test of IC.The ICDN that is set up, not only to present embodiment, to common IC comparer also is to improve, it is subjected to the control of its S end level, can encourage inputing or outputing of ICCN, LDAN is sent in output that promptly be not latched or the ICBN that is latched, uses the benefit of ICDN to be: (1) is relatively during IC, but unaided eye discrimination is different and instantaneous different continuously; (2) during on-line testing, can differentiate and have or not continuous burst pulse.The effect of resistance R GN and RGN ' is: when KRU and KRU ' disconnected, as only testing with an ICBN input end, then another input end was a low level, and making ICBN is the homophase out gate.Know by inference again thus, only KRU is connected, ICBN is inverse gate to PICN, at this moment can utilize ICCN and ICDN to differentiate continuously negative burst pulse, and this is again an improvement.The resistance R I of button PB forms the reset circuit of ICCN.PSC is 10HZ square wave (a simple oscillator can be set), can give the selection control end S of ICDN through resistance R 5, but also must with three-position switch KAB place BL, AL or AB position, promptly could be that will not latch, that be latched after KAB selects or both ICBN outputs of rotating automatically with 10HZ directly, directly and indirectly give LDBN indirectly or with what the 10HZ Automatic Frequency was rotated.Also as seen, the output terminal of this level sensitive circuit can be the output terminal of ICBN, ICCN or ICD.RFN is the current-limiting resistance of LDAN.All last codes of Fig. 8 are not the components and parts of N and power supply VW etc., all are that several passages are shared.Can send into from the socket JVBG+the power supply VB of 5V and OV, and draw tested IC(to off-line by corresponding JICN) from JVC and JTG.DW is back-pressure (to a VB) protection diode.When on-line testing or comparison, online IC supply pin (maximum potential point, + 5V) the diode DPN by correspondence send positive voltage to internal power supply line VW, and (the potential minimum point, OV) the diode DMN ground wire in machine by correspondence send negative (VW relatively) voltage to online IC foot of the ground wire.So Shi Buxu powers to tester through JVBG.

From the off-line test that satisfies minimum requirements and relatively online, ICBN and ICDN can save, but feature of the present invention is not broken away from yet.

Claims (10)

1, a kind of simple testing unit for digital integrated circuit, comprise that by casing, operation display panel, printed board, one group of level detection and level input circuit, impulse testing machine circuit, pulse-generator circuit, power circuit and a cover annex of online integrated circuit connector, integrated circuit picture, plug bonding line etc. forms, it is characterized in that: on guidance panel, have two to arrange display lamps; The level switch that has two rows and display lamp to aim at one by one in the outside of display lamp; The integrated circuit pin instrument connection that has two rows and level switch to aim at one by one in the outside of level switch; On guidance panel, at least one integrated circuit socket is arranged, this socket and the corresponding one by one connection of pin instrument connection; Power circuit has a ground end and anode at least, and the ground end links to each other with any two pin instrument connections through the plug bonding line with anode; The pin instrument connection of the input termination correspondence of each level sensitive circuit, the display lamp of output termination correspondence; Between each pin instrument connection and power positive end, ohmic load of cross-over connection; Each pin instrument connection connects corresponding knife end of electric electrical level switch by a resistance; Level switch has at least a unsettled position and one to connect low level; The input end of pulse test circuit links to each other with arbitrary pin instrument connection through the plug bonding line.

2, by the described tester of claim 1, it is characterized in that: each level switch has a unsettled position, one to connect low level and a position that connects high level; On the ohmic load between each pin instrument connection and power positive end, each a forward ground diode of serial connection and shared switch that leads to power positive end.

3, by claim 1 or 2 described testers, it is characterized in that: each level sensitive circuit uses a voltage comparator, an input end of comparer connects corresponding pin instrument connection by a resistance, another input termination comparative voltage, comparative voltage is high threshold level, lower threshold level, middle threshold level of selecting through switch and the high lower threshold level square wave of rotating with the 10HZ Automatic Frequency.

4, by the described tester of claim 2, it is characterized in that: each pin instrument connection respectively connects bias voltage by a resistance, and bias voltage is high level, low level, middle threshold level of selecting through switch and the high-low level square wave of rotating with the 10HZ Automatic Frequency.

5, by claim 1,2 or 4 described testers, it is characterized in that: one group of sexadecimal seven segment numerical decoding monitor is arranged, the output terminal of the level sensitive circuit of the scale-of-two input termination correspondence of this decoding monitor on the guidance panel.

6, by claim 1,2 or 4 described testers; it is characterized in that: power circuit comprises mu balanced circuit and holding circuit; the protection switch of holding circuit is at least one PNP transistor, and the emitter of this pipe connects the input end of external power, and collector connects the input end of mu balanced circuit.

7, by claim 1,2 or 4 described testers, it is characterized in that: pulse-generator circuit comprises monopulse generation circuit and continuous impulse generation circuit, and pulse output end links to each other with arbitrary pin instrument connection through the plug bonding line.

8, by claim 1,2 or 4 described testers, it is characterized in that: two adjustable voltage dividers are arranged on guidance panel, and each dividing potential drop output terminal links to each other with arbitrary pin instrument connection through the plug bonding line.

9, by the described tester of claim 1, it is characterized in that: each level sensitive circuit has used a dual input XOR gate, an input end pin instrument connection of XOR gate, another input end is connected on line integrated circuit connector pin, the output of XOR gate is after switch is selected, directly, directly and indirectly give display lamp indirectly or with what the 10HZ Automatic Frequency was rotated through latch.

10, by claim 1,2,4 or 9 described testers, it is characterized in that: the integrated circuit socket on the guidance panel is contained in the outside of two row's display lamps, two row's level switches and two row's pin instrument connections, between two row's display lamps, two row's level switches and two row's pin instrument connections, the zone that can place an integrated circuit picture is arranged, and that is drawn on the picture that is placed on this zone two arranges in a row into circuit pins and aims at one by one with display lamp, level switch and pin instrument connection.

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