CN207801471U - A kind of Surge suppression protector - Google Patents
A kind of Surge suppression protector Download PDFInfo
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- CN207801471U CN207801471U CN201820064409.3U CN201820064409U CN207801471U CN 207801471 U CN207801471 U CN 207801471U CN 201820064409 U CN201820064409 U CN 201820064409U CN 207801471 U CN207801471 U CN 207801471U
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Abstract
A kind of Surge suppression protector, which is characterized in that including:With the Surge suppression chip of DC power supply input connection, the surge restraint circuit being connected between DC power supply input and DC power supply output;Circuit is protected with the reversal of power of DC power supply input connection, the input supply voltage detection circuit with DC power supply input connection;Circuit is adjusted with the output clamp voltage of DC power supply output connection.It can be with reversed input is protected, output clamping voltag is adjustable and has the Surge suppression protector of fault pre-alarming; protection can be reversed to input; it prevents input backward voltage and damages device, moreover it is possible to which overcurrent limits caused by there is short circuit to input overvoltage, input overcurrent and load.
Description
Technical field
The present invention relates to the control technologies in satellite communication, especially related with a kind of Surge suppression protector.
Background technology
Surge suppression is the problem of all electronic device designs can all be related in the process.Traditional DC voltage surge is protected
The design of shield device is designed alone or in combination using aerial drainages type devices such as varistor, gas-discharge tubes.This side
Formula, often by a surge impact, service life will shorten, and need larger pcb board area, increase encapsulation volume, no
Conducive to the development of miniaturization.
Invention content
For above-mentioned prior art deficiency, the present invention provides one kind can with reversed input protection, output clamping voltag
The Surge suppression protector of fault pre-alarming is adjusted and had, protection can be reversed to input, prevent input backward voltage and damage
Bad device, moreover it is possible to which overcurrent limits caused by there is short circuit to input overvoltage, input overcurrent and load.
In order to achieve the object of the present invention, intend using following technology:
A kind of Surge suppression protector, which is characterized in that including:
With the Surge suppression chip of DC power supply input connection, the current and voltage signals for receiving the detection of input terminal output end
And adjusting control order can be sent out;
The surge restraint circuit being connected between DC power supply input and DC power supply output, for responding Surge suppression chip
Output current voltage is adjusted in control signal;
Circuit is protected with the reversal of power of DC power supply input connection, for protecting successive load electricity when input voltage is reversed
Road;
With the input supply voltage detection circuit of DC power supply input connection, the Current Voltage for being inputted to DC power supply carries out
It detects and feeds back to Surge suppression chip;
Circuit is adjusted with the output clamp voltage of DC power supply output connection, for setting clamped voltage value and detecting DC power supply
The Current Voltage of output feeds back to Surge suppression chip;
Wherein, the input supply voltage detection circuit, surge restraint circuit, output clamp voltage adjust circuit and connect
Connect Surge suppression chip;
Wherein, Surge suppression chip is connected with pre-warning time setup module, and pre-warning time setup module is for completing early warning
Time is arranged;
Wherein, Surge suppression chip is also connected with fault pre-alarming output end, for exporting pre-warning signal.
Further, the surge restraint circuit includes metal-oxide-semiconductor QC2, resistance R8 and sampling resistor RS1, and reversal of power is protected
Protection circuit includes triode Q1, metal-oxide-semiconductor QC1, diode D2, resistance R5, resistance R6, wherein:
Sampling resistor RS1 is connected between the detection pin SNS of Surge suppression chip and output pin OUT, and samples electricity
The poles S of the one end RS1 connection metal-oxide-semiconductor QC2 are hindered, the other end connects DC power supply output, the S of the poles the D connection metal-oxide-semiconductor QC1 of metal-oxide-semiconductor QC2
The poles G of pole, metal-oxide-semiconductor QC2 connect resistance R8, the ends GATE of resistance R8 connection Surge suppression chips;
The poles the E connection DC power supply input of triode Q1, diode D2 are connected between the poles E of triode Q1 and the poles B, three poles
The poles B of pipe Q1 are grounded by resistance R5, the resistance R5 other ends also by the ends GATE of a capacitance C1 connection Surge suppression chips,
The poles the D connection DC power supply input of metal-oxide-semiconductor QC1, the poles G of metal-oxide-semiconductor QC1 connect resistance R6, resistance R6 other end connecting triodes Q1
The poles C, and the resistance R6 other ends pass through the ends GATE of a resistance R7 connection Surge suppression chips.
Further, the input supply voltage detection circuit includes resistance R2, resistance R3, resistance R4, and the one end resistance R2 connects
DC power supply input is connect, the other end connects the ends UV of resistance R3 and Surge suppression chip, and the resistance R3 other ends connect resistance R4 and wave
Gush the ends OV for inhibiting chip, resistance R4 other ends ground connection.
Further, it includes resistance R9 and resistance R10 that the output clamp voltage, which adjusts circuit, and the one end resistance R9 connects DC electricity
Source exports, and the other end connects the ends FB of resistance R10 and Surge suppression chip, resistance R10 other ends ground connection.
Further, the pre-warning time setup module includes charging capacitor C3, and the one end charging capacitor C3 connects Surge suppression
The ends TMR of chip, other end ground connection.
The beneficial effects of the invention are as follows:
1, the surge restraint circuit of this programme is controlled using power tube, and there is no can be subtracted by the service life after surge impact
Short problem;
2, device package dimension is small, saves pcb board space.
3, output clamp voltage is adjustable, is inputted for different DC, and it is pre- that its is arranged by output clamp voltage adjusting circuit
Fixed clamped voltage value, when overvoltage or overcurrent occurs in input, the voltage or current amplifier of chip interior can control surge
Suppression circuit adjusts output voltage to clamped voltage value;
4, there is reversed input to protect, ensure not damage circuit in input reverse-connection;
5, input overvoltage, overcurrent and load short circuits overcurrent can be adjusted, and ensure the safety of late-class circuit.In chip
Portion can charge to its timer pin, and when timer pin voltage reaches threshold value 1, fault pre-alarming exports (pre-warning time
It is determined by charging capacitor).If overvoltage or overcurrent are still lasting, timer pin is persistently electrically charged.When its voltage reaches threshold
When value 2, chip controls surge restraint circuit is closed, and subsequent load voltage is disconnected.When timer pin charging voltage reaches threshold
When value 3, which starts to discharge.When its voltage drop is as low as threshold value 4, as fruit chip detects input supply voltage detection circuit
The voltage of offer is still higher than its threshold value, then controller control surge restraint circuit is still within closed state, otherwise beats again
Surge restraint circuit is opened, is powered for successive load.
Description of the drawings
Fig. 1 is overall structure of the present invention.
Fig. 2 is control flow chart of the present invention.
Fig. 3 is the circuit structure diagram of an embodiment of the present invention.
Specific implementation mode
As shown in Figure 1, a kind of Surge suppression protector, including:With the Surge suppression chip of DC power supply input connection, it is used for
It receives the current and voltage signals of input terminal output end detection and adjusting control order can be sent out;It is connected to DC power supply input and DC electricity
Surge restraint circuit between the output of source, the control signal for responding Surge suppression chip adjust output current voltage
Section;Circuit is protected with the reversal of power of DC power supply input connection, for protecting successive load circuit when input voltage is reversed;With
The input supply voltage detection circuit of DC power supply input connection, for the Current Voltage that DC power supply inputs to be detected and fed back
Give Surge suppression chip;Circuit is adjusted with the output clamp voltage of DC power supply output connection, for setting clamped voltage value and examining
The Current Voltage for surveying DC power supply output feeds back to Surge suppression chip;Wherein, the input supply voltage detection circuit, surge
Suppression circuit, output clamp voltage adjust circuit and are all connected with Surge suppression chip;Wherein, when Surge suppression chip is connected with early warning
Between setup module, pre-warning time setup module for complete pre-warning time setting;Wherein, it is pre- to be also connected with failure for Surge suppression chip
Alert output end, for exporting pre-warning signal.
It is illustrated in figure 2 the control flow chart of the present invention, is inputted for different DC power supplies, by exporting clamp voltage tune
Its scheduled clamped voltage value is arranged in economize on electricity road, and when overvoltage or overcurrent occurs in input, the voltage or electric current of chip interior are put
Big device can control surge restraint circuit and adjust output voltage to clamped voltage value.Chip interior can carry out its timer pin
Charging, when timer pin voltage reaches threshold value 1, fault pre-alarming output, pre-warning time is determined by pre-warning time setup module.
If overvoltage or overcurrent are still lasting, timer pin is persistently electrically charged.When its voltage reaches threshold value 2, chip controls wave
Suppression circuit closing is gushed, subsequent load voltage is disconnected.When timer pin charging voltage reaches threshold value 3, which starts
Electric discharge.When its voltage drop is as low as threshold value 4, as fruit chip detects that the voltage that input supply voltage detection circuit provides is still high
In its threshold value, then controller control surge restraint circuit is still within closed state, otherwise reopens surge restraint circuit, is
Successive load is powered.
It is illustrated in figure 3 a kind of embodiment of the present invention, specifically, surge restraint circuit includes metal-oxide-semiconductor QC2, resistance R8
And sampling resistor RS1, reversal of power protection circuit includes triode Q1, metal-oxide-semiconductor QC1, diode D2, resistance R5, resistance R6,
Input supply voltage detection circuit includes resistance R2, resistance R3, resistance R4, output clamp voltage adjust circuit include resistance R9 and
Resistance R10, pre-warning time setup module include charging capacitor C3, and Surge suppression chip is LT4363.
Wherein:Sampling resistor RS1 is connected between the detection pin SNS of Surge suppression chip and output pin OUT, and is adopted
The one end sample resistance RS1 connects the poles S of metal-oxide-semiconductor QC2, and the other end connects DC power supply output, the poles the D connection metal-oxide-semiconductor QC1 of metal-oxide-semiconductor QC2
The poles S, the poles G of metal-oxide-semiconductor QC2 connect resistance R8, the ends GATE of resistance R8 connection Surge suppression chips.
The poles the E connection DC power supply input of triode Q1, diode D2 are connected between the poles E of triode Q1 and the poles B, two poles
Pipe D2 is rectifier diode, and from the poles E to the poles B for current direction, the poles B of triode Q1 are grounded setting direction by resistance R5, electricity
The R5 other ends are hindered also by the ends GATE of a capacitance C1 connection Surge suppression chips, the poles the D connection DC power supply of metal-oxide-semiconductor QC1 inputs,
The poles G of metal-oxide-semiconductor QC1 connect resistance R6, the poles C of resistance R6 other end connecting triodes Q1, and the resistance R6 other ends and pass through an electricity
Hinder the ends GATE of R7 connection Surge suppression chips.
The ends VCC of Surge suppression chip are inputted by a resistance R1 connection DC power supplies, are also connect by a zener diode D1
Ground, the ends the VCC connection/ends SHDN, the ends ENOUT are hanging, the ends /FLT connecting fault early warning output end, the ends GND ground connection.
The one end resistance R2 connects DC power supply input, and the other end connects the ends UV of resistance R3 and Surge suppression chip, resistance R3
The other end connects the ends OV of resistance R4 and Surge suppression chip, resistance R4 other ends ground connection.
The one end resistance R9 connects DC power supply output, and the other end connects the ends FB of resistance R10 and Surge suppression chip, resistance
The R10 other ends are grounded.
The one end charging capacitor C3 connects the ends TMR of Surge suppression chip, other end ground connection.
To which resistance R2, resistance R3, resistance R4 divide input voltage, and resistance R9 and resistance R10 are to output voltage
It is divided.Input supply voltage detection circuit and output clamp voltage adjust circuit and are accessed by way of electric resistance partial pressure
To under-voltage, the over-pressed and feedback pin of Surge suppression chip.The pre-warning times of charging capacitor C3 according to actual needs are selected
It selects.
When input voltage is reversed, reversal of power protects the triode Q1 conductings in circuit, and then makes the MOS being attached thereto
Pipe QC1 cut-offs damage load circuit to make backward voltage not to be input in successive load circuit.
When overvoltage occurs in input terminal, the feedback voltage of Surge suppression chip is by the reference voltage with builtin voltage amplifier
Differential amplification is carried out, to make voltage amplifier output voltage, the triode conducting of driving chip inside force surge restraint circuit
In metal-oxide-semiconductor QC2 gate discharge, to adjust output voltage to clamp value, output clamp voltage=Vfb (R9+R10)/
R10.The timer pin TMR of chip interior starts to charge to charging capacitor C3 at this time.When timer pin TMR voltages reach
When to threshold value 1, fault pre-alarming output.If overvoltage is still lasting, timer pin TMR is persistently electrically charged.When its voltage reaches
When to threshold value 2, chip controls surge restraint circuit is closed, and subsequent load voltage is disconnected.When timer pin TMR charging voltages
When reaching threshold value 3, pin TMR starts to discharge, when its voltage drop is as low as threshold value 4, as fruit chip detects input supply voltage
The voltage that detection circuit provides is still higher than its threshold value, then chip controls surge restraint circuit is still within closed state, otherwise
Surge restraint circuit is reopened, is powered for successive load.
When there is overcurrent or causes overcurrent to occur because of load short circuits in input terminal, the pressure difference core at the both ends sampling resistor RS1
Current amplifier inside piece is amplified, and is made triode conducting inside current amplifier output voltage driving chip, is forced wave
The gate discharge of the metal-oxide-semiconductor QC2 in suppression circuit is gushed, limitation flows out to the electric current of load, to adjust output voltage to clamper
Value.The timer pin TMR of chip interior starts to charge to charging capacitor C3 at this time.When timer pin TMR voltages reach
When to threshold value 1, fault pre-alarming output.If overcurrent is still lasting, timer pin TMR is persistently electrically charged.When its voltage reaches
When to threshold value 2, chip controls surge restraint circuit is closed, and subsequent load voltage is disconnected.When timer pin TMR charging voltages
When reaching threshold value 3, pin TMR starts to discharge, when its voltage drop is as low as threshold value 4, as fruit chip detects input supply voltage
The voltage that detection circuit provides is still higher than its threshold value, then chip controls surge restraint circuit is still within closed state, otherwise
Surge restraint circuit is reopened, is powered for successive load.
Claims (6)
1. a kind of Surge suppression protector, which is characterized in that including:
With the Surge suppression chip of DC power supply input connection, current and voltage signals and energy for receiving the detection of input terminal output end
Send out adjusting control order;
The surge restraint circuit being connected between DC power supply input and DC power supply output, the control for responding Surge suppression chip
Output current voltage is adjusted in signal;
Circuit is protected with the reversal of power of DC power supply input connection, for protecting successive load circuit when input voltage is reversed;
The input supply voltage detection circuit connected with DC power supply input, for being detected to the Current Voltage that DC power supply inputs
And feed back to Surge suppression chip;
Circuit is adjusted with the output clamp voltage of DC power supply output connection, for setting clamped voltage value and detecting DC power supply output
Current Voltage feed back to Surge suppression chip;
Wherein, the input supply voltage detection circuit, surge restraint circuit, output clamp voltage adjust circuit and are all connected with wave
Gush inhibition chip;
Wherein, Surge suppression chip is connected with pre-warning time setup module, and pre-warning time setup module is for completing pre-warning time
Setting;
Wherein, Surge suppression chip is also connected with fault pre-alarming output end, for exporting pre-warning signal.
2. Surge suppression protector according to claim 1, which is characterized in that the surge restraint circuit includes metal-oxide-semiconductor
QC2, resistance R8 and sampling resistor RS1, it includes triode Q1, metal-oxide-semiconductor QC1, diode D2, resistance that reversal of power, which protects circuit,
R5, resistance R6, wherein:
Sampling resistor RS1 is connected between the detection pin SNS of Surge suppression chip and output pin OUT, and sampling resistor RS1
One end connects the poles S of metal-oxide-semiconductor QC2, and the other end connects DC power supply output, the poles S of the poles the D connection metal-oxide-semiconductor QC1 of metal-oxide-semiconductor QC2, MOS
The poles G of pipe QC2 connect resistance R8, the ends GATE of resistance R8 connection Surge suppression chips;
The poles the E connection DC power supply input of triode Q1, diode D2 are connected between the poles E of triode Q1 and the poles B, triode Q1
The poles B be grounded by resistance R5, the resistance R5 other ends also pass through the ends GATE of a capacitance C1 connection Surge suppression chips, metal-oxide-semiconductor
The poles the D connection DC power supply input of QC1, the poles the G connection resistance R6 of metal-oxide-semiconductor QC1, the poles C of resistance R6 other end connecting triodes Q1,
And the resistance R6 other ends pass through the ends GATE of a resistance R7 connection Surge suppression chips.
3. Surge suppression protector according to claim 1, which is characterized in that the input supply voltage detection circuit packet
Resistance R2, resistance R3, resistance R4 are included, the one end resistance R2 connects DC power supply input, and the other end connects resistance R3 and Surge suppression core
The ends UV of piece, the resistance R3 other ends connect the ends OV of resistance R4 and Surge suppression chip, resistance R4 other ends ground connection.
4. Surge suppression protector according to claim 1, which is characterized in that the output clamp voltage adjusts circuit packet
Include resistance R9 and resistance R10, the one end resistance R9 connects DC power supply output, and the other end connects resistance R10 and Surge suppression chip
The ends FB, resistance R10 other ends ground connection.
5. Surge suppression protector according to claim 1, which is characterized in that the pre-warning time setup module includes filling
The one end capacitance C3, charging capacitor C3 connects the ends TMR of Surge suppression chip, other end ground connection.
6. Surge suppression protector according to claim 1, which is characterized in that the Surge suppression chip is LT4363.
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CN201820064409.3U CN207801471U (en) | 2018-01-16 | 2018-01-16 | A kind of Surge suppression protector |
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CN201820064409.3U CN207801471U (en) | 2018-01-16 | 2018-01-16 | A kind of Surge suppression protector |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108233351A (en) * | 2018-01-16 | 2018-06-29 | 四川安迪科技实业有限公司 | A kind of Surge suppression protector |
CN112694317A (en) * | 2020-12-30 | 2021-04-23 | 福建省佳美集团公司 | Formula of wear-resistant ceramic and preparation method of ceramic product |
-
2018
- 2018-01-16 CN CN201820064409.3U patent/CN207801471U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108233351A (en) * | 2018-01-16 | 2018-06-29 | 四川安迪科技实业有限公司 | A kind of Surge suppression protector |
CN112694317A (en) * | 2020-12-30 | 2021-04-23 | 福建省佳美集团公司 | Formula of wear-resistant ceramic and preparation method of ceramic product |
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