CN207717858U - The fundamental wave frequency measurement circuit of big distortion sinusoidal signal - Google Patents

Abstract

The utility model discloses a fundamental wave frequency measuring circuit of a large distortion sinusoidal signal. The utility model comprises an input signal electric stable amplitude circuit, a fundamental wave frequency extraction circuit and a voltage stabilizing circuit. The voltage stabilizing circuit supplies power to the input signal level stabilization circuit and the fundamental frequency extraction circuit. The single-chip microcomputer controls the output of the electronic potentiometer module through the control signal, and outputs an AC signal with a peak value of 1V after being buffered by the operational amplifier; the AC signal with a peak value of 1V enters the fundamental frequency extraction circuit and is divided into two channels, respectively entering the comparator IC3A and comparator IC3B perform comparison and shaping; output the shaped trigger signal at the set terminal S and reset terminal R respectively, and finally generate a pulse signal at the output terminal Q of the D flip-flop that is completely consistent with the fundamental signal frequency of the input signal . The utility model avoids the interference of each harmonic wave on the measurement of the fundamental frequency, makes the frequency of the output pulse signal consistent with the fundamental frequency of the input signal, and eliminates measurement errors.

Description

Fundamental Frequency Measurement Circuit of Large Distortion Sine Signal

technical field

The utility model belongs to the field of industrial measurement and control, relates to a circuit, in particular to a fundamental frequency measurement circuit of a large-distortion sinusoidal signal, which is suitable for measuring the fundamental frequency value of a large-distortion sinusoidal signal and performing feedback based on the frequency value control applications.

Background technique

The frequency measurement of the sine signal is generally shown in Figure 2. First, set a reference voltage value of about 0V, compare the real-time amplitude of the sine wave signal with the reference voltage value, output high and low levels, and then shape it into a square wave. Pulse signal, and then measure the frequency by pulse counting or measuring the pulse width.

Due to the large distortion, the sinusoidal signal is composed of the fundamental wave and various harmonics with large amplitudes. The waveform contains large harmonic components. The waveform curve of the sinusoidal signal is no longer a simple rise or fall. If the conventional frequency measurement method is still used, errors will occur, resulting in inaccurate frequency measurement. As shown in the distorted signals of B and C in Figure 2, there will be obvious measurement errors.

In order to improve the accuracy of frequency measurement, it is usually solved by changing the reference voltage value, as shown in Figure 3 and Figure 4. It can be seen from Figure 3 and Figure 4 that the measurement error of the fundamental frequency of some large-distortion sinusoidal signals can be improved by changing the reference level, but for the large-distortion asynchronous signal shown in C of Figure 3 and Figure 4 There is still an error in the fundamental frequency measurement.

Contents of the invention

The purpose of the utility model is to propose a fundamental wave frequency measurement circuit of a large distortion sinusoidal signal aiming at the deficiencies in the prior art.

The technical solution adopted by the utility model to solve its technical problems is as follows:

The fundamental frequency measuring circuit of the large distorted sinusoidal signal includes an input signal electric amplitude stabilization circuit, a fundamental frequency extraction circuit and a voltage stabilizing circuit.

The input signal level stabilization circuit includes electronic potentiometer module IC1, operational amplifier IC2, potentiometer W2, resistor R1, resistor R2, resistor R3, resistor R59, resistor R61, resistor R79 and electrolytic capacitor C2; electronic potentiometer module IC1 3 Pins 1, 4, and 5 are respectively connected to one end of resistor R1, resistor R2, and resistor R3, and the other ends of resistor R1, resistor R2, and resistor R3 are respectively connected to the I/O output pins of the external microcontroller, and the I/O of the microcontroller O output pins output control signals CS5, SDI, CLK to control the output of electronic potentiometer module IC1; pin 2 of electronic potentiometer module IC1 is grounded, and pins 1 and 6 are respectively connected to 2.5V power supply and 5V power supply; electronic potentiometer Pin 7 of the module IC1 is connected to one end of the resistor R79, and the other end of the resistor R79 is connected to one end of the resistor R59 and pin 2 of the operational amplifier IC2 at the same time, and the other end of the resistor R59 is connected to the sliding end of the potentiometer W2 The resistance terminal of the potentiometer W2 is connected with the output terminal VIN1 of the operational amplifier IC2 and the positive electrode of the electrolytic capacitor C2 at the same time, the No. 3 pin of the operational amplifier IC2 is connected with one end of the resistor R61, and the other end of the resistor R61 is externally connected to 2.5 V power supply; the No. 4 pin of the operational amplifier IC2 is grounded, and the No. 8 pin of the operational amplifier IC2 is connected to an external 5V power supply; the output terminal VIN1 of the operational amplifier IC2 is connected with the I/O input pin AD-OUT of the external microcontroller.

The fundamental frequency extraction circuit includes D flip-flop IC4, comparator IC3, connector XJ13, resistor R57, resistor R60, resistor R62, resistor R63, resistor R73, resistor R82, resistor R88, resistor R89, resistor R90, resistor R93, resistor R94, resistor R95, resistor R96, resistor R100, resistor R103, ceramic capacitor C90, ceramic capacitor C93, ceramic capacitor C94, ceramic capacitor C107, electrolytic capacitor C97, electrolytic capacitor C98, potentiometer W4 and potentiometer W8. Pin 1 of D flip-flop IC4 is connected to one end of resistor R73, and the other end of resistor R73 is connected to one end of ceramic capacitor C107 and pin 1 of connector XJ13, and pin 2 of connector XJ13 is connected to The other end of ceramic capacitor C107 is connected and grounded; pin 7 of D flip-flop IC4 is grounded, pin 14 of D flip-flop IC4 is connected to an external 5V power supply; pin 4 of D flip-flop IC4 is connected to one end of resistor R60 Connect, the other end of resistor R60 is connected with one end of resistor R62, one end of resistor R89, and No. 7 pin of comparator IC3; No. 5 pin of comparator IC3 is connected with one end of ceramic capacitor C90, the other One end is connected to one end of resistor R96; No. 6 pin of comparator IC3 is connected to one end of resistor R94; the other end of ceramic capacitor C90 is connected to the negative pole of electrolytic capacitor C97 and one end of resistor R82 is connected to ground at the same time; resistor R96 The other end of the electrolytic capacitor C97 is connected to the positive pole of the electrolytic capacitor C97 and the sliding end of the potentiometer W4, and the two resistance ends of the potentiometer W4 are respectively connected to the other end of the resistor R82 and one end of the resistor R103; the other end of the resistor R94 is simultaneously connected to the resistor One end of R95 is connected to the negative electrode of electrolytic capacitor C2; the No. 6 pin of D flip-flop IC4 is connected to one end of resistor R57, and the other end of resistor R57 is connected to one end of resistor R63, one end of resistor R90, and one end of comparator IC3 Pin 1 is connected; pin 8 of comparator IC3 is connected with the other end of resistor R63, the other end of resistor R62, and one end of ceramic capacitor C93 at the same time, and an external 5V power supply is connected, and the other end of ceramic capacitor C93 is grounded ; The No. 3 pin of the comparator IC3 is connected with the other end of the resistor R90 and the other end of the resistor R95 at the same time; the No. 2 pin of the comparator IC3 is connected with one end of the resistor R100 and one end of the ceramic capacitor C94 at the same time, and the resistor The other end of R100 is connected with the sliding end of potentiometer W8 and the positive pole of electrolytic capacitor C98; the two resistance ends of potentiometer W8 are respectively connected with one end of resistor R88 and one end of resistor R93; the other end of resistor R88 is connected with the resistor The other end of R103 is connected to an external 5V power supply; the No. 4 pin of comparator IC3 is connected with the other end of ceramic capacitor C94, the negative electrode of electrolytic capacitor C98, and the other end of resistor R93, and is grounded.

The voltage stabilizing circuit includes voltage stabilizing module IC11, resistor R36, resistor R39, resistor R43, resistor R44, ceramic capacitor C15, ceramic capacitor C16, ceramic capacitor C17, electrolytic capacitor C22, electrolytic capacitor C27, electrolytic capacitor C28, potentiometer W3. Pin 1 of voltage stabilizing module IC11 is connected with one end of resistor R43 and one end of resistor R44 at the same time, and the other end of resistor R43 is connected with one end of ceramic capacitor C16, negative pole of electrolytic capacitor C27, negative pole of electrolytic capacitor C28, ceramic One end of chip capacitor C17 is connected and grounded; No. 3 pin of voltage stabilizing module IC11 is connected with the other end of ceramic chip capacitor C16, positive pole of electrolytic capacitor C27, and power input terminal VIN at the same time; No. 2 pin of voltage stabilizing module IC11 The pin is connected to one end of the resistor R44, the positive pole of the electrolytic capacitor C28, and the other end of the ceramic capacitor C17 and connected to the 5V power supply output; the two resistor ends of the potentiometer W3 are respectively connected to one end of the resistor R39 and one end of the resistor R36; The other end of the resistor R39 is connected to an external 5V power supply, and the other end of the resistor R36 is simultaneously connected to the negative pole of the electrolytic capacitor C22 and one end of the ceramic capacitor C15 and grounded; the sliding end of the potentiometer W3 is simultaneously connected to the positive pole of the electrolytic capacitor C22 and the ceramic capacitor The other end of C15 is connected to an external 2.5V power supply.

The voltage stabilizing circuit provides the required 5V working voltage and 2.5V reference voltage for the input signal level stabilization circuit and the fundamental frequency extraction circuit.

The utility model work process is as follows:

The external microcontroller controls the amplitude of the output signal of the electronic potentiometer module IC1 through the control signals CS5, SDI, and CLK. The input large-distortion sinusoidal signal VIN2 is buffered by the operational amplifier IC2 and outputs a large-distortion sinusoidal signal with a stable peak value of 1V. The AC signal VIN1 with a stable peak value of 1V provides an amplitude feedback signal through the input pin AD-OUT of an external microcontroller. The AC signal with a peak value of 1V enters the fundamental frequency extraction circuit and is divided into two paths, which respectively enter the comparator IC3A and comparator IC3B for comparison and shaping. The reference level of the comparison circuit is set to about +30% and -30% of 1V by potentiometers W4 and W8, about +0.3V and -0.3V. Since the whole circuit is powered by a single power supply of 5V, the reference voltage is not the usual 0V but 2.5V, so the two comparison reference voltages are 2.5+0.3=2.8V and 2.5-0.3=2.2V respectively. Input the shaped trigger signal respectively at the set terminal S of the D flip-flop (connected to pin 1 of comparator IC3A) and reset terminal R of the D flip-flop (connected to pin 7 of comparator IC3B), as shown in Figure 5 shown in a and b. Finally, at the output terminal Q of the D flip-flop, a pulse signal with the same frequency as the fundamental signal of the input signal is generated, as shown in d of FIG. 5 .

The beneficial effects of the utility model are as follows:

The utility model can still separate the sine wave fundamental frequency signal containing the harmonic signal from the clutter under the condition of a large distortion signal. Form a square wave pulse signal with the same frequency as the fundamental wave. Therefore, the fundamental frequency of the large distorted sinusoidal signal can be measured conveniently and accurately.

The utility model avoids the interference of each harmonic wave on the measurement of the fundamental frequency, makes the frequency of the output pulse signal completely consistent with the fundamental frequency of the input signal, and completely eliminates the measurement error.

Description of drawings

Fig. 1 is the circuit diagram of the utility model

Figure 2 is a frequency measurement diagram of a sinusoidal signal.

Fig. 3 is a schematic diagram of using 60% of the peak value of the waveform as the reference level.

FIG. 4 is a schematic diagram of using 30% of the peak value of the waveform as the reference level.

Figure 5 is a schematic diagram of waveform synthesis using two reference voltage values.

Detailed ways

Below in conjunction with accompanying drawing, the utility model is further described.

As shown in Figure 1, the fundamental frequency measurement circuit of a large distorted sine signal includes an input signal level stabilization circuit, a fundamental frequency extraction circuit and a voltage stabilization circuit.

The input signal level stabilization circuit includes electronic potentiometer module IC1, operational amplifier IC2, potentiometer W2, resistor R1, resistor R2, resistor R3, resistor R59, resistor R61, resistor R79 and electrolytic capacitor C2; electronic potentiometer module IC1 3 Pins 1, 4, and 5 are respectively connected to one end of resistor R1, resistor R2, and resistor R3, and the other ends of resistor R1, resistor R2, and resistor R3 are respectively connected to the I/O output pins of the external microcontroller, and the I/O of the microcontroller O output pins output control signals CS5, SDI, CLK to control the output of the electronic potentiometer module IC1; the 8th pin of the electronic potentiometer module IC1 is connected to the input terminal VIN2 of the large distortion sine signal; Pin 1 and pin 6 are connected to 2.5V power supply and 5V power supply respectively; pin 7 of electronic potentiometer module IC1 is connected to one end of resistor R79, and the other end of resistor R79 is connected to one end of resistor R59 and the operational amplifier The No. 2 pin of IC2 is connected, the other end of the resistor R59 is connected with the sliding end of the potentiometer W2, the resistance end of the potentiometer W2 is connected with the output terminal VIN1 of the operational amplifier IC2, and the positive electrode of the electrolytic capacitor C2, and the operational amplifier IC2 The No. 3 pin of the resistor R61 is connected to one end of the resistor R61, and the other end of the resistor R61 is connected to a 2.5V power supply; the No. 4 pin of the operational amplifier IC2 is grounded, and the No. 8 pin of the operational amplifier IC2 is connected to an external 5V power supply; the output of the operational amplifier IC2 The terminal VIN1 is connected with the I/O output pin AD-OUT of the external microcontroller.

The fundamental frequency extraction circuit includes D flip-flop IC4, comparator IC3, connector XJ13, resistor R57, resistor R60, resistor R62, resistor R63, resistor R73, resistor R82, resistor R88, resistor R89, resistor R90, resistor R93, resistor R94, resistor R95, resistor R96, resistor R100, resistor R103, ceramic capacitor C90, ceramic capacitor C93, ceramic capacitor C94, ceramic capacitor C107, electrolytic capacitor C97, electrolytic capacitor C98, potentiometer W4 and potentiometer W8. Pin 1 of D flip-flop IC4 is connected to one end of resistor R73, and the other end of resistor R73 is connected to one end of ceramic capacitor C107 and pin 1 of connector XJ13, and pin 2 of connector XJ13 is connected to The other end of ceramic capacitor C107 is connected and grounded; pin 7 of D flip-flop IC4 is grounded, pin 14 of D flip-flop IC4 is connected to an external 5V power supply; pin 4 of D flip-flop IC4 is connected to one end of resistor R60 Connect, the other end of resistor R60 is connected with one end of resistor R62, one end of resistor R89, and No. 7 pin of comparator IC3; No. 5 pin of comparator IC3 is connected with one end of ceramic capacitor C90, the other One end is connected to one end of resistor R96; No. 6 pin of comparator IC3 is connected to one end of resistor R94; the other end of ceramic capacitor C90 is connected to the negative pole of electrolytic capacitor C97 and one end of resistor R82 is connected to ground at the same time; resistor R96 The other end of the electrolytic capacitor C97 is connected to the positive pole of the electrolytic capacitor C97 and the sliding end of the potentiometer W4, and the two resistance ends of the potentiometer W4 are respectively connected to the other end of the resistor R82 and one end of the resistor R103; the other end of the resistor R94 is simultaneously connected to the resistor One end of R95 is connected to the negative electrode of electrolytic capacitor C2; the No. 6 pin of D flip-flop IC4 is connected to one end of resistor R57, and the other end of resistor R57 is connected to one end of resistor R63, one end of resistor R90, and one end of comparator IC3 Pin 1 is connected; pin 8 of comparator IC3 is connected with the other end of resistor R63, the other end of resistor R62, and one end of ceramic capacitor C93 at the same time, and an external 5V power supply is connected, and the other end of ceramic capacitor C93 is grounded ; The No. 3 pin of the comparator IC3 is connected with the other end of the resistor R90 and the other end of the resistor R95 at the same time; the No. 2 pin of the comparator IC3 is connected with one end of the resistor R100 and one end of the ceramic capacitor C94 at the same time, and the resistor The other end of R100 is connected with the sliding end of potentiometer W8 and the positive pole of electrolytic capacitor C98; the two resistance ends of potentiometer W8 are respectively connected with one end of resistor R88 and one end of resistor R93; the other end of resistor R88 is connected with the resistor The other end of R103 is connected to an external 5V power supply; the No. 4 pin of comparator IC3 is connected with the other end of ceramic capacitor C94, the negative electrode of electrolytic capacitor C98, and the other end of resistor R93, and is grounded.

The voltage stabilizing circuit includes voltage stabilizing module IC11, resistor R36, resistor R39, resistor R43, resistor R44, ceramic capacitor C15, ceramic capacitor C16, ceramic capacitor C17, electrolytic capacitor C22, electrolytic capacitor C27, electrolytic capacitor C28, potentiometer W3. Pin 1 of voltage stabilizing module IC11 is connected with one end of resistor R43 and one end of resistor R44 at the same time, and the other end of resistor R43 is connected with one end of ceramic capacitor C16, negative pole of electrolytic capacitor C27, negative pole of electrolytic capacitor C28, ceramic One end of chip capacitor C17 is connected and grounded; No. 3 pin of voltage stabilizing module IC11 is connected with the other end of ceramic chip capacitor C16, positive pole of electrolytic capacitor C27, and power input terminal VIN at the same time; No. 2 pin of voltage stabilizing module IC11 The pin is connected to one end of the resistor R44, the positive pole of the electrolytic capacitor C28, and the other end of the ceramic capacitor C17 and connected to the 5V power supply output; the two resistor ends of the potentiometer W3 are respectively connected to one end of the resistor R39 and one end of the resistor R36; The other end of the resistor R39 is connected to an external 5V power supply, and the other end of the resistor R36 is simultaneously connected to the negative pole of the electrolytic capacitor C22 and one end of the ceramic capacitor C15 and grounded; the sliding end of the potentiometer W3 is simultaneously connected to the positive pole of the electrolytic capacitor C22 and the ceramic capacitor The other end of C15 is connected to an external 2.5V power supply.

The voltage stabilizing circuit provides the required 5V working voltage and 2.5V reference voltage for the input signal level stabilization circuit and the fundamental frequency extraction circuit.

The model of the utility model potentiometer W2, W3, W4, W8 is 3362, and W2 is 5K, W3 is 500K, W4, W8 are 2K; the connector model is SIP2-M-1; the model of operational amplifier IC2 is DIP8TL082; The model of electronic potentiometer module IC1 is SO-8AD8400; the model of voltage regulator module IC11 is SOT-223BW1117-3.3V; the model of comparator IC3 is DIP8LM393.

The utility model work process is as follows:

The external microcontroller controls the amplitude of the output signal of the electronic potentiometer module IC1 through the control signals CS5, SDI, and CLK. The input large-distortion sinusoidal signal VIN2 is buffered by the operational amplifier IC2 and outputs a large-distortion sinusoidal signal with a stable peak value of 1V. The AC signal VIN1 with a stable peak value of 1V provides an amplitude feedback signal through the input pin AD-OUT of an external microcontroller. The AC signal with a peak value of 1V enters the fundamental frequency extraction circuit and is divided into two paths, which respectively enter the comparator IC3A and comparator IC3B for comparison and shaping. The reference level of the comparison circuit is set to about +30% and -30% of 1V by potentiometers W4 and W8, about +0.3V and -0.3V. Since the entire circuit is powered by a single power supply of 5V, the reference voltage is not the usual 0V but 2.5V, and two comparison reference voltages are 2.5+0.3=2.8V and 2.5-0.3=2.2V. Input the shaped trigger signal respectively at the set terminal S of the D flip-flop (connected to pin 1 of comparator IC3A) and reset terminal R of the D flip-flop (connected to pin 7 of comparator IC3B), as shown in Figure 5 shown in a and b. Only when the set signal and reset signal appear alternately, the D flip-flop will have a level change, and the interference signal with a voltage amplitude between 2.2V and 2.8V is automatically ignored by the D flip-flop, as shown in c of Figure 5 Finally, at the output terminal Q of the D flip-flop, a pulse signal with the same frequency as the fundamental signal of the input signal is generated, as shown in d of Figure 5.

As shown in Figure 5, two reference voltage values are set in the circuit, which are +30% and -30% of the peak value of the input signal voltage, and two different comparison signals are output. These two signals drive a D flip-flop respectively. Set terminal S and reset terminal R. After the set terminal S is triggered once, as long as there is no reset again, no matter how many times the set terminal S is triggered next, there will be a set situation. In the same way, after triggering the reset terminal R once, as long as it is not set again, no matter how many times the reset terminal R is triggered next, there will only be one reset. Combined with the situation in Figure 5, the fundamental frequency extraction circuit using two reference voltage values will trigger a reset only if the input signal is from the amplitude below +30% peak value to the amplitude above +30% peak value for the first time after reset. bit and thereafter will not be set again regardless of whether the input signal is lower than +30% peak amplitude or higher than +30% peak amplitude until the signal is not lower than -30% peak amplitude to cause a reset; only the input signal A reset will be triggered for the first time after being set from an amplitude above -30% peak until an amplitude below -30% peak and thereafter regardless of the input before the signal is not higher than +30% peak amplitude. Whether the signal's amplitude is below -30% peak or above -30% peak will not generate a reset again. That is to say, only when the set signal and reset signal appear alternately, the D flip-flop will have a level change, and the voltage amplitude is caused by the alternating change of the voltage amplitude around -30% peak value and the alternate change around +30% peak value. The trigger signal is automatically ignored by the D flip-flop, as shown in c of Figure 5, thereby avoiding the interference of each harmonic on the measurement of the fundamental frequency, so that the frequency of the output pulse signal is exactly the same as the fundamental frequency of the input signal , completely eliminating measurement errors.

Claims (2)

1. the fundamental wave frequency measurement circuit of distortion sinusoidal signal greatly, including the extraction of incoming signal level fixed amplitude circuit, fundamental frequency Circuit and regulator circuit, regulator circuit is incoming signal level fixed amplitude circuit, fundamental frequency extraction circuit provides required 5V works Make voltage and the reference voltage of 2.5V, it is characterised in that

Incoming signal level fixed amplitude circuit include electronic potentiometer module IC1, operational amplifier IC2, potentiometer W2, resistance R1, Resistance R2, resistance R3, resistance R59, resistance R61, resistance R79 and electrolytic capacitor C2；3,4, No. 5 of electronic potentiometer module IC1 Pin is connected with one end of resistance R1, resistance R2, resistance R3 respectively, resistance R1, resistance R2, resistance R3 the other end respectively with outside The I/O output pins for connecing microcontroller are connected, I/O output pins output control signal CS5, SDI, CLK control electricity of microcontroller The output of sub- potentiometer module IC1；No. 2 pins of electronic potentiometer module IC1 are grounded, and 1, No. 6 pin distinguishes external 2.5V electricity Source and 5V power supplys；No. 7 pins of electronic potentiometer module IC1 are connected with one end of resistance R79, and the other end of resistance R79 is same When be connected with No. 2 pins of one end of resistance R59, operational amplifier IC2, the sliding of the other end and potentiometer W2 of resistance R59 End is connected, and the resistance terminal of potentiometer W2 is connected with the anode of the output end VIN1 of operational amplifier IC2, electrolytic capacitor C2 simultaneously It connects, No. 3 pins of operational amplifier IC2 are connected with one end of resistance R61, the external 2.5V power supplys of the other end of resistance R61；Fortune Calculate No. 4 pins ground connection of amplifier IC2, the external 5V power supplys of No. 8 pins of operational amplifier IC2；The output of operational amplifier IC2 End VIN1 is connected with the I/O input pins AD-OUT of external microcontroller；

It includes d type flip flop IC4, comparator IC3, connector XJ13, resistance R57, resistance R60, resistance that fundamental frequency, which extracts circuit, R62, resistance R63, resistance R73, resistance R82, resistance R88, resistance R89, resistance R90, resistance R93, resistance R94, resistance R95, Resistance R96, resistance R100, resistance R103, ceramic disc capacitor C90, ceramic disc capacitor C93, ceramic disc capacitor C94, ceramic disc capacitor C107, electricity Solve capacitance C97, electrolytic capacitor C98, potentiometer W4 and potentiometer W8；No. 1 pin of d type flip flop IC4 connects with one end of resistance R73 It connects, the other end of resistance R73 is connected with No. 1 pin of one end of ceramic disc capacitor C107, connector XJ13 simultaneously, connector No. 2 pins of XJ13 are connected and are grounded with the other end of ceramic disc capacitor C107；No. 7 pins of d type flip flop IC4 are grounded, d type flip flop The external 5V power supplys of No. 14 pins of IC4；No. 4 pins of d type flip flop IC4 are connected with one end of resistance R60, and resistance R60's is another One end is connected with No. 7 pins of one end of resistance R62, one end of resistance R89, comparator IC3 simultaneously；No. 5 of comparator IC3 Pin is connected with one end of one end of ceramic disc capacitor C90, the other end of resistance R89, resistance R96；No. 6 of comparator IC3 are drawn Foot is connected with one end of resistance R94；One end of the other end of ceramic disc capacitor C90 and the cathode of electrolytic capacitor C97, resistance R82 It is connected while is grounded；The other end of resistance R96 is connected with the sliding end of the anode of electrolytic capacitor C97, potentiometer W4, current potential Two resistance terminals of device W4 are connected with one end of the other end of resistance R82, resistance R103 respectively；The other end of resistance R94 is same When be connected with the cathode of one end of resistance R95, electrolytic capacitor C2；One end phase of No. 6 pins and resistance R57 of d type flip flop IC4 The other end of connection, resistance R57 is connected with No. 1 pin of one end of resistance R63, one end of resistance R90, comparator IC3 simultaneously It connects；No. 8 pins of comparator IC3 while one end with the other end of resistance R63, the other end of resistance R62, ceramic disc capacitor C93 It is connected and external 5V power supplys, the other end of ceramic disc capacitor C93 is grounded；No. 3 pins of comparator IC3 are simultaneously with resistance R90's The other end, resistance R95 the other end be connected；No. 2 pins of comparator IC3 while one end with resistance R100, ceramic disc capacitor One end of C94 is connected, and the other end of resistance R100 is connected with the anode of the sliding end of potentiometer W8, electrolytic capacitor C98 simultaneously It connects；Two resistance terminals of potentiometer W8 are connected with one end of one end of resistance R88, resistance R93 respectively；Resistance R88's is another The external 5V power supplys of the other end at end and resistance R103；No. 4 pins of comparator IC3 simultaneously with the other end of ceramic disc capacitor C94, The cathode of electrolytic capacitor C98, the other end of resistance R93 are connected and are grounded；

Regulator circuit includes Voltage stabilizing module IC11, resistance R36, resistance R39, resistance R43, resistance R44, ceramic disc capacitor C15, tile Capacitance C16, ceramic disc capacitor C17, electrolytic capacitor C22, electrolytic capacitor C27, electrolytic capacitor C28, potentiometer W3；Voltage stabilizing module IC11 No. 1 pin be connected simultaneously with one end of one end of resistance R43, resistance R44, the other end of resistance R43 simultaneously with tile electricity Hold one end of C16, the cathode of electrolytic capacitor C27, the cathode of electrolytic capacitor C28, ceramic disc capacitor C17 one end be connected and connect Ground；No. 3 pins of Voltage stabilizing module IC11 simultaneously with the other end of ceramic disc capacitor C16, the anode of electrolytic capacitor C27, power input End VIN is connected；No. 2 pins of Voltage stabilizing module IC11 are electric with one end of resistance R44, the anode of electrolytic capacitor C28, tile simultaneously The other end for holding C17 is connected and connection 5V power supplys output；Two resistance terminals of potentiometer W3 respectively with one end of resistance R39, electricity One end of resistance R36 is connected；The external 5V power supplys of the other end of resistance R39, the other end of resistance R36 simultaneously with electrolytic capacitor C22 Cathode, ceramic disc capacitor C15 one end be connected and be grounded；The sliding end of potentiometer W3 simultaneously with the anode of electrolytic capacitor C22, The other end of ceramic disc capacitor C15 is connected and external 2.5V power supplys export.

2. the fundamental wave frequency measurement circuit of big distortion sinusoidal signal according to claim 1, it is characterised in that potentiometer W2, The model 3362 of W3, W4, W8, and W2 is 5K, W3 500K, W4, W8 2K；Connector model SIP2-M-1；Operation is put The model DIP8TL082 of big device IC2；The model SO-8AD8400 of electronic potentiometer module IC1；Voltage stabilizing module IC11 models For SOT-223BW1117-3.3V；Comparator IC3 models DIP8LM393.