CN207442800U - A kind of IF Logarithmic Amplifier - Google Patents

A kind of IF Logarithmic Amplifier Download PDF

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Publication number
CN207442800U
CN207442800U CN201721115431.8U CN201721115431U CN207442800U CN 207442800 U CN207442800 U CN 207442800U CN 201721115431 U CN201721115431 U CN 201721115431U CN 207442800 U CN207442800 U CN 207442800U
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China
Prior art keywords
effect transistor
signal
resistance
analog
digital converter
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CN201721115431.8U
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Chinese (zh)
Inventor
李勃轶
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Chengdu Song Source Electronic Technology Co Ltd
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Chengdu Song Source Electronic Technology Co Ltd
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Priority to CN201721115431.8U priority Critical patent/CN207442800U/en
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Abstract

The utility model discloses a kind of IF Logarithmic Amplifiers, including signal deteching circuit, signal filter and gain adjusting circuit, signal deteching circuit input terminal connects signal receiver output terminal, signal deteching circuit connects gain adjusting circuit by signal filter, the utility model structural principle is simple, effectively the gain of input signal can be adjusted, it is ensured that export the stability of signal, while also there is signal detection and filtering.

Description

A kind of IF Logarithmic Amplifier
Technical field
The utility model is related to amplifier technique fields, are specially a kind of IF Logarithmic Amplifier.
Background technology
Logafier refers to amplifying circuit of the amplitude output signal with input signal amplitude in logarithmic function relation.It is actual Logafier always have both linear and logarithmic amplification function, when input signal is weak, it is a linear amplifier, gain compared with Greatly;When input signal is strong, it becomes logafier, and gain reduces with the increase of input signal.Logafier is in radar There is especially important effect in equipment.It can not only ensure that radar receiver has very wide dynamic range, but also can limit The noise jamming level of receiver output, achievees the effect that constant false alarm.
Radar of the prior art is low with logafier output gain signal adjusting efficiency, and stable output signal is poor.
Utility model content
It is mentioned above in the background art to solve the purpose of this utility model is to provide a kind of IF Logarithmic Amplifier Problem.
To achieve the above object, the utility model provides following technical solution:A kind of IF Logarithmic Amplifier, including signal Detection circuit, signal filter and gain adjusting circuit, the signal deteching circuit input terminal connect signal receiver output terminal, The signal deteching circuit connects gain adjusting circuit by signal filter.
Preferably, the gain adjusting circuit includes the first analog-digital converter, the second analog-digital converter, dsp chip and fortune Amplifier is calculated, the operational amplifier negative input connects resistance C one end and resistance D one end, the operational amplifier respectively Electrode input end connects the resistance D other ends and power end respectively, the operational amplifier output terminal connect respectively resistance B one end and Second analog-digital converter one end, described first analog-digital converter one end connection resistance C one end, first analog-digital converter are another End, the second analog-digital converter other end connect dsp chip respectively, and the dsp chip connects signal output part;The resistance B is another One end connection resistance A one end, resistance A other end connecting valves.
Preferably, the signal deteching circuit include field-effect transistor A, field-effect transistor B, field-effect transistor C, Field-effect transistor D and field-effect transistor E, the field-effect transistor A drain electrodes connection voltage end, grid connect signal output End, source electrode connection field-effect transistor B drain electrode, the field-effect transistor B drain electrodes connect respectively field-effect transistor C drain electrodes, Field-effect transistor D drains and connects vdd terminal, and the field-effect transistor B grids connect field-effect transistor C grids, the field Effect transistor C-source connects resistance E one end, capacitance one end and field-effect transistor E grids, the field-effect transistor respectively D grounded-grids, source electrode connection field-effect transistor E source electrodes, the field-effect transistor E drain electrodes, the capacitance other end and resistance E are another One end is grounded.
Preferably, the signal filter model JY-S600.
Compared with prior art, the beneficial effects of the utility model are:
(1) the utility model structural principle is simple, wherein, the gain adjusting circuit of use can accurately measure the reality of amplifier Border yield value, and then effectively the gain of input signal can be adjusted, it is ensured that the stability of signal is exported, so as to protect Reach target gain value on the premise of card amplifier stability.
(2) in the utility model, the signal deteching circuit of use, which can be realized, carries out the signal of signal receiver output Quick detection, convenient for the gain-adjusted subsequently to detecting signal.
Description of the drawings
Fig. 1 is the utility model structure principle chart;
Fig. 2 is the utility model gain adjusting circuit schematic diagram;
Fig. 3 is the utility model signal deteching circuit schematic diagram.
Specific embodiment
The following is a combination of the drawings in the embodiments of the present utility model, and the technical scheme in the embodiment of the utility model is carried out It clearly and completely describes, it is clear that the described embodiments are only a part of the embodiments of the utility model rather than whole Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are without making creative work All other embodiments obtained shall fall within the protection scope of the present invention.
- 3 are please referred to Fig.1, the utility model provides a kind of technical solution:A kind of IF Logarithmic Amplifier is examined including signal Slowdown monitoring circuit 1, signal filter 2 and gain adjusting circuit 3,1 input terminal of the signal deteching circuit connection signal receiver 4 export End, the signal deteching circuit 1 connect gain adjusting circuit 3 by signal filter 2;2 model JY- of signal filter S600.The signal filter strong antijamming capability of use, can effectively resist radio frequency interference.
In the utility model, gain adjusting circuit 3 includes the first analog-digital converter 5, the second analog-digital converter 6, dsp chip 7 and operational amplifier 8,8 negative input of operational amplifier connects resistance C3a one end and resistance D4a one end respectively, described 8 electrode input end of operational amplifier connects the resistance D4a other ends and power end, 8 output terminal of the operational amplifier difference respectively 6 one end of resistance B2a one end and the second analog-digital converter is connected, described first analog-digital converter, 5 one end connects resistance C3a one end, First analog-digital converter, 5 other end, 6 other end of the second analog-digital converter connect dsp chip 7, the dsp chip 7 respectively Connect signal output part;Described resistance B2a other ends connection resistance A1a one end, resistance A1a other ends connecting valve 10.This reality The actual gain value of amplifier can be accurately measured with the gain adjusting circuit of new use, and then can be effectively to input signal Gain be adjusted, it is ensured that export the stability of signal, so as to ensure amplifier stability on the premise of reach target gain Value.
In the utility model, signal deteching circuit 1 includes field-effect transistor A1b, field-effect transistor B2b, field-effect Transistor C3b, field-effect transistor D4b and field-effect transistor E5b, the field-effect transistor A1b drain electrodes connection voltage end, Grid connects signal output part, source electrode connection field-effect transistor B2b drain electrodes, and the field-effect transistor B2b drain electrodes connect respectively Field-effect transistor C3b drain electrodes, field-effect transistor D4b drain and connect vdd terminal, and the field-effect transistor B2b grids connect Field-effect transistor C3b grids, the field-effect transistor C3b source electrodes connect resistance E5a one end, 9 one end of capacitance and field respectively Effect transistor E5b grids, the field-effect transistor D4b grounded-grids, source electrode connection field-effect transistor E5b source electrodes, institute Field-effect transistor E5b drain electrodes, 9 other end of capacitance and the resistance E5a other ends is stated to be grounded.The signal deteching circuit of use can It realizes and the signal of signal receiver output is used for quickly detecting, convenient for the gain-adjusted subsequently to detecting signal.
Operation principle:The signal of signal deteching circuit real time detection signal receiver output, the signal detected pass through letter Number wave filter is filtered, and filtered signal adjusts the gain of output signal by gain adjusting circuit afterwards, so as to Ensure to reach target gain value on the premise of amplifier stability.
While there has been shown and described that the embodiment of the utility model, for the ordinary skill in the art, It is appreciated that in the case where not departing from the principle of the utility model and spirit can these embodiments be carried out with a variety of variations, repaiied Change, replace and modification, the scope of the utility model are defined by the appended claims and the equivalents thereof.

Claims (4)

1. a kind of IF Logarithmic Amplifier, including signal deteching circuit (1), signal filter (2) and gain adjusting circuit (3), It is characterized in that:Signal deteching circuit (1) input terminal connects signal receiver (4) output terminal, the signal deteching circuit (1) gain adjusting circuit (3) is connected by signal filter (2).
2. a kind of IF Logarithmic Amplifier according to claim 1, it is characterised in that:Gain adjusting circuit (3) bag Include the first analog-digital converter (5), the second analog-digital converter (6), dsp chip (7) and operational amplifier (8), the operation amplifier Device (8) negative input connects resistance C (3a) one end and resistance D (4a) one end, operational amplifier (8) the anode input respectively End connects resistance D (4a) other ends respectively and power end, operational amplifier (8) output terminal connect resistance B (2a) one respectively End and the second analog-digital converter (6) one end, described first analog-digital converter (5) one end connection resistance C (3a) one end, described first Analog-digital converter (5) other end, the second analog-digital converter (6) other end connect dsp chip (7), the dsp chip (7) respectively Connect signal output part;Resistance B (2a) other end connects resistance A (1a) one end, resistance A (1a) other end connecting valve (10)。
3. a kind of IF Logarithmic Amplifier according to claim 1, it is characterised in that:Signal deteching circuit (1) bag Include field-effect transistor A (1b), field-effect transistor B (2b), field-effect transistor C (3b), field-effect transistor D (4b) and field Effect transistor E (5b), field-effect transistor A (1b) the drain electrode connection voltage end, grid connect signal output part, source electrode connection Field-effect transistor B (2b) drains, the field-effect transistor B (2b) drain electrode connect respectively field-effect transistor C (3b) drain, Field-effect transistor D (4b) drains and connects vdd terminal, and field-effect transistor B (2b) grid connects field-effect transistor C (3b) Grid, field-effect transistor C (3b) source electrode connect resistance E (5a) one end, capacitance (9) one end and field-effect transistor respectively E (5b) grid, field-effect transistor D (4b) grounded-grid, source electrode connection field-effect transistor E (5b) source electrode, the field Effect transistor E (5b) drain electrodes, capacitance (9) other end and resistance E (5a) other end are grounded.
4. a kind of IF Logarithmic Amplifier according to claim 1, it is characterised in that:Signal filter (2) model For JY-S600.
CN201721115431.8U 2018-03-15 2018-03-15 A kind of IF Logarithmic Amplifier Active CN207442800U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201721115431.8U CN207442800U (en) 2018-03-15 2018-03-15 A kind of IF Logarithmic Amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201721115431.8U CN207442800U (en) 2018-03-15 2018-03-15 A kind of IF Logarithmic Amplifier

Publications (1)

Publication Number Publication Date
CN207442800U true CN207442800U (en) 2018-06-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201721115431.8U Active CN207442800U (en) 2018-03-15 2018-03-15 A kind of IF Logarithmic Amplifier

Country Status (1)

Country Link
CN (1) CN207442800U (en)

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