CN206742153U - A kind of controllable time delay restarts circuit - Google Patents
A kind of controllable time delay restarts circuit Download PDFInfo
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- CN206742153U CN206742153U CN201720633637.3U CN201720633637U CN206742153U CN 206742153 U CN206742153 U CN 206742153U CN 201720633637 U CN201720633637 U CN 201720633637U CN 206742153 U CN206742153 U CN 206742153U
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- control power
- time delay
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Abstract
The utility model discloses a kind of controllable time delay to restart circuit, the contact Access Control power supply of relay, and control coil one end is electrically connected by the first diode and control power electric connection, the other end with the colelctor electrode of the first NPN triode；First NPN triode grounded emitter, base stage are grounded by first resistor, and are electrically connected by second resistance with the emitter stage of the second NPN triode；The colelctor electrode of second NPN triode passes through 3rd resistor, the 4th resistance eutral grounding with control power electric connection, base stage；The positive pole of one voltage-regulator diode is electrically connected between 3rd resistor, the 4th resistance, and negative pole is grounded by electrochemical capacitor, and the positive pole of electrochemical capacitor is also electrically connected to control power supply by the 5th resistance；The source ground of N-channel MOS pipe, drain electrode are electrically connected between electrochemical capacitor and the 5th resistance by the 6th resistance, and grid electrically connects with high level control terminal.The utility model circuit structure is simple, can ensure to produce high-precision delay.
Description
Technical field
It the utility model is related to a kind of controllable time delay and restart circuit.
Background technology
The application of delay circuit in integrated circuits is very extensive, and accurate delay circuit can improve the property of integrated circuit
Energy.Particularly in memory application, when the operation such as being written and read to memory cell, it is required for delay circuit to realize sequential control
System.
Utility model content
In view of the above-mentioned problems, the utility model, which provides a kind of controllable time delay, restarts circuit, to achieve these goals originally
Utility model adopts the following technical scheme that：
A kind of controllable time delay restarts circuit, including relay (K1B), the first NPN triode (Q1), the second NPN triode
And N-channel MOS pipe (Q3) (Q2)；
The contact Access Control power supply of the relay (K1B), and its control coil one end passes through the first diode (D1)
With controlling power electric connection, the other end electrically connects with the colelctor electrode of first NPN triode (Q1)；The poles of first NPN tri-
(Q1) grounded emitter is managed, base stage is grounded by first resistor (R1), and passes through second resistance (R2) and the poles of the 2nd NPN tri-
Manage the emitter stage electrical connection of (Q2)；The colelctor electrode of second NPN triode (Q2) and control power electric connection, base stage pass through the
Three resistance (R3), the 4th resistance (R4) ground connection；The positive pole of one voltage-regulator diode (D2) is electrically connected to the 3rd resistor (R3),
Between four resistance (R4), negative pole is grounded by electrochemical capacitor (C1), and the positive pole of the electrochemical capacitor (C1) also passes through the 5th resistance
(R5) it is electrically connected to control power supply；The source ground of the N-channel MOS pipe (Q3), drain electrode are electrically connected by the 6th resistance (R6)
Between the electrochemical capacitor (C1) and the 5th resistance (R5), grid electrically connects with high level control terminal.
Preferably, the grid of the N-channel MOS pipe (Q3) is grounded by the second electric capacity (C2).
Preferably, the grid of the N-channel MOS pipe (Q3) is grounded by the 7th (R7).
Preferably, the grid of the N-channel MOS pipe (Q3) passes through the 4th diode (D4) and high level control terminal electricity
Connection.
Preferably, the grid of the N-channel MOS pipe (Q3) is electrically connected by the 8th resistance (R8) with the high level control terminal
Connect.
Preferably, in addition to the 3rd diode (D3), the positive pole of the 3rd diode (D3) are electrically connected to the described 5th
Between resistance (R5), the 6th resistance (R6), negative pole and control power electric connection.
Preferably, in addition to jump cap joint, a pin and control power electric connection, another pin of the jump cap joint electrically connect
Between first NPN triode (Q1), the second NPN triode (Q2).
It is simple that controllable time delay provided by the utility model restarts circuit structure, can ensure that delay circuit produces high accuracy and prolonged
When.
Brief description of the drawings
Accompanying drawing described herein is used for providing further understanding to of the present utility model, forms the part of the application,
Do not form to improper restriction of the present utility model, in the accompanying drawings：
Fig. 1 is the utility model embodiment circuit theory diagrams.
Embodiment
The utility model is described in detail below in conjunction with accompanying drawing and specific embodiment, herein signal of the present utility model
Property embodiment and explanation be used for explaining the utility model, but be not intended as to restriction of the present utility model.
Embodiment：
As shown in figure 1, a kind of controllable time delay restarts circuit, including relay K1B, the first NPN triode Q1, the 2nd NPN
Triode Q2 and N-channel MOS pipe Q3；The relay K1B uses HF152F-012-1HS, its contact Access Control power supply,
And its control coil one end by the first diode D1 and controls power electric connection, the other end and first NPN triode Q1
Colelctor electrode electrical connection；The first NPN triode Q1 grounded emitter, base stage are grounded by first resistor R1, and pass through
Two resistance R2 electrically connect with the emitter stage of the second NPN triode Q2；The colelctor electrode of the second NPN triode Q2 and control
Power electric connection, base stage are grounded by 3rd resistor R3, the 4th resistance R4, wherein first NPN triode Q1 and described the
Two NPN triode Q2 use MMBTA42；One voltage-regulator diode D2 positive pole is electrically connected to the 3rd resistor R3, the 4th electricity
Between hindering R4, negative pole is grounded by electrochemical capacitor C1, and the positive pole of the electrochemical capacitor C1 is also electrically connected to by the 5th resistance R5
Control power supply；The N-channel MOS pipe Q3 uses SI2300, its source ground, and drain electrode is electrically connected to described by the 6th resistance R6
Between electrochemical capacitor C1 and the 5th resistance R5, grid electrically connects with high level control terminal.
By above-described embodiment scheme, using control power supply output connecting connector CN2 1 pin as high level control terminal,
Output high level turns on N-channel MOS pipe Q3, controls power supply to be charged by the 6th resistance R6 for electrochemical capacitor C1 after conducting, then
The second NPN triode Q2, the first NPN triode Q1 is set to produce electric current, so as to reach the mesh that time-delay relay restarts circuit
's.
It is also high-level control signal shaping as the improvement of above-described embodiment scheme, including：
The grid of the N-channel MOS pipe Q3 is grounded by the second electric capacity C2；As the improvement of above-described embodiment scheme, institute
The grid for stating N-channel MOS pipe Q3 is grounded by the 7th R7；As the improvement of above-described embodiment scheme, the N-channel MOS pipe Q3
Grid electrically connected by the 4th diode D4 with the high level control terminal；As the improvement of above-described embodiment scheme, the N
Channel MOS tube Q3 grid is electrically connected by the 8th resistance R8 with the high level control terminal.
As the improvement of above-described embodiment scheme, in addition to the 3rd diode D3, the positive pole electricity of the 3rd diode D3
It is connected between the 5th resistance R5, the 6th resistance R6, negative pole and control power electric connection.
As the improvement of above-described embodiment scheme, in addition to jump cap joint, a pin and the control power supply of the jump cap joint
Electrical connection, another pin are electrically connected between first NPN triode Q1, the second NPN triode Q2, when jump cap joint turns on
When, whole delay startup circuit does not work.
The technical scheme provided above the utility model embodiment is described in detail, used herein specifically
Individual example is set forth to the principle and embodiment of the utility model embodiment, and the explanation of above example is only applicable to help
Assistant solves the principle of the utility model embodiment；Meanwhile for those of ordinary skill in the art, implement according to the utility model
Example, the there will be changes in embodiment and application, in summary, this specification content should not be construed as
To limitation of the present utility model.
Claims (7)
1. a kind of controllable time delay restarts circuit, it is characterised in that：
Including relay (K1B), the first NPN triode (Q1), the second NPN triode (Q2) and N-channel MOS pipe (Q3)；
The contact Access Control power supply of the relay (K1B), and its control coil one end passes through the first diode (D1) and control
Power electric connection processed, the other end electrically connect with the colelctor electrode of first NPN triode (Q1)；First NPN triode
(Q1) grounded emitter, base stage is grounded by first resistor (R1), and passes through second resistance (R2) and second NPN triode
(Q2) emitter stage electrical connection；The colelctor electrode of second NPN triode (Q2) passes through the 3rd with control power electric connection, base stage
Resistance (R3), the 4th resistance (R4) ground connection；The positive pole of one voltage-regulator diode (D2) is electrically connected to the 3rd resistor (R3), the 4th
Between resistance (R4), negative pole is grounded by electrochemical capacitor (C1), and the positive pole of the electrochemical capacitor (C1) also passes through the 5th resistance
(R5) it is electrically connected to control power supply；The source ground of the N-channel MOS pipe (Q3), drain electrode are electrically connected by the 6th resistance (R6)
Between the electrochemical capacitor (C1) and the 5th resistance (R5), grid electrically connects with high level control terminal.
2. a kind of controllable time delay as claimed in claim 1 restarts circuit, it is characterised in that：
The grid of the N-channel MOS pipe (Q3) is grounded by the second electric capacity (C2).
3. a kind of controllable time delay as claimed in claim 1 restarts circuit, it is characterised in that：
The grid of the N-channel MOS pipe (Q3) is grounded by the 7th (R7).
4. a kind of controllable time delay as claimed in claim 1 restarts circuit, it is characterised in that：
The grid of the N-channel MOS pipe (Q3) is electrically connected by the 4th diode (D4) with the high level control terminal.
5. a kind of controllable time delay as claimed in claim 1 restarts circuit, it is characterised in that：
The grid of the N-channel MOS pipe (Q3) is electrically connected by the 8th resistance (R8) with the high level control terminal.
6. a kind of controllable time delay as claimed in claim 1 restarts circuit, it is characterised in that：
Also include the 3rd diode (D3), the positive pole of the 3rd diode (D3) is electrically connected to the 5th resistance (R5),
Between six resistance (R6), negative pole and control power electric connection.
7. a kind of controllable time delay as claimed in claim 1 restarts circuit, it is characterised in that：
Also include jump cap joint, a pin and control power electric connection, another pin of the jump cap joint are electrically connected to described first
Between NPN triode (Q1), the second NPN triode (Q2).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720633637.3U CN206742153U (en) | 2017-06-02 | 2017-06-02 | A kind of controllable time delay restarts circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720633637.3U CN206742153U (en) | 2017-06-02 | 2017-06-02 | A kind of controllable time delay restarts circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206742153U true CN206742153U (en) | 2017-12-12 |
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ID=60568415
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720633637.3U Active CN206742153U (en) | 2017-06-02 | 2017-06-02 | A kind of controllable time delay restarts circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206742153U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019165599A1 (en) * | 2018-02-28 | 2019-09-06 | 深圳市道通智能航空技术有限公司 | Power supply restart system and electronic device |
| CN110473742A (en) * | 2018-05-10 | 2019-11-19 | 联合汽车电子有限公司 | High-voltage relay control circuit, battery management system and electronic device |
-
2017
- 2017-06-02 CN CN201720633637.3U patent/CN206742153U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019165599A1 (en) * | 2018-02-28 | 2019-09-06 | 深圳市道通智能航空技术有限公司 | Power supply restart system and electronic device |
| CN110473742A (en) * | 2018-05-10 | 2019-11-19 | 联合汽车电子有限公司 | High-voltage relay control circuit, battery management system and electronic device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of utility model: Circuit is restarted in controllable time delay Effective date of registration: 20180518 Granted publication date: 20171212 Pledgee: China Co truction Bank Corp Guangzhou Yuexiu branch Pledgor: GUANGZHOU KINTH NETWORK TECHNOLOGY CO., LTD. Registration number: 2018440000123 |
|
| PC01 | Cancellation of the registration of the contract for pledge of patent right | ||
| PC01 | Cancellation of the registration of the contract for pledge of patent right |
Date of cancellation: 20190816 Granted publication date: 20171212 Pledgee: China Co truction Bank Corp Guangzhou Yuexiu branch Pledgor: GUANGZHOU KINTH NETWORK TECHNOLOGY CO., LTD. Registration number: 2018440000123 |