CN206164370U - Submarine observation net siim output isolation control circuit - Google Patents
Submarine observation net siim output isolation control circuit Download PDFInfo
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- CN206164370U CN206164370U CN201621179154.2U CN201621179154U CN206164370U CN 206164370 U CN206164370 U CN 206164370U CN 201621179154 U CN201621179154 U CN 201621179154U CN 206164370 U CN206164370 U CN 206164370U
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Abstract
The utility model discloses a submarine observation net siim output isolation control circuit, including field effect transistor drive circuit, relay buffer circuit and power buffer circuit. The utility model discloses an isolation control is accomplished to the mode that electronic switch and mechanical switch combined together, has solved the electric shortcoming of not keeping apart of electronic switch such as field effect transistor and has also solved the shortcoming that the arc was drawn to mechanical switch such as relay contact, has characteristics such as reliability height, the isolation is effectual, the extended capability is strong.
Description
Technical field
The utility model is related to a kind of submarine observation network Siim outputs isolation control circuit.
Background technology
Submarine observation network is that scope is put into into seabed, and by these scope networkings, so as to form one in seabed
Individual raw data acquisition network, then by the base that gathered data is sent on the bank is analyzed a kind of network of process again.
Siim is undersea device interface module(Subsea Instrument Interface Modules)English contracting
Write, it connects submarine observation equipment, be that it is powered and communicates with.Limited by environments such as subsea, it is desirable to which Siim is needed with very high
Reliability, in addition Siim connect multiple scopes, output isolation and output control are also critically important.
The content of the invention
The technical problems to be solved in the utility model is to provide a kind of submarine observation network Siim outputs isolation control circuit, carries
The reliability of high Siim, solves the problems, such as output isolation and output control.
In order to solve the technical problem, the technical solution adopted in the utility model is:A kind of submarine observation network Siim is defeated
Go out isolation control circuit, including FET drive circuit, relay isolation circuit and power isolation circuit, the isolated from power
Circuit includes that Waveform generating circuit and waveform produce the inverter circuit of output end connection and be connected with inverter circuit output end
Multiple current rectifying and wave filtering circuits, the output end of current rectifying and wave filtering circuit is connected with FET drive circuit, relay isolation circuit,
Power isolation circuit is that FET drive circuit and relay isolation circuit provide power supply.
Submarine observation network Siim described in the utility model exports isolation control circuit, and the Waveform generating circuit includes driving
Chip U3, resistance R7, resistance R9, electric capacity C4, electric capacity C9, electric capacity C10, diode D10, electric capacity C4, resistance R7, resistance R9, electricity
Hold C9 to be sequentially connected in series and two-terminal-grounding, 8 pin of driving chip are connected between electric capacity C4, resistance R7 and connect+12V power supplys, drive
7 pin of dynamic chip are connected between resistance R7, R9, and 6 pin of driving chip are connected between resistance R9, electric capacity C9 and connect drive
2 pin of dynamic chip, 5 pin of driving chip are grounded by electric capacity C10,1 pin of driving chip ground connection, and 4 pin of driving chip connect+
12V power supplys, the 3 pin connection inverter circuit of driving chip is simultaneously grounded, the plus earth of diode D10 by diode D10;It is described
Inverter circuit includes FET Q3, electric capacity C7, Zener diode D8, transformer U2 and resistance R15, and resistance R15 is connected to drive
Between 3 pin of dynamic chip and the grid of FET Q3, the source ground of FET Q3, the drain electrode of FET Q3 connects respectively
Connect the anode of Zener diode D8 and one end of transformer U2 main coils, the negative electrode of Zener diode D8, transformer U2 main coils
The other end be connected to+12V power supplys and be grounded by electric capacity C7, transformer U2 has multiple secondary coils, and each secondary coil connects
Connect 1 current rectifying and wave filtering circuit;Current rectifying and wave filtering circuit includes diode D6, resistance R6, electric capacity C5, resistance R5, U2 level of transformer
One end of coil connects output end VB1, the other end connection output end of transformer U2 secondary coils by diode D6, resistance R6
VS1, electric capacity C5, resistance R5 are parallel between the two ends of transformer U2 secondary coils.
Submarine observation network Siim described in the utility model exports isolation control circuit, and the FET drive circuit includes
FET Q1, FET Q2, resistance R1, resistance R2, resistance R4, diode D3, diode D4, diode D5, inductance C1
With driving chip U1;1 pin of driving chip U1 connects output end VB1 of current rectifying and wave filtering circuit, and 3 pin of driving chip U1 are by electricity
Resistance R4 connects output end VS1 of current rectifying and wave filtering circuit, and inductance C1 is connected between 1 pin of driving chip and 3 pin;Driving chip U1
2 pin be connected with one end of resistance R1, resistance R2, the other end of resistance R1 is connected with the grid of FET Q1, resistance R2's
The other end is connected with the grid of FET Q2, and the drain electrode of FET Q1, the drain electrode of FET Q2 are connected with+48V, field effect
Should pipe Q1 source electrode be connected with the source electrode of FET Q2 after be respectively connecting to+48V-IN, VS1;The 8 pin connection of driving chip U1
External drive signal, 6 pin of driving chip U1,7 pin are connected to ground, and diode D3, diode D4, diode D5 are connected in series with first
Between 3 pin and 6 pin of driving chip and the negative electrode of diode connects 3 pin, anode connects 6 pin.
Submarine observation network Siim described in the utility model exports isolation control circuit, and the relay isolation circuit includes light
Electric coupler LS1, relay RL1, relay RL2, diode D1, diode D2, connector J2, resistance R3, photoelectrical coupler
1 pin of LS1 connects+5V power supplys, the 2 pin external drives of photoelectrical coupler LS1,4 pin of photoelectrical coupler LS1,6 pin by resistance R3
Connection+12V power supplys, 5 pin of photoelectrical coupler LS1 and the negative electrode of diode D1, the negative electrode of diode D2, the 2 of relay RL1
The 2 pin connection of pin, relay RL2;The anode of diode D1 is connected with 1 pin of relay RL1 and is connected to ground;The sun of diode D2
Pole is connected with 1 pin of relay RL2 and is connected to ground;4 pin of relay RL1 are connected with the source electrode of FET Q2;Relay RL2
The output of 4 pin and -48V supply voltages be connected;1 pin of connector J2 is connected with 3 pin of relay RL1;2 pin of connector J2 with
The 3 pin connection of relay RL2.
Submarine observation network Siim described in the utility model exports isolation control circuit, and the transformer U2 has 4 secondary wires
Circle.
Submarine observation network Siim described in the utility model exports isolation control circuit, and driving chip U1 models are adopted
IR2181, driving chip U3 models adopt LM555, FET Q3 models to adopt IRFD12, the first Zener diode D8 models
Using 1.5KE51CA.
Submarine observation network Siim described in the utility model exports isolation control circuit, and the model of photoelectrical coupler LS1 is adopted
PVG612, relay RL1, the second relay RL2 models adopt G81B245.
The beneficial effects of the utility model:1st, reliability is high, using electronic switch and mechanical switch phase in the utility model
With reference to mode complete to isolate control, this control mode solves the shortcoming that the electronic switches such as FET are not electrically isolated
Also the shortcoming of the mechanical switch contact arc discharge such as relay is solved.2nd, isolation effect is good, in the utility model using high vacuum after
Electrical equipment can bear the DC voltage of 10KV.3rd, control circuit isolation power supply, extended capability is strong.Electronic switch in the utility model
Powered using isolation with the control circuit of mechanical switch, be capable of achieving multichannel isolation control, be conducive to extension.
Description of the drawings
Fig. 1 is power isolation circuit schematic diagram;
Fig. 2 is FET driver circuit schematic diagram;
Fig. 3 is relay isolation circuit schematic diagram.
Specific embodiment
Below in conjunction with the accompanying drawings the utility model is further described with specific embodiment.
A kind of submarine observation network Siim exports isolation control circuit, including FET drive circuit, relay isolation electricity
Road and power isolation circuit, the power isolation circuit includes that Waveform generating circuit and waveform produce the inversion of output end connection
Circuit and the multiple current rectifying and wave filtering circuits being connected with inverter circuit output end, the output end of current rectifying and wave filtering circuit and field-effect
Tube drive circuit, relay isolation circuit are connected, and power isolation circuit is FET drive circuit and relay isolation circuit
Power supply is provided.
In the present embodiment, described power isolation circuit can provide 4 road insulating power supplies, can drive for 4 road FETs
Dynamic circuit and relay isolation circuit provide power supply, because 4 road FET drive circuits and relay isolation circuit have phase
Same feature, therefore only 1 road FET drive circuit and relay isolation circuit are illustrated in the present embodiment.
As shown in figure 1, be power isolation circuit schematic diagram, power isolation circuit by Waveform generating circuit, inverter circuit and
Current rectifying and wave filtering circuit is constituted.
The Waveform generating circuit include driving chip U3, resistance R7, resistance R9, electric capacity C4, electric capacity C9, electric capacity C10, two
Pole pipe D10, electric capacity C4, resistance R7, resistance R9, electric capacity C9 are sequentially connected in series and two-terminal-grounding, and 8 pin of driving chip are connected to electric capacity
Between C4, resistance R7 and connect+12V power supplys, 7 pin of driving chip are connected between resistance R7, R9,6 pin of driving chip connect
2 pin of driving chip are connected between resistance R9, electric capacity C9 and are connected, 5 pin of driving chip are grounded by electric capacity C10, drive
The 1 pin ground connection of chip, 4 pin of driving chip connect+12V power supplys, and the 3 pin connection inverter circuit of driving chip simultaneously passes through diode
D10 is grounded, the plus earth of diode D10.
The inverter circuit includes FET Q3, electric capacity C7, Zener diode D8, transformer U2 and resistance R15, waveform
Produce circuit and provide drive signal for FET Q3, inverter circuit realizes that power supply is isolated.Resistance R15 is connected to driving core
Between 3 pin of piece and the grid of FET Q3, the source ground of FET Q3, the drain electrode of FET Q3 connects respectively surely
The anode of pressure diode D8 and one end of transformer U2 main coils, the negative electrode of Zener diode D8, transformer U2 main coils it is another
One end is connected to+12V power supplys and is grounded by electric capacity C7, and transformer U2 has multiple secondary coils, and each secondary coil connects 1
Current rectifying and wave filtering circuit;Current rectifying and wave filtering circuit includes diode D6, resistance R6, electric capacity C5, resistance R5, transformer U2 secondary coils
One end connects output end VB1, other end connection output end VS1 of transformer U2 secondary coils, electricity by diode D6, resistance R6
Hold C5, resistance R5 to be parallel between the two ends of transformer U2 secondary coils.
As shown in Fig. 2 being FET driver circuit schematic diagram, the FET drive circuit includes FET
Q1, FET Q2, resistance R1, resistance R2, resistance R4, diode D3, diode D4, diode D5, inductance C1 and driving core
Piece U1;First driving chip U1 controls turning on and off for the first FET Q1 and the second FET Q2 simultaneously.Drive core
1 pin of piece U1 connects output end VB1 of current rectifying and wave filtering circuit, and 3 pin of driving chip U1 connect rectifying and wave-filtering electricity by resistance R4
Output end VS1 on road, inductance C1 is connected between 1 pin of driving chip and 3 pin;2 pin of driving chip U1 and resistance R1, resistance
One end connection of R2, the other end of resistance R1 is connected with the grid of FET Q1, the other end and the FET Q2 of resistance R2
Grid connection, the drain electrode of FET Q1, the drain electrode of FET Q2 be connected with+48V, the source electrode of FET Q1 and field effect
+ 48V-IN, VS1 are respectively connecting to after the source electrode connection of pipe Q2;The 8 pin connection external drive signal of driving chip U1, drives core
6 pin of piece U1,7 pin are connected to ground, and diode D3, diode D4, diode D5 are connected in series with 3 pin and 6 pin of the first driving chip
Between and the negative electrode of diode connects 3 pin, anode connects 6 pin.
The relay isolation circuit includes photoelectrical coupler LS1, relay RL1, relay RL2, diode D1, two poles
Pipe D2, connector J2 and resistance R3, the first photoelectrical coupler LS1 controls the first relay RL1's and the second relay RL2 simultaneously
Open and close.1 pin of photoelectrical coupler LS1 connects+5V power supplys by resistance R3, the 2 pin external drives of photoelectrical coupler LS1,
4 pin of photoelectrical coupler LS1,6 pin connection+12V power supplys, 5 pin of photoelectrical coupler LS1 and negative electrode, the diode of diode D1
The negative electrode of D2,2 pin of relay RL1, the 2 pin connection of relay RL2;The anode of diode D1 is connected with 1 pin of relay RL1
It is connected to ground;The anode of diode D2 is connected with 1 pin of relay RL2 and is connected to ground;4 pin of relay RL1 and FET
The source electrode connection of Q2;4 pin of relay RL2 are connected with the output of -48V supply voltages;1 pin of connector J2 and the 3 of relay RL1
Pin connects;2 pin of connector J2 are connected with 3 pin of relay RL2.
In the present embodiment, driving chip U1 models adopt IR2181, driving chip U3 models to adopt LM555, FET
Q3 models adopt 1.5KE51CA using IRFD12, the first Zener diode D8 models.The model of photoelectrical coupler LS1 is adopted
PVG612, relay RL1, the second relay RL2 models adopt G81B245.
Described above is only general principle of the present utility model and preferred embodiment, and those skilled in the art are according to this reality
With the new improvement made and replacement, belong to protection domain of the present utility model.
Claims (7)
1. a kind of submarine observation network Siim exports isolation control circuit, it is characterised in that:Including FET drive circuit, relay
Device isolation circuit and power isolation circuit, the power isolation circuit includes that Waveform generating circuit and waveform produce output end and connect
The inverter circuit for connecing and the multiple current rectifying and wave filtering circuits being connected with inverter circuit output end, the output end of current rectifying and wave filtering circuit
It is connected with FET drive circuit, relay isolation circuit, power isolation circuit is FET drive circuit and relay
Isolation circuit provides power supply.
2. submarine observation network Siim according to claim 1 exports isolation control circuit, it is characterised in that:The waveform is produced
Raw circuit includes driving chip U3, resistance R7, resistance R9, electric capacity C4, electric capacity C9, electric capacity C10, diode D10, electric capacity C4, electricity
Resistance R7, resistance R9, electric capacity C9 are sequentially connected in series and two-terminal-grounding, and 8 pin of driving chip are connected between electric capacity C4, resistance R7 and connect
+ 12V power supplys are connect, 7 pin of driving chip are connected between resistance R7, R9, and 6 pin of driving chip are connected to resistance R9, electric capacity C9
Between and connect 2 pin of driving chip, 5 pin of driving chip are grounded by electric capacity C10, the 1 pin ground connection of driving chip, are driven
4 pin of chip connect+12V power supplys, and the 3 pin connection inverter circuit of driving chip is simultaneously grounded by diode D10, diode D10's
Plus earth;The inverter circuit includes FET Q3, electric capacity C7, Zener diode D8, transformer U2 and resistance R15, electricity
Resistance R15 is connected between 3 pin of driving chip and the grid of FET Q3, the source ground of FET Q3, FET
Draining for Q3 connects respectively one end of the anode and transformer U2 main coils of Zener diode D8, the negative electrode of Zener diode D8,
The other end of transformer U2 main coils is connected to+12V power supplys and is grounded by electric capacity C7, and transformer U2 has multiple secondary coils,
Each secondary coil connects 1 current rectifying and wave filtering circuit;Current rectifying and wave filtering circuit includes diode D6, resistance R6, electric capacity C5, resistance
R5, one end of transformer U2 secondary coils connects output end VB1 by diode D6, resistance R6, transformer U2 secondary coils
The other end connects output end VS1, and electric capacity C5, resistance R5 are parallel between the two ends of transformer U2 secondary coils.
3. submarine observation network Siim according to claim 2 exports isolation control circuit, it is characterised in that:The field-effect
Tube drive circuit include FET Q1, FET Q2, resistance R1, resistance R2, resistance R4, diode D3, diode D4, two
Pole pipe D5, inductance C1 and driving chip U1;1 pin of driving chip U1 connects output end VB1 of current rectifying and wave filtering circuit, driving chip
3 pin of U1 by resistance R4 connect current rectifying and wave filtering circuit output end VS1, inductance C1 be connected to driving chip 1 pin and 3 pin it
Between;2 pin of driving chip U1 are connected with one end of resistance R1, resistance R2, the other end of resistance R1 and the grid of FET Q1
Connection, the other end of resistance R2 is connected with the grid of FET Q2, the drain electrode of FET Q1, the drain electrode of FET Q2 and
+ 48V connects, and the source electrode of FET Q1 is respectively connecting to+48V-IN, VS1 after being connected with the source electrode of FET Q2;Drive core
The 8 pin connection external drive signal of piece U1,6 pin of driving chip U1,7 pin are connected to ground, diode D3, diode D4, two poles
Pipe D5 is connected in series between 3 pin of the first driving chip and 6 pin and the negative electrode of diode connects 3 pin, and anode connects 6 pin.
4. the submarine observation network Siim according to claim 1 or 3 exports isolation control circuit, it is characterised in that:It is described after
Electrical equipment isolation circuit include photoelectrical coupler LS1, relay RL1, relay RL2, diode D1, diode D2, connector J2,
1 pin of resistance R3, photoelectrical coupler LS1 connects+5V power supplys, the 2 pin connection external drive letter of photoelectrical coupler LS1 by resistance R3
Number, 4 pin of photoelectrical coupler LS1,6 pin connection+12V power supplys, 5 pin of photoelectrical coupler LS1 and the negative electrode of diode D1, two poles
The negative electrode of pipe D2,2 pin of relay RL1, the 2 pin connection of relay RL2;The anode of diode D1 connects with 1 pin of relay RL1
Connect and be connected to ground;The anode of diode D2 is connected with 1 pin of relay RL2 and is connected to ground;4 pin of relay RL1 and field-effect
The source electrode connection of pipe Q2;4 pin of relay RL2 are connected with the output of -48V supply voltages;1 pin of connector J2 and relay RL1
3 pin connection;2 pin of connector J2 are connected with 3 pin of relay RL2.
5. the submarine observation network Siim according to Claims 2 or 3 exports isolation control circuit, it is characterised in that:The change
Depressor U2 has 4 secondary coils.
6. submarine observation network Siim according to claim 3 exports isolation control circuit, it is characterised in that:Driving chip U1
Model adopts IR2181, driving chip U3 models to adopt LM555, FET Q3 models to adopt IRFD12, the pole of the first voltage stabilizing two
Pipe D8 models adopt 1.5KE51CA.
7. submarine observation network Siim according to claim 4 exports isolation control circuit, it is characterised in that:Photoelectrical coupler
The model of LS1 adopts PVG612, relay RL1, the second relay RL2 models to adopt G81B245.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201621179154.2U CN206164370U (en) | 2016-10-27 | 2016-10-27 | Submarine observation net siim output isolation control circuit |
Applications Claiming Priority (1)
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CN201621179154.2U CN206164370U (en) | 2016-10-27 | 2016-10-27 | Submarine observation net siim output isolation control circuit |
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CN206164370U true CN206164370U (en) | 2017-05-10 |
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CN201621179154.2U Expired - Fee Related CN206164370U (en) | 2016-10-27 | 2016-10-27 | Submarine observation net siim output isolation control circuit |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108199486A (en) * | 2018-03-12 | 2018-06-22 | 广州市浩翔计算机科技有限公司 | A kind of distributed power supply management system |
-
2016
- 2016-10-27 CN CN201621179154.2U patent/CN206164370U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108199486A (en) * | 2018-03-12 | 2018-06-22 | 广州市浩翔计算机科技有限公司 | A kind of distributed power supply management system |
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GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170510 Termination date: 20171027 |
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CF01 | Termination of patent right due to non-payment of annual fee |