CN205844960U - Multimodal Integration type power management chip - Google Patents
Multimodal Integration type power management chip Download PDFInfo
- Publication number
- CN205844960U CN205844960U CN201620569095.3U CN201620569095U CN205844960U CN 205844960 U CN205844960 U CN 205844960U CN 201620569095 U CN201620569095 U CN 201620569095U CN 205844960 U CN205844960 U CN 205844960U
- Authority
- CN
- China
- Prior art keywords
- direct current
- current transformation
- module
- transformation module
- power management
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Amplifiers (AREA)
Abstract
The utility model discloses a kind of Multimodal Integration type power management chip, including the first direct current transformation module, the second direct current transformation module, the 3rd direct current transformation module, low pressure difference linearity Voltage stabilizing module and twin wire serial bus module, twin wire serial bus module is for regulation the first direct current transformation module, the second direct current transformation module, the 3rd direct current transformation module and the reference voltage of low pressure difference linearity Voltage stabilizing module, and controls the opening and closing of these modules;The outfan of aforementioned four module is separately positioned on four corners of chip, first direct current transformation module, the second direct current transformation module and the 3rd direct current transformation module are provided with between respective earth terminal and feedback input end, and respective outfan and feedback input end and are separated by earth terminal.This utility model is capable of dynamically adjusting output voltage, solves chip power-consumption intelligent management demand, solves noise jamming problem simultaneously, improve chip cooling performance.
Description
Technical field
This utility model relates to electronic technology field, particularly relates to a kind of Multimodal Integration type power management chip.
Background technology
Existing multi-channel type DC voltage conversion chip can provide organizes output voltage more, but cannot be by internal control
Dynamically adjust output voltage, it is necessary to rely on outside line to realize this function, thus increase cost of parts and fabric swatch area, and
And the selection of part value is more complicated, add the difficulty of Client application.
Part multi-channel type DC voltage conversion chip adds the control module of inside to be carried out dynamically output voltage
Adjusting, but this series products mostly is high-end product, expensive, function is the most complicated, causes user to use wish low.
Utility model content
In view of this, the purpose of this utility model is to overcome the deficiencies in the prior art, it is provided that a kind of wide usage height and valency
Lattice reasonably have the Multimodal Integration type power management chip of intelligent control function, real in the case of not by external circuit
The most dynamically adjust output voltage, solve chip power-consumption intelligent management demand, take into account reasonability and the integration of circuit-board laying-out simultaneously
Noise jamming problem between each passage of cake core, and in encapsulation, realize volume miniaturization and improve heat dispersion.
For realizing object above, this utility model adopts the following technical scheme that
A kind of Multimodal Integration type power management chip, including the first direct current transformation module, the second direct current transformation module, the
Three direct current transformation modules, low pressure difference linearity Voltage stabilizing module and twin wire serial bus module, described twin wire serial bus module
For regulating described first direct current transformation module, described second direct current transformation module, described 3rd direct current transformation module and described
The reference voltage of low pressure difference linearity Voltage stabilizing module, and control described first direct current transformation module, described second direct current transformation mould
Block, described 3rd direct current transformation module and the opening and closing of described low pressure difference linearity Voltage stabilizing module;
Described first direct current transformation module, described second direct current transformation module, described 3rd direct current transformation module and described
The outfan of low pressure difference linearity Voltage stabilizing module is separately positioned on four corners of described Multimodal Integration type power management chip, its
In, described first direct current transformation module, described second direct current transformation module and described 3rd direct current transformation module are provided with each
Earth terminal and feedback input end, and respective described outfan and described feedback input end between by described earth terminal every
Open.
Preferably, described first direct current transformation module, described second direct current transformation module and described 3rd direct current transformation mould
Block shares a frequency generator.
Preferably, the voltage letter of the outfan output of described second direct current transformation module and described 3rd direct current transformation module
Number phase place is identical, and the voltage signal exported with the outfan of described first direct current transformation module has 180 ° of phase contrasts.
Preferably, described Multimodal Integration type power management chip uses the 24 pin package structures of QFN 4mm × 4mm.
Preferably, the encapsulation volume of described Multimodal Integration type power management chip is 4mm × 4mm × 1mm.
Preferably, 24 pins of described Multimodal Integration type power management chip are averagely arranged on described Multimodal Integration
The surrounding of type power management chip, the middle part of described Multimodal Integration type power management chip is provided with exposed pads district.
Preferably, the bottom of described Multimodal Integration type power management chip is provided with fin.
This utility model uses above technical scheme, has the advantages that
1, there is I2C intelligent control function, be dynamically adapted output voltage and control the opening and closing of four modules, reaching
To green energy conservation effect;
2, three road direct current transformation (DCDC) outputs and a road low pressure difference linearity voltage stabilizing (LDO) output are integrated, the most small-sized
Change such as the application of handheld device;
3, chip layout is reasonable, it is possible to be effectively improved noise jamming and heat dissipation problem;
4, wide usage is high, using the teaching of the invention it is possible to provide a kind of selection scheme with cost advantage.
Accompanying drawing explanation
The external terminal signal of the Multimodal Integration type power management chip that Fig. 1 is provided by this utility model embodiment
Figure;
The internal enclosing structure of the Multimodal Integration type power management chip that Fig. 2 is provided by this utility model embodiment
Figure;
The inner frame signal of the Multimodal Integration type power management chip that Fig. 3 is provided by this utility model embodiment
Figure;
The sequential of the LX1-LX3 of the Multimodal Integration type power management chip that Fig. 4 is provided by this utility model embodiment
Oscillogram;
The I2C of the Multimodal Integration type power management chip that Fig. 5 is provided by this utility model embodiment controls agreement and shows
It is intended to.
In figure: LX1, the first direct current transformation module outfan;LX2, the second direct current transformation module outfan;LX3, the 3rd straight
Rheology die block outfan, LDO_O, low pressure difference linearity Voltage stabilizing module outfan;LDO_I, low pressure difference linearity Voltage stabilizing module input
End;VCC, power voltage input terminal;AGND, simulation ground end;SCL, clock signal terminal;SDA, serial data interface end;VIN1,
Rheology die block input always;VIN2, the second direct current transformation module input;VIN3, the 3rd direct current transformation module input;
PGND1, the first direct current transformation module ground end;PGND2, the second direct current transformation module ground end;PGND3, the 3rd direct current transformation
Module ground end;LDO_G, low pressure difference linearity Voltage stabilizing module earth terminal;EN1, the first direct current transformation module control end;EN2, second
Direct current transformation module controls end;EN3, the 3rd direct current transformation module control end;LDO_EN, low pressure difference linearity Voltage stabilizing module control
End;FB1, the first direct current transformation module feedback input;FB2, the second direct current transformation module feedback input;FB3, the 3rd direct current
Voltage changing module feedback input end;LDO_FB, low pressure difference linearity Voltage stabilizing module feedback input end.
Detailed description of the invention
Below by drawings and Examples, the technical solution of the utility model is described in further detail.
This utility model provides a kind of Multimodal Integration type power management chip, and Fig. 1, Fig. 2 and Fig. 3 are described many respectively
The external terminal schematic diagram of the integrated power management chip of passage, internal enclosing structure figure and inner frame schematic diagram.
Described Multimodal Integration type power management chip includes the first direct current transformation (DCDC) module, the second direct current transformation
(DCDC) module, the 3rd direct current transformation (DCDC) module, low pressure difference linearity voltage stabilizing (LDO) module and twin wire universal serial bus
(I2C) module, described twin wire serial bus module is used for regulating described first direct current transformation module, described second direct current transformation
Module, described 3rd direct current transformation module and the reference voltage of described low pressure difference linearity Voltage stabilizing module, and control described first
Direct current transformation module, described second direct current transformation module, described 3rd direct current transformation module and described low pressure difference linearity voltage stabilizing mould
The startup of block and closedown;
Described first direct current transformation module, described second direct current transformation module, described 3rd direct current transformation module and described
The outfan of low pressure difference linearity Voltage stabilizing module is separately positioned on four corners of described Multimodal Integration type power management chip, its
In, described first direct current transformation module, described second direct current transformation module and described 3rd direct current transformation module are provided with each
Earth terminal and feedback input end, and respective described outfan and described feedback input end between by described earth terminal every
Open.
This utility model is matched with external control chip by standardized I2C modular structure, makes external control chip
Carry out data message alternately by I2C module and described Multimodal Integration type power management chip, utilize described Multimodal Integration
The address defined inside type power management chip, it becomes possible to dynamically adjust the reference voltage (Vref) of internal four modules, reach
To the effect of dynamically adjustment output voltage, when heavier loads, output voltage is improved, when dormancy, output voltage is reduced, from
And obtain energy-conservation effect.
Additionally, pin of the present utility model arrangement is rationally, the outfan of four modules lays respectively at the corner of chip, favorably
Connect the angle of inductance in regulation, on the other hand, will be separated by earth terminal between outfan and feedback input end, it is possible to avoid
Noise jamming, saving processes the time cost of noise signal.
Specifically, as a example by Fig. 1-Fig. 3, the first direct current transformation module outfan LX1, the second direct current transformation module outfan
LX2, the 3rd direct current transformation module outfan LX3 and low pressure difference linearity Voltage stabilizing module outfan LDO_O are separately positioned on chip
Four corners, in use, each connect independent inductance, are prone to adjust the angle of inductance while facilitating circuit layout.
Additionally, LX1-LX3 is separated by PGND1-PGND3 with FB1-FB3 respectively, to avoid FB1-FB3 to be done by LX1-LX3 signal
Disturb.
It addition, for avoiding interfering between each output channel, this utility model uses integrated chip design, described
First direct current transformation module, described second direct current transformation module and described 3rd direct current transformation module share a frequency and occur
Device, eliminates the noise interference that frequency difference is brought.
Additionally, the voltage signal of the outfan output of described second direct current transformation module and described 3rd direct current transformation module
Phase place is identical, and the voltage signal exported with the outfan of described first direct current transformation module has 180 ° of phase contrasts.Namely
Say, LX2 Yu LX3 same phase, but all and have 180 ° of phase contrasts, as shown in Figure 4 between LX1.This design can avoid three tunnel outputs same
Time heavy duty time the voltage pulsation that causes, reduce the generation of interference signal.
Additionally, the I2C that Fig. 5 is described Multimodal Integration type power management chip controls agreement schematic diagram, SCL and SDA divides
Not Biao Shi clock signal terminal and serial data interface end, can be used for adjust reference voltage scope, and available I2C come independently control
The opening and closing of four output modules of system.
Preferably, described Multimodal Integration type power management chip uses the 24 pin package structures of QFN 4mm × 4mm,
Four road voltage outputs can be provided, be highly suitable to be applied on little area pcb board.Further, described Multimodal Integration type electricity
The encapsulation volume of source control chip is 4mm × 4mm × 1mm, it is possible to realize slimming, degree of integration much higher passage output voltage solution
Certainly scheme.
In the above-described embodiments, 24 pins of described Multimodal Integration type power management chip are averagely arranged on described many
The surrounding of the integrated power management chip of passage, the middle part of described Multimodal Integration type power management chip is provided with exposed pads
District's (Fig. 1 central region).
Further, the bottom of described Multimodal Integration type power management chip is provided with fin, to improve chip
Heat dispersion.
In sum, this utility model has provided the user a kind of that have a cost advantage and wieldy can intelligence control
The integrated power management chip in Zhi tetra-road (three road DCDC outputs and a road LDO output), can be widely applied to energy saving requirement
Electronic equipment, in the equipment such as OTT, drive recorder, traffic navigation.
Above-described detailed description of the invention, is entered the purpose of this utility model, technical scheme and beneficial effect
One step describes in detail, be it should be understood that and the foregoing is only detailed description of the invention of the present utility model, is not used to limit
Fixed protection domain of the present utility model, all within spirit of the present utility model and principle, any amendment, the equivalent made are replaced
Change, improvement etc., within should be included in protection domain of the present utility model.
Claims (7)
1. a Multimodal Integration type power management chip, it is characterised in that include that the first direct current transformation module, the second direct current become
Die block, the 3rd direct current transformation module, low pressure difference linearity Voltage stabilizing module and twin wire serial bus module, described twin wire serial
Bus module is used for regulating described first direct current transformation module, described second direct current transformation module, described 3rd direct current transformation mould
Block and the reference voltage of described low pressure difference linearity Voltage stabilizing module, and control described first direct current transformation module, described second straight
Rheology die block, described 3rd direct current transformation module and the opening and closing of described low pressure difference linearity Voltage stabilizing module;
Described first direct current transformation module, described second direct current transformation module, described 3rd direct current transformation module and described low pressure
The outfan of difference linear voltage stabilization module is separately positioned on four corners of described Multimodal Integration type power management chip, wherein,
Described first direct current transformation module, described second direct current transformation module and described 3rd direct current transformation module are provided with respective connecing
Separated by described earth terminal between ground end and feedback input end, and respective described outfan and described feedback input end.
Multimodal Integration type power management chip the most according to claim 1, it is characterised in that described first direct current transformation
Module, described second direct current transformation module and described 3rd direct current transformation module share a frequency generator.
Multimodal Integration type power management chip the most according to claim 1, it is characterised in that described second direct current transformation
The voltage signal phase place that module exports with the outfan of described 3rd direct current transformation module is identical, and with described first direct current transformation
The voltage signal of the outfan output of module has 180 ° of phase contrasts.
Multimodal Integration type power management chip the most as claimed in any of claims 1 to 3, it is characterised in that institute
State Multimodal Integration type power management chip and use the 24 pin package structures of QFN 4mm × 4mm.
Multimodal Integration type power management chip the most according to claim 4, it is characterised in that described Multimodal Integration type
The encapsulation volume of power management chip is 4mm × 4mm × 1mm.
Multimodal Integration type power management chip the most according to claim 4, it is characterised in that described Multimodal Integration type
24 pins of power management chip are averagely arranged on the surrounding of described Multimodal Integration type power management chip, described multichannel
The middle part of integrated power management chip is provided with exposed pads district.
Multimodal Integration type power management chip the most according to claim 4, it is characterised in that described Multimodal Integration type
The bottom of power management chip is provided with fin.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201620569095.3U CN205844960U (en) | 2016-06-13 | 2016-06-13 | Multimodal Integration type power management chip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201620569095.3U CN205844960U (en) | 2016-06-13 | 2016-06-13 | Multimodal Integration type power management chip |
Publications (1)
Publication Number | Publication Date |
---|---|
CN205844960U true CN205844960U (en) | 2016-12-28 |
Family
ID=58152364
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201620569095.3U Active CN205844960U (en) | 2016-06-13 | 2016-06-13 | Multimodal Integration type power management chip |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN205844960U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111443644A (en) * | 2020-04-29 | 2020-07-24 | 深圳市道通科技股份有限公司 | OBD power control management system and OBD monitor terminal |
-
2016
- 2016-06-13 CN CN201620569095.3U patent/CN205844960U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111443644A (en) * | 2020-04-29 | 2020-07-24 | 深圳市道通科技股份有限公司 | OBD power control management system and OBD monitor terminal |
WO2021218744A1 (en) * | 2020-04-29 | 2021-11-04 | 深圳市道通科技股份有限公司 | Obd power supply control and management system and obd monitoring terminal |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11996770B2 (en) | Chip embedded power converters | |
CN110383661B (en) | Chip embedded power converter | |
US10274987B2 (en) | Apparatus, systems and methods for reconfigurable dickson star switched capacitor voltage regulator | |
KR102247952B1 (en) | Feedback control in hybrid voltage regulators | |
US9627028B2 (en) | Power converter for a memory module | |
US10707753B2 (en) | Power regulation with charge pumps | |
US10630181B2 (en) | Semiconductor chip power supply system | |
US12040702B2 (en) | Multi-level structures and methods for switched-mode power supplies | |
KR20170137806A (en) | Asymmetric Switching Capacitor Regulator | |
US20240088789A1 (en) | Power converters, power systems, and switch topologies | |
CN205844960U (en) | Multimodal Integration type power management chip | |
CN105703711B (en) | The sun battle array simulator that switching type voltage source is combined with linear current source | |
CN109725673A (en) | A kind of fully integrated multi output stack low pressure difference linear voltage regulator | |
CN206294066U (en) | A kind of filtering system for suppressing power module common-mode noise | |
US20190305684A1 (en) | Apparatus for Power Converter with Improved Performance and Associated Methods | |
CN103872992A (en) | Electronic system, radio frequency power amplifier and output power compensation method thereof | |
EP4287480A1 (en) | Voltage conversion circuit, charging management module, and electronic device | |
US20220158556A1 (en) | Power module | |
CN108111016B (en) | Power module | |
CN205430175U (en) | Sun battle array simulator that switching mode voltage source and linear current source combine | |
CN205847084U (en) | DC decompression power conversion chip | |
CN207994928U (en) | The high efficiency synchronous rectification boost chips of input current controllable precise | |
CN205844796U (en) | High-low pressure integrated dual channel source managing chip | |
CN207994930U (en) | High efficiency synchronous rectification boost chips | |
CN202750008U (en) | Low-ripple wave heavy current DC-DC switch module power supply |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |