CN205282061U - Display substrate and display device - Google Patents

Display substrate and display device Download PDF

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Publication number
CN205282061U
CN205282061U CN201620010125.7U CN201620010125U CN205282061U CN 205282061 U CN205282061 U CN 205282061U CN 201620010125 U CN201620010125 U CN 201620010125U CN 205282061 U CN205282061 U CN 205282061U
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CN
China
Prior art keywords
base plate
display base
switching unit
transistor
driving
Prior art date
Application number
CN201620010125.7U
Other languages
Chinese (zh)
Inventor
张衎
张斌
董殿正
王光兴
张强
何宇
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN201620010125.7U priority Critical patent/CN205282061U/en
Application granted granted Critical
Publication of CN205282061U publication Critical patent/CN205282061U/en

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Abstract

The utility model relates to a display substrates, including NULL line and a plurality of pixel, every pixel includes: the pixel electrode, wherein, the pixel electrode is connected to the NULL line, display substrates still includes: first switch element sets up the NULL line with between the the pixel electrode display substrates switched on in postboost time of predetermineeing, in order to switch on NULL line and the pixel electrode display substrates breaks off during the start, with the disconnection NULL line and the pixel electrode. Can in postboost time of predetermineeing switch on NULL line and the pixel electrode at display substrates through first switch element for the electric charge of storage among the the pixel electrode all carries out the neutralization after shutting down in the NULL line, thereby makes the pixel electrode and NULL to discharge through the same return circuit of discharging, and no direct current is remained among the the pixel electrode after having guaranteed to discharge.

Description

Display base plate and display unit

Technical field

The utility model relates to technique of display field, specifically, it relates to a kind of display base plate and a kind of display unit.

Background technology

Raster data model output voltage is entirely moved to high-voltage (VGH) by conventional reset circuit after shutdown, so that often the TFT (thin film transistor) of row pixel opens and discharges, but owing in fact the TFT of all row cannot open simultaneously, the VGH that the row pixel-by-pixel basis of rear unlatching receives decays, and causes effectively discharging. And the voltage of pixel electrode is after being neutralized to common electric voltage, final discharge loop is different from the discharge loop of public electrode, the velocity of discharge of pixel electrode can be caused to be slower than public electrode and cause direct current to remain by different circuit electric discharge, for some ADS (the senior super Wei Chang of AdvancedSuperDimensionSwitch) product owing to liquid crystal capacitance is bigger, discharge pixel electrodes is slow, very easily causes boot flash to drift about.

Practical novel content

Technical problem to be solved in the utility model how to make pixel electrode be discharged by identical discharge loop with public electrode.

Object for this reason, the utility model proposes a kind of display base plate, comprises public electrode wires and multiple pixel cell, and each pixel cell comprises:

Pixel electrode,

Wherein, described pixel electrode is connected to public electrode wires;

Described display base plate also comprises:

First switching unit, being arranged between described public electrode wires and described pixel electrode, conducting within described display base plate postboost default time, with electrode wires public described in conducting and pixel electrode, disconnect when described display base plate is started shooting, to disconnect described public electrode wires and pixel electrode.

Preferably, each pixel cell also comprises:

Driving transistor, wherein, the driving source electrode of described driving transistor is connected to data line, and the driving drain electrode of described driving transistor is connected to described pixel electrode, described driving source electrode and driving drain electrode conducting within described display base plate postboost default time,

Wherein, described first switching unit is arranged between described data line and described public electrode wires.

Preferably, each pixel cell also comprises:

2nd switching unit, conducting within described display base plate postboost default time, to drive the driving grid of transistor and described pixel electrode described in conducting, disconnects when described display base plate is started shooting, to disconnect described driving grid and described pixel electrode.

Preferably, above-mentioned display base plate also comprises:

Grid-driving integrated circuit, described grid-driving integrated circuit when described display base plate is started shooting, for described driving gate transport sweep signal;

3rd switching unit, it is arranged between described grid-driving integrated circuit and described driving transistor, described 3rd switching unit disconnects within described display base plate postboost default time, to disconnect described grid-driving integrated circuit and described driving transistor, the conducting when described display base plate is started shooting, with grid-driving integrated circuit described in conducting and described driving transistor.

Preferably, above-mentioned display base plate also comprises:

Control unit, in the first switching unit and the 2nd switching unit conducting described in the postboost default time inner control of described display base plate, controls described 3rd switching unit and disconnects,

Disconnect at the first switching unit and the 2nd switching unit described in described display base plate start control, control described 3rd switching unit conducting.

Preferably, described first switching unit comprises multiple first crystal pipe, and the first source electrode of each first crystal pipe is connected to public electrode wires, and the first drain electrode of each first crystal pipe connects a data line respectively, first grid of each first crystal pipe is connected to described control unit respectively

Described control unit exports high-voltage within described display base plate postboost default time, exports low voltage when described display base plate is started shooting.

Preferably, described 2nd switching unit comprises two-transistor, and the 2nd source electrode of two-transistor is connected to described driving grid, and the 2nd drain electrode of two-transistor is connected to described driving drain electrode, and the second gate pole of two-transistor is connected to described control unit.

Preferably, described 3rd switching unit comprises a non-door and multiple third transistor, the input terminus of described non-door is connected to described control unit, the output terminal of described non-door is connected to the 3rd grid of each third transistor respectively, 3rd source electrode of each third transistor is connected to described grid-driving integrated circuit respectively, and the 3rd drain electrode of each third transistor is connected to one bar of grid line respectively.

Preferably, described first switching unit and the 3rd switching unit are arranged in peripheral circuit.

The utility model also proposed a kind of display unit, comprises above-mentioned display base plate.

According to technique scheme, can by public electrode wires and pixel electrode conducting within display base plate postboost default time by the first switching unit, in making after shutting down the electric charge stored in pixel electrode all carry out in public electrode wires and, so that pixel electrode by the electric discharge of identical discharge loop, can ensure that in the pixel electrode after electric discharge and remain without direct current with public electrode.

Accompanying drawing explanation

By reference to accompanying drawing can understanding feature and advantage of the present utility model clearly, accompanying drawing is schematic and should not be construed as and the utility model carries out any restriction, in the accompanying drawings:

Fig. 1 shows the circuit diagram in the display base plate according to the utility model embodiment;

Fig. 2 is the partial enlargement schematic diagram of Fig. 1;

The public electrode wires of 1-; 2-pixel cell; 20-pixel electrode; 21-first switching unit; 22-the 2nd switching unit; 23-the 3rd switching unit; 24-drives transistor; 3-data line; 4-grid-driving integrated circuit; 5-control unit; The integrated circuit of 6-data signal.

Embodiment

In order to more clearly understand above-mentioned purpose of the present utility model, feature and advantage, below in conjunction with the drawings and specific embodiments, the utility model is further described in detail. It should be noted that, when not conflicting, the feature in the embodiment of the application and embodiment can combine mutually.

Set forth a lot of detail in the following description so that fully understanding the utility model; but; the utility model can also adopt other to be different from other modes described here to implement, and therefore, protection domain of the present utility model is by the restriction of following public specific embodiment.

As shown in Figure 1, comprising public electrode wires 1 and multiple pixel cell 2 according to the display base plate of the utility model embodiment, each pixel cell 2 comprises:

Pixel electrode 20,

Wherein, pixel electrode 20 is connected to public electrode wires 1;

Display base plate also comprises:

First switching unit 21, is arranged between public electrode wires 1 and pixel electrode 20, conducting within display base plate postboost default time, with the public electrode wires of conducting and pixel electrode, disconnects when display base plate is started shooting, to disconnect public electrode wires and pixel electrode.

It should be noted that, the time value that the above-mentioned default time can set in the making processes of display base plate, can also be carry out artificial amendment and the time value of setting in the process using the product comprising this display base plate, such as this default time is between 0.1ms to 10ms a time value, and the size of concrete time value is determined by the velocity of discharge of display base plate.

This enforcement can by public electrode wires and pixel electrode conducting within display base plate postboost default time by the first switching unit, during the electric charge stored in pixel electrode in each pixel cell after shutting down is carried out in public electrode wires and, so that pixel electrode by the electric discharge of identical discharge loop, can ensure that in the pixel electrode after electric discharge and remain without direct current with public electrode.

Preferably, each pixel cell 2 also comprises:

Drive transistor 24, wherein, drive the driving source electrode of transistor to be connected to data line 3, drive the driving drain electrode of transistor to be connected to pixel electrode 20, drive source electrode and drive drain electrode conducting within display base plate postboost default time,

Wherein, the first switching unit 21 is arranged between data line 3 and public electrode wires 1.

The present embodiment drives transistor conducting within display base plate postboost default time by control, electric charge in pixel electrode is imported public electrode wires, the original structure of pixel cell can be made full use of as the connection structure between pixel electrode and public electrode wires, reduce the adjustment to pixel cell.

Preferably, each pixel cell 2 also comprises:

2nd switching unit 22, conducting within display base plate postboost default time, drives grid and pixel electrode 20, disconnects when display base plate is started shooting with conducting, drives grid and pixel electrode 20 to disconnect.

The storage electric charge of pixel electrode can be transferred to the grid driving transistor by the 2nd switching unit in the present embodiment when conducting, and after taking full advantage of shutdown, the residual charge in pixel electrode carrys out conducting driving transistor.

It should be noted that, in different pixels electrode, residual charge amount can be different, such as the pel array of row reversion, wherein the residual charge amount of adjacent column pixel electrode is different, the voltage of adjacent column pixel electrode is respectively high level and lower level, but can't there is negative voltage, therefore by pixel electrode with drive transistor gate turn-on time, pixel electrode can provide cut-in voltage to the grid of driving transistor within for some time, so that drive source electrode and the drain electrode conducting of transistor.

Preferably, above-mentioned display base plate also comprises:

Grid-driving integrated circuit 4, grid-driving integrated circuit 4 when display base plate is started shooting, for driving gate transport sweep signal;

3rd switching unit 23, it is arranged on grid-driving integrated circuit 4 and drives between transistor 24,3rd switching unit 23 disconnects within display base plate postboost default time, to disconnect grid-driving integrated circuit 4 and to drive transistor 24, the conducting when display base plate is started shooting, with turn-on grid electrode drive integrated circult 4 and driving transistor 24.

Owing to the conducting within the above-mentioned default time of the 2nd switching unit drives grid and the drain electrode of transistor, also i.e. conducting grid line and pixel electrode, disconnected within display base plate postboost default time by the 3rd switching unit, it is possible to avoid the damage that the electric charge in grid-driving integrated circuit flows into pixel electrode and caused by pixel electrode within the above-mentioned default time.

Preferably, above-mentioned display base plate also comprises:

Control unit 5, in postboost default time inner control first switching unit 21 of display base plate and the 2nd switching unit 22 conducting, control the 3rd switching unit 23 disconnects,

Disconnect at display base plate start control first switching unit 21 and the 2nd switching unit 22, control the 3rd switching unit 23 conducting.

The present embodiment can unify to control the switch state of the first switching unit, the 2nd switching unit and the 3rd switching unit by a control unit, is convenient to simplify wiring.

Preferably, first switching unit 21 comprises multiple first crystal pipe, and the first source electrode of each first crystal pipe is connected to public electrode wires 1, and the first drain electrode of each first crystal pipe connects a data line 3 respectively, first grid of each first crystal pipe is connected to control unit 5 respectively

Control unit 5 exports high-voltage within display base plate postboost default time, exports low voltage when display base plate is started shooting.

Control unit in the present embodiment exports high-voltage to the grid of first crystal pipe within the above-mentioned default time, can so that first crystal pipe conducting, thus by the data line conducting of the public electrode wires of source electrode end and drain electrode end, and then by public electrode wires and pixel electrode conducting.

It should be noted that, data line in the present embodiment, it can be the data line for a row pixel cell transmission of data signals wherein between two row pixel cells, can also the data line of the pixel cell transmission of data signals to interval in two row pixel cells between two row pixel cells (such as in double-gate structure, data line to the odd pixel unit transmission of data signals in a row pixel cell, the even pixel unit transmission of data signals in another row pixel cell).

Preferably, the 2nd switching unit 22 comprises two-transistor, and the 2nd source electrode of two-transistor is connected to driving grid, and the 2nd drain electrode of two-transistor is connected to the drain electrode driving transistor 24, and the second gate pole of two-transistor is connected to control unit 5.

Control unit exports high-voltage to the grid of two-transistor within the above-mentioned default time, can so that two-transistor conducting, thus by the electric charge of pixel electrode, from driving, the drain electrode of transistor transfers to source electrode, and then transfers to the grid driving transistor, drives transistor with conducting. Drive the electric charge of transistor drain end pixel electrode to import data line by source electrode, then import public electrode wires by first crystal pipe.

Owing to a row pixel electrode is connected to same data line, and every data line when the first switching unit conducting all with public electrode wires conducting, so that often the electric charge in row pixel electrode all imports public electrode wires and neutralizes, and derived by the same circuit with the electric charge in public electrode wires, ensure that in the often row pixel electrode after electric discharge and all remain without direct current.

Preferably, 3rd switching unit 23 comprises a non-door and multiple third transistor, the input terminus of non-door is connected to control unit 5, the output terminal of non-door is connected to the 3rd grid of each third transistor respectively, 3rd source electrode of each third transistor is connected to grid-driving integrated circuit 4 respectively, and the 3rd drain electrode of each third transistor connects one bar of grid line respectively.

It should be noted that, grid line in the present embodiment, it can be the grid line transmitting sweep signal for one-row pixels unit wherein between two row pixel cells, can also between two row pixel cells the pixel cell to interval in two row pixel cells transmission sweep signal grid line (such as grid line in one-row pixels unit odd pixel unit transmission sweep signal, in another row pixel cell even pixel unit transmission sweep signal).

Within the above-mentioned default time, the high-voltage that control unit exports turns into low voltage after non-door, thus ensures that third transistor disconnects, to avoid the electric charge in grid-driving integrated circuit to flow into pixel electrode within the above-mentioned default time. With reason, after display base plate starts shooting (powering on), the low voltage that control unit exports turns into high-voltage after non-door, thus ensures third transistor conducting, thinks that pixel cell normally provides sweep signal.

It should be noted that, above-mentioned 3rd switching unit is except being made up of the third transistor of Fei Men and multiple NPN type, it is also possible to be directly made up of the third transistor of multiple PNP type.

Preferably, the first switching unit 21 and the 3rd switching unit 23 are arranged in peripheral circuit.

Peripheral circuit can be the circuit being arranged between frame and display base plate, walks line, grid-driving integrated circuit 4, the integrated circuit 6 of data signal etc. for setting power supply. Taking pixel region can be reduced, it is to increase efficient lighting area according to the present embodiment. Further, the peripheral circuit including the first switching unit 21 and the 3rd switching unit 23 can be set to flexible circuit, so that when display base plate is assembled into display unit, flexible circuit is bent at the back side of display base plate, thus reduce taking plane space. Certainly, control unit 5 can also be arranged in peripheral circuit to reduce taking pixel region.

The utility model also proposed a kind of display unit, comprises above-mentioned display base plate.

It should be noted that, the display unit in the present embodiment can be: any product or parts with display function such as Electronic Paper, mobile phone, panel computer, televisor, notebook computer, digital phase frame, navigating instrument.

More than it is described with reference to the accompanying drawings the technical solution of the utility model, it is contemplated that to, in prior art, pixel electrode is different from the discharge loop of public electrode, it is easy in pixel electrode, form direct current residual. According to the technical solution of the utility model, can by public electrode wires and pixel electrode conducting within display base plate postboost default time by the first switching unit, in making after shutting down the electric charge stored in pixel electrode all carry out in public electrode wires and, so that pixel electrode by the electric discharge of identical discharge loop, can ensure that in the pixel electrode after electric discharge and remain without direct current with public electrode.

In the utility model, term " first ", " the 2nd " and " the 3rd " are only for describing object, and can not be interpreted as instruction or hint relative importance. Term " many " refer to be more than or equal to two, unless otherwise clear and definite restriction.

The foregoing is only preferred embodiment of the present utility model, be not limited to the utility model, for a person skilled in the art, the utility model can have various modifications and variations. All within spirit of the present utility model and principle, any amendment of doing, equivalent replacement, improvement etc., all should be included within protection domain of the present utility model.

Claims (10)

1. a display base plate, comprises public electrode wires and multiple pixel cell, it is characterised in that, each pixel cell comprises:
Pixel electrode,
Wherein, described pixel electrode is connected to public electrode wires;
Described display base plate also comprises:
First switching unit, being arranged between described public electrode wires and described pixel electrode, conducting within described display base plate postboost default time, with electrode wires public described in conducting and pixel electrode, disconnect when described display base plate is started shooting, to disconnect described public electrode wires and pixel electrode.
2. display base plate according to claim 1, it is characterised in that, each pixel cell also comprises:
Drive transistor, wherein, the driving source electrode of described driving transistor is connected to data line, the driving drain electrode of described driving transistor is connected to described pixel electrode, described driving source electrode and driving drain electrode conducting within described display base plate postboost default time, described first switching unit is arranged between described data line and described public electrode wires.
3. display base plate according to claim 2, it is characterised in that, each pixel cell also comprises:
2nd switching unit, conducting within described display base plate postboost default time, to drive the driving grid of transistor and described pixel electrode described in conducting, disconnects when described display base plate is started shooting, to disconnect described driving grid and described pixel electrode.
4. display base plate according to claim 3, it is characterised in that, also comprise:
Grid-driving integrated circuit, described grid-driving integrated circuit when described display base plate is started shooting, for described driving gate transport sweep signal;
3rd switching unit, it is arranged between described grid-driving integrated circuit and described driving transistor, described 3rd switching unit disconnects within described display base plate postboost default time, to disconnect described grid-driving integrated circuit and described driving transistor, the conducting when described display base plate is started shooting, with grid-driving integrated circuit described in conducting and described driving transistor.
5. display base plate according to claim 4, it is characterised in that, also comprise:
Control unit, in the first switching unit and the 2nd switching unit conducting described in the postboost default time inner control of described display base plate, controls described 3rd switching unit and disconnects,
Disconnect at the first switching unit and the 2nd switching unit described in described display base plate start control, control described 3rd switching unit conducting.
6. display base plate according to claim 5, it is characterized in that, described first switching unit comprises multiple first crystal pipe, first source electrode of each first crystal pipe is connected to public electrode wires, first drain electrode of each first crystal pipe connects a data line respectively, first grid of each first crystal pipe is connected to described control unit respectively
Described control unit exports high-voltage within described display base plate postboost default time, exports low voltage when described display base plate is started shooting.
7. display base plate according to claim 5, it is characterized in that, described 2nd switching unit comprises two-transistor, 2nd source electrode of two-transistor is connected to described driving grid, 2nd drain electrode of two-transistor is connected to described driving drain electrode, and the second gate pole of two-transistor is connected to described control unit.
8. display base plate according to claim 5, it is characterized in that, described 3rd switching unit comprises a non-door and multiple third transistor, the input terminus of described non-door is connected to described control unit, the output terminal of described non-door is connected to the 3rd grid of each third transistor respectively, 3rd source electrode of each third transistor is connected to described grid-driving integrated circuit respectively, and the 3rd drain electrode of each third transistor connects one bar of grid line respectively.
9. display base plate according to any one of claim 4 to 8, it is characterised in that, described first switching unit and the 3rd switching unit are arranged in peripheral circuit.
10. a display unit, it is characterised in that, comprise the display base plate according to any one of claim 1 to 9.
CN201620010125.7U 2016-01-05 2016-01-05 Display substrate and display device CN205282061U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105489182A (en) * 2016-01-05 2016-04-13 京东方科技集团股份有限公司 Display substrate and display device
WO2019104822A1 (en) * 2017-11-29 2019-06-06 武汉华星光电技术有限公司 Display panel, and manufacturing method and control method therefor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105489182A (en) * 2016-01-05 2016-04-13 京东方科技集团股份有限公司 Display substrate and display device
WO2017118215A1 (en) * 2016-01-05 2017-07-13 京东方科技集团股份有限公司 Display substrate and display device
CN105489182B (en) * 2016-01-05 2018-01-16 京东方科技集团股份有限公司 Display base plate and display device
US10204578B2 (en) 2016-01-05 2019-02-12 Boe Technology Group Co., Ltd. Display substrate and display device
WO2019104822A1 (en) * 2017-11-29 2019-06-06 武汉华星光电技术有限公司 Display panel, and manufacturing method and control method therefor

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