CN205210747U - Voltage regulator of no ring - Google Patents
Voltage regulator of no ring Download PDFInfo
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- CN205210747U CN205210747U CN201520939490.1U CN201520939490U CN205210747U CN 205210747 U CN205210747 U CN 205210747U CN 201520939490 U CN201520939490 U CN 201520939490U CN 205210747 U CN205210747 U CN 205210747U
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Abstract
The utility model provides a voltage regulator of no ring, it includes differential amplification circuit, a MOS pipe, the 2nd MOS pipe, resistance ra, electric capacity CC, voltage feedback circuit, output capacitance co and electric current source. The source electrode of MOS pipe links to each other with the power end, and its grid links to each other with differential amplification circuit's output, and its drain electrode is in proper order through ra and co ground connection, the source electrode of the 2nd MOS pipe links to each other with the power end, and its grid links to each other with differential amplification circuit's output, and the connected node VB between its drain electrode and ra and the co links to each other, node VB links to each other with voltage regulator's output vo, the drain electrode and the connected node VA between the ra of MOS pipe link to each other with differential amplification circuit's positive going input end through cc, and differential amplification circuit's a negative sense input and a reference voltage link to each other. The voltage feedback circuit is used for sampling output end vo's output voltage to output feedback voltage gives differential amplification circuit's positive going input end, the input and the node VA in electric current source link to each other its output ground connection. Compared with the prior art, the utility model discloses an output voltage does not have the ringing.
Description
[technical field]
The utility model relates to low-dropout regulator technical field, particularly a kind of voltage regulator without ring.
[background technology]
Disclose a kind of High-stability voltage regulator in Chinese Patent Application No. CN200710177830.1, please refer to shown in Fig. 1, it is the circuit diagram of a kind of High-stability voltage regulator in this patented claim, and it has advantage stable in wide scope.But, when input voltage VCC and output voltage Vo close to time, output voltage Vo there will be the ringing of long period.
Therefore, be necessary to provide a kind of technical scheme of improvement to solve the problems referred to above.
[utility model content]
The purpose of this utility model is to provide a kind of voltage regulator without ring, input voltage and output voltage close to time, its output voltage is without ringing.
In order to solve the problem, the utility model provides a kind of voltage regulator without ring, and it comprises differential amplifier circuit, the first metal-oxide-semiconductor MP7, the second metal-oxide-semiconductor MPass, resistance Ra, electric capacity CC, voltage feedback circuit and output capacitance Co, and current source.The source electrode of the first metal-oxide-semiconductor is connected with power end, and its grid is connected with the output terminal of differential amplifier circuit, and its drain electrode is successively through resistance Ra and output capacitance Co ground connection; The source electrode of the second metal-oxide-semiconductor is connected with power end, and its grid is connected with the output terminal of differential amplifier circuit, and its drain electrode is connected with the connected node VB between resistance Ra and output capacitance Co; Connected node VB is connected with the output end vo of voltage regulator; The drain electrode of the first metal-oxide-semiconductor MP7 is connected with the positive input of differential amplifier circuit through electric capacity Cc with the connected node VA between resistance Ra, the negative input of differential amplifier circuit and a reference voltage Ref.The input end of described voltage feedback circuit is connected with the output end vo of voltage regulator, its output terminal is connected with the positive input of differential amplifier circuit, the output voltage that described voltage feedback circuit exports for the output end vo of sampled voltage regulator, with output feedack voltage to the positive input of differential amplifier circuit.The input end of current source is connected with connected node VA, its output head grounding, and the electric current of current source flows to ground node from connected node VA.
Further, described first metal-oxide-semiconductor MP7 and the second metal-oxide-semiconductor MPass is PMOS transistor, and the electric current of described current source flows to ground node from connected node VA.
Further, described voltage feedback circuit comprises and is connected to the first divider resistance Rf1 between described voltage feedback circuit input end and ground node and the second divider resistance Rf1 successively, connected node between first divider resistance Rf1 and the second divider resistance Rf1 is the output terminal of described voltage feedback circuit, and the voltage on this connected node is described feedback voltage.
Further, described current source comprises the resistance Rb be connected between connected node VA and ground node.
Compared with prior art, the connected node of the utility model between PMOS transistor MP7 and resistance Ra increases a direct current and flows to earthy current source, it can alleviate the situation that PMOS transistor MP7 enters linear zone, thus input voltage and output voltage close to time, its output voltage is without ringing.
[accompanying drawing explanation]
In order to be illustrated more clearly in the technical scheme of the utility model embodiment, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.Wherein:
Fig. 1 is the circuit diagram of a kind of High-stability voltage regulator of the prior art;
Fig. 2 describes High-stability voltage regulator of the prior art when electrifying startup, the ringing that out of phase nargin relates to;
Fig. 3 is the circuit diagram of the utility model voltage regulator without ring in one embodiment;
Fig. 4 is the circuit diagram of the utility model voltage regulator without ring in another embodiment.
[embodiment]
For enabling above-mentioned purpose of the present utility model, feature and advantage become apparent more, are described in further detail the utility model below in conjunction with the drawings and specific embodiments.
Alleged herein " embodiment " or " embodiment " refers to special characteristic, structure or the characteristic that can be contained at least one implementation of the utility model.Different local in this manual " in one embodiment " occurred not all refers to same embodiment, neither be independent or optionally mutually exclusive with other embodiments embodiment.Unless stated otherwise, connection herein, be connected, word that the expression that connects is electrically connected all represents and is directly or indirectly electrical connected.
Applicant is by carrying out a large amount of experiments and analysis to the High-stability voltage regulator shown in Fig. 1, think " input voltage VCC and output voltage Vo close to time; output voltage Vo there will be the ringing of long period " reason be: there is voltage drop in resistance Ra, PMOS transistor MP7 can be introduced into linear zone than Mpass, cause the decreased effectiveness compensating zero point, thus cause the phase margin of feedback loop to decline.Although can ensure that phase margin is greater than zero and ensures circuit stability and nonoscillatory by design, but lower phase margin can cause when electrifying startup or input voltage saltus step time or output current saltus step time, output voltage Vo there will be the ringing of long period.Phase margin is lower, and ring is more, and the response time (output voltage Vo is from jumping to the stable time) is longer.When Fig. 2 describes electrifying startup, the ringing that out of phase nargin relates to, when phase margin is lower, ringing number is more.
Therefore the utility model improves the High-stability voltage regulator shown in Fig. 1.Please refer to shown in Fig. 3, it is the circuit diagram of the utility model voltage regulator without ring in one embodiment.The difference of Fig. 3 and Fig. 1 is, the connected node VA between its PMOS transistor MP7 in FIG and resistance Ra increases a direct current and flows to earthy current source 320.
Concrete, the voltage regulator without ring shown in Fig. 3 comprises differential amplifier circuit gm1, the first metal-oxide-semiconductor MP7, the second metal-oxide-semiconductor MPass, resistance Ra, electric capacity CC, voltage feedback circuit 310 and output capacitance Co, and current source 320.
Wherein, the source electrode of the first metal-oxide-semiconductor is connected with power end VCC, and its grid is connected with the output terminal of differential amplifier circuit gm1, and its drain electrode is successively through resistance Ra and output capacitance Co ground connection; The source electrode of the second metal-oxide-semiconductor is connected with power end VCC, and its grid is connected with the output terminal of differential amplifier circuit gm1, and its drain electrode is connected with the connected node VB between resistance Ra and output capacitance Co; Connected node VB is connected with the output end vo of voltage regulator; The drain electrode of the first metal-oxide-semiconductor MP7 is connected with the positive input of differential amplifier circuit gm1 through electric capacity Cc with the connected node VA between resistance Ra, and the negative input of differential amplifier circuit gm1 is connected with a reference voltage Ref; Pull-up resistor RL is connected to output end vo and the ground node of voltage regulator.In the embodiment shown in fig. 3, the first metal-oxide-semiconductor MP7 and the second metal-oxide-semiconductor MPass is PMOS crystal.
The described input end of voltage feedback circuit 310 is connected with the output end vo of voltage regulator, its output terminal is connected with the positive input of differential amplifier circuit gm1, described voltage feedback circuit 310 for the output voltage of the output end vo of sampled voltage regulator, with output feedack voltage Vf to the positive input of differential amplifier circuit gm1.In the embodiment shown in fig. 3, described voltage feedback circuit 310 comprises the first divider resistance Rf1 between input end and ground node and the second divider resistance Rf1 that are connected to described voltage feedback circuit 310 successively, connected node between first divider resistance Rf1 and the second divider resistance Rf1 is the output terminal of described voltage feedback circuit 310, and the voltage on this connected node is described feedback voltage V f.But, this is only an example, and the utility model is not limited to this.
The input end of current source 320 is connected with connected node VA, its output head grounding, and the electric current I 1 of current source 320 flows to ground node from connected node VA.
Compared to Figure 1, the DC point of node VA can be reduced the voltage of I1.Ra by the current source 320 in Fig. 3, and wherein, I1 is the current value of current source 320, and Ra is the resistance value of resistance Ra.The situation that PMOS transistor MP7 enters linear zone can be alleviated like this, namely the source electrode and the drain voltage that increase PMOS transistor MP7 are poor, source electrode and the drain voltage difference of PMOS transistor MP7 are larger, and PMOS transistor MP7 more levels off to and is operated in saturation region, and its small-signal behaviour is better.Further, because current source 320 is DC current source, it does not affect the AC characteristic (i.e. small-signal behaviour) of node VA, and therefore, the electric structure shown in the structure shown in Fig. 3 and Fig. 1 is when PMOS transistor MP7 is positioned at saturation region, just the same.
Please refer to shown in Fig. 4, it is the circuit diagram of the utility model voltage regulator without ring in another embodiment.The difference of Fig. 4 and Fig. 3 is, described current source 420 comprise be connected between connected node VA and ground node resistance Rb.Because pure resistance Rb also only affects the DC characteristic of circuit, be equivalent to add the electric current that flows to ground level, therefore can obtain the effect similar with Fig. 3.
In summary, the utility model increases a direct current by the connected node VA between the PMOS transistor MP7 and resistance Ra of existing High-stability voltage regulator and flows to earthy current source I1, so that the DC point of node VA is reduced, alleviate the situation that PMOS transistor MP7 enters linear zone, and current source I1 is DC current source, it does not affect the AC characteristic of node VA, thus improve when input voltage VCC and output voltage VO close to time, the problem of the phase margin reduction of feedback loop, to improve or ringing.
In the utility model, " connection ", be connected, word that " companys ", the expression such as " connecing " are electrical connected, if no special instructions, then represent direct or indirect electric connection.
It is pointed out that the scope be familiar with person skilled in art and any change that embodiment of the present utility model is done all do not departed to claims of the present utility model.Correspondingly, the scope of claim of the present utility model is also not limited only to previous embodiment.
Claims (4)
1. without a voltage regulator for ring, it is characterized in that, it comprises differential amplifier circuit, the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, resistance Ra, electric capacity CC, voltage feedback circuit and output capacitance Co, and current source,
The source electrode of the first metal-oxide-semiconductor is connected with power end, and its grid is connected with the output terminal of differential amplifier circuit, and its drain electrode is successively through resistance Ra and output capacitance Co ground connection; The source electrode of the second metal-oxide-semiconductor is connected with power end, and its grid is connected with the output terminal of differential amplifier circuit, and its drain electrode is connected with the connected node VB between resistance Ra and output capacitance Co; Connected node VB is connected with the output end vo of voltage regulator; The drain electrode of the first metal-oxide-semiconductor is connected with the positive input of differential amplifier circuit through electric capacity Cc with the connected node VA between resistance Ra, and the negative input of differential amplifier circuit is connected with a reference voltage,
The input end of described voltage feedback circuit is connected with the output end vo of voltage regulator, its output terminal is connected with the positive input of differential amplifier circuit, the output voltage that described voltage feedback circuit exports for the output end vo of sampled voltage regulator, with output feedack voltage to the positive input of differential amplifier circuit
The input end of current source is connected with connected node VA, its output head grounding, and the electric current of current source flows to ground node from connected node VA.
2. the voltage regulator without ring according to claim 1, is characterized in that,
Described first metal-oxide-semiconductor and the second metal-oxide-semiconductor are PMOS transistor, and the electric current of described current source flows to ground node from connected node VA.
3. the voltage regulator without ring according to claim 2, is characterized in that,
Described voltage feedback circuit comprises and is connected to the first divider resistance Rf1 between described voltage feedback circuit input end and ground node and the second divider resistance Rf1 successively, connected node between first divider resistance Rf1 and the second divider resistance Rf1 is the output terminal of described voltage feedback circuit, and the voltage on this connected node is described feedback voltage.
4. the voltage regulator without ring according to claim 3, is characterized in that,
Described current source comprises the resistance Rb be connected between connected node VA and ground node.
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| CN201520939490.1U CN205210747U (en) | 2015-11-23 | 2015-11-23 | Voltage regulator of no ring |
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| CN201520939490.1U CN205210747U (en) | 2015-11-23 | 2015-11-23 | Voltage regulator of no ring |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105404344A (en) * | 2015-11-23 | 2016-03-16 | 无锡中感微电子股份有限公司 | Voltage regulator with no ringing |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105404344A (en) * | 2015-11-23 | 2016-03-16 | 无锡中感微电子股份有限公司 | Voltage regulator with no ringing |
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