CN205139769U - Interface expanding unit and mainboard - Google Patents
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- CN205139769U CN205139769U CN201520688998.9U CN201520688998U CN205139769U CN 205139769 U CN205139769 U CN 205139769U CN 201520688998 U CN201520688998 U CN 201520688998U CN 205139769 U CN205139769 U CN 205139769U
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Abstract
The utility model discloses an interface expanding unit and mainboard. Wherein, this method includes: central processing unit contains the PCIe controller, the PCIe bus, it is continuous with the physical layer output of PCIe controller for control central processing unit and the mutual transmitting data of PCIe external device, and at least one switch chip, with PCIe bus connection for PCIe interface in the extension PCIe bus. The utility model provides a since now more and more device adopt the central processing unit's that the PCIe interface caused the technical problem that PCIe number of interfaces is not enough.
Description
Technical field
The utility model relates to computer realm, in particular to a kind of interface extending device and mainboard.
Background technology
At present, due to the versatility of PCIe, increasing device adopts PCIe interface, in order to connect more PCIe equipment, central processing unit needs more PCIe interface, due to central processing unit PCIe interface lazy weight, can not connect the device of more users needs, cause computing machine cannot realize more function, therefore need to expand the existing PCIe interface of central processing unit.In the prior art, more PCIe equipment is accessed in order to make central processing unit, the most quantity reducing PCIe expansion network interface or method of deleting extra PCIe socket of adopting realizes, but the quantity reducing PCIe expansion network interface can cause certain limitation to product, deleting extra PCIe socket makes central processing unit lose extendibility completely, so these two kinds of methods all have certain limitation.
For the problem of the PCIe interface lazy weight of the central processing unit adopting PCIe interface to cause due to increasing device now, at present effective solution is not yet proposed.
Utility model content
The utility model embodiment provides a kind of interface extending device and mainboard, at least to solve the technical matters of the PCIe interface lazy weight of the central processing unit adopting PCIe interface to cause due to increasing device now.
According to an aspect of the utility model embodiment, provide a kind of interface extending device, comprising: central processing unit, comprise PCIe controller; PCIe bus, is connected with the Physical layer output terminal of PCIe controller, for controlling central processing unit and PCIe external equipment mutual data transmission; And at least one exchange chip, be connected with PCIe bus, for expanding the PCIe interface in PCIe bus.
According to the another aspect of the utility model embodiment, additionally provide a kind of mainboard, comprising: interface extending device, the interface extending device that this interface extending device is above-mentioned any one of claim 1 to 9
In the utility model embodiment, by the mode of the PCIe interface access exchange chip at central processing unit, reach the PCIe interface object of expansion central processing unit, thus achieve the technique effect PCIe interface quantity of central processing unit being met consumers' demand when not reducing network interface quantity and the PCIe slot of central processing unit, and then solve the technical matters of PCIe interface lazy weight of the central processing unit adopting PCIe interface to cause due to increasing device now.
Accompanying drawing explanation
Accompanying drawing described herein is used to provide further understanding of the present utility model, and form a application's part, schematic description and description of the present utility model, for explaining the utility model, is not formed improper restriction of the present utility model.In the accompanying drawings:
Fig. 1 is the structural representation of the interface extending device according to the utility model embodiment;
Fig. 2 is the structural representation of a kind of exchange chip according to the utility model embodiment;
Fig. 3 is the structural representation of a kind of mainboard according to the utility model embodiment;
Fig. 4 a is the electrical block diagram of a kind of exchange chip ASMediaASM1182 according to the utility model embodiment;
Fig. 4 b is the electrical block diagram of a kind of central processing unit Godson 2H according to the utility model embodiment;
Fig. 4 c is the electrical block diagram of a kind of PCIe external equipment i210 network interface according to the utility model embodiment; And
Fig. 4 d is the electrical block diagram of the another kind of PCIe external equipment PCIe expansion slot according to the utility model embodiment.
Embodiment
The utility model scheme is understood better in order to make those skilled in the art person, below in conjunction with the accompanying drawing in the utility model embodiment, technical scheme in the utility model embodiment is clearly and completely described, obviously, described embodiment is only the embodiment of the utility model part, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all should belong to the scope of the utility model protection.
It should be noted that, term " first ", " second " etc. in instructions of the present utility model and claims and above-mentioned accompanying drawing are for distinguishing similar object, and need not be used for describing specific order or precedence.Should be appreciated that the data used like this can be exchanged in the appropriate case, so as embodiment of the present utility model described herein can with except here diagram or describe those except order implement.In addition, term " comprises " and " having " and their any distortion, intention is to cover not exclusive comprising, such as, contain those steps or unit that the process of series of steps or unit, method, system, product or equipment is not necessarily limited to clearly list, but can comprise clearly do not list or for intrinsic other step of these processes, method, product or equipment or unit.
Embodiment one
According to the utility model embodiment, provide a kind of embodiment of interface extending device, it should be noted that, can perform in the computer system of such as one group of computer executable instructions in the step shown in the process flow diagram of accompanying drawing, and, although show logical order in flow charts, in some cases, can be different from the step shown or described by order execution herein.
Fig. 1 is the structural representation of the interface extending device according to the utility model embodiment, and as shown in Figure 1, this device comprises: central processing unit 12, PCIe bus 14 and at least one exchange chip 16, wherein,
Central processing unit 12, comprises PCIe controller.
Concrete, above-mentioned central processing unit comprises PCIe controller, can connect with PCIe bus and carry out information interaction with other PCIe external equipments.
The PCIe interface of the PCIe controller of the Godson 2H processor that the embodiment of the present application provides both can use as the PCIe interface of an X4, also can as 4 independently X1 PCIe interface use, X4 with X1 is the mode of operation that PCIe interface is different, the embodiment of the present application when Godson 2H as 4 independently X1 PCIe interface use, the PCIe interface of Godson 2H is expanded, wherein, Godson 2H is connected with PCIe bus by the Physical layer output port of PCIe controller.
PCIe bus 14, is connected with the Physical layer output terminal of PCIe controller, for controlling central processing unit and PCIe external equipment mutual data transmission.
At least one exchange chip 16, is connected with described PCIe bus, for expanding the PCIe interface in PCIe bus.
Concrete, above-mentioned exchange chip is connected with PCIe bus, and for expanding the PCIe interface in PCIe bus, wherein, a PCIe interface at least can be expanded to two PCIe interface by above-mentioned exchange chip.The central processing unit Godson 2H that the application provides has 4 PCIe interface, when using the PCIe interface of exchange chip expansion Godson 2H, can access arbitrarily 1 to 4 exchange chip.
As from the foregoing, said apparatus adopts and central processing unit is accessed PCIe bus, wherein, the Physical layer output terminal of PCIe and PCIe controller is connected, again exchange chip is accessed the mode of PCIe bus for controlling central processing unit and PCIe external equipment mutual data transmission, increase the PCIe interface quantity of central processing unit, reach the technical purpose that central processing unit can access more PCIe equipment, solve the technical matters of the PCIe interface lazy weight of the central processing unit adopting PCIe interface to cause due to increasing device now.
Optionally, when exchange chip is multiple, the PCIe interface that any one or more exchange chip is corresponding with in PCIe bus connects.
As from the foregoing, when central processing unit needs to expand multiple PCIe interface, the mode accessing multiple exchange chip in PCIe bus can be adopted to realize.
Optionally, exchange chip at least comprises: a upstream port and two downstream ports, and wherein, upstream port is connected with PCIe bus, and two downstream ports are connected with the PCIe equipment of outside.
Concrete, exchange chip by a upstream port and central processing unit interactive information, and passes through two downstream ports and PCIe external equipment interactive information.
Optionally, above-mentioned interface extending device also comprises: the first controller, moderator and at least two second controllers, wherein,
First controller, is connected with PCIe controller by PCIe bus, for the information issued alternately with central processing unit or the information uploaded.
Concrete, as shown in Figure 2, the first controller receives the information that central processing unit issues, and transfers to moderator, and to the information that the PCIe equipment of central processing unit transmit outer is uploaded.
Moderator, is connected with the first controller, for the information issued being converted to the information of at least two PCIe device transmission externally and the information uploaded of the PCIe equipment gathering multiple outside.
Concrete, moderator is connected with the first controller, receives the information that the first controller issues, and information is converted to the information of at least two PCIe device transmission externally, and judge the downstream port corresponding with above-mentioned information, by above-mentioned information transmission to the downstream port corresponding with above-mentioned information; When moderator receives the PCIe information of the outside that at least two second controllers are uploaded, the information received is gathered, be uploaded to above-mentioned first controller.
At least two second controllers, each second controller is connected with moderator, gives the PCIe equipment of corresponding outside for the information transmission issued that will receive, and to the information that the PCIe equipment of moderator transmit outer is uploaded.
As from the foregoing, the information that said apparatus is issued by the first controller reception central processing unit, and be transmitted in moderator, moderator is converted to the information of second controller transmission corresponding at least two road directions to the information received, and above-mentioned information is transferred to the PCIe equipment of the outside be attached thereto by second controller more respectively; When the equipment information upload of outside, by second controller, information is uploaded to moderator, moderator gathers the information uploaded, then information is uploaded to the first controller, by the first controller, above-mentioned information is uploaded to central processing unit by PCIe bus.
Optionally, said apparatus can also comprise: clock regtster, wherein,
Clock regtster, for being divided into the clock of at least two-way equal frequencies by the clock of PCIe bus.
As from the foregoing, in said apparatus, exchange chip also comprises clock regtster, and the clock of clock regtster just PCIe bus is divided into the clock of at least two-way equal frequencies.
Alternatively, the bandwidth summation that the PCIe equipment that PCIe bus bandwidth is more than or equal to described outside obtains.
Concrete, the bandwidth summation that PCIe equipment obtains is PCIe bus bandwidth.
Optionally, central processing unit is Godson 2H.
Optionally, exchange chip is ASMediaASM1182.
Optionally, outside PCIe equipment is any one equipment following: network interface, expansion slot.
Concrete, outside PCIe equipment is selected as required for user, and wherein, outside PCIe equipment meets PCIe bus protocol.
Embodiment two
According to the utility model embodiment, provide a kind of device embodiment of mainboard, this mainboard comprises the interface extending device shown in Fig. 1 and Fig. 2, concrete, Fig. 3 is the structural representation of a kind of mainboard according to the utility model embodiment, and as shown in Figure 3, this mainboard comprises: interface extending device, wherein, interface extending device is the interface extending device shown in Fig. 1 and Fig. 2.
As shown in Figure 3, in a kind of embodiment that the application provides, mainboard can for being applied to the PCIe interface expansion mainboard of Godson 2H, the PCIe interface of Godson 2H is as the PCIe interface work of 4 independently X1, central processing unit Godson 2H is connected with PCIe bus, wherein three PCIe interface are connected with i210 network interface, one of them PCIe interface is connected with exchange chip ASMediaASM1182, two downstream ports of ASMediaASM1182 are connected with a PCIe expansion slot with an i210 network interface respectively, four of Godson 2H PCIe interface are expanded to five PCIe interface by this Interface Expanding mainboard, when mainboard ingress bandwidth is 5G, each PCIe interface of lower floor can get 1G bandwidth, the demand of most chip such as such as network interface card or encryption chip etc. can be met.
Concrete, Fig. 4 a is the electrical block diagram of a kind of exchange chip ASMediaASM1182 according to the utility model embodiment, Fig. 4 b is the electrical block diagram of a kind of central processing unit Godson 2H according to the utility model embodiment, Fig. 4 c is the electrical block diagram of a kind of PCIe external equipment i210 network interface according to the utility model embodiment, and Fig. 4 d is the electrical block diagram of the another kind of PCIe external equipment PCIe expansion slot according to the utility model embodiment; Shown in above-mentioned four width figure, the main PCIe signal pins PCIE_RXP3 of ASMEDIA, PCIE_RXN3, PCIE_TXP3, PCIE_TXN3 in Fig. 4 a, main PCIe differential clocks pin PECLKP0_82A, PECLKN0_82A are connected respectively at PCIE3_RXP, PCIE3_RXN, PCIE3_TXP, PCIE3_TXN, PCIE3_CLKP, PCIE3_CLKP, the PCIE3_CLKN of Loogson2HSATAPCIEHT in Fig. 4 b; In Fig. 4 a, first of ASMEDIA from signal pins RXP_5_82, RXN_5_82, TXP_5_82, TXN_5_82, first from PCIe differential clocks pin PECLKP_5_82A, PECLKN_5_82A and Fig. 4 c i210 PE_Tp, PE_Tn, PE_Rp, PE_Rn, PECTKp, PECTKn be connected; In Fig. 4 a, second of ASMEDIA from signal pins RXP_7_82, RXN_7_82, TXP_7_82, TXN_7_82, second is connected from the HSIP [0] PCIe differential clocks pin PECLKP_5_82A, PECLKN_5_82A and Fig. 4 d, HSIN [0], HSOP [0], HSON [0], REFCLK+, REFCLK-, and Fig. 4 a is the Restart Signal output pin PE_RST_OUT_82's of ASMediaASM1182 and Fig. 4 c
be connected with the PWRGO of Fig. 4 d.
Here the embodiment of the present application provides central processing unit, exchange chip and PCIe external equipment are only described for Godson 2H, ASMediaASM1182, network interface and expansion slot in Fig. 3, the mainboard provided to realize the embodiment of the present application is as the criterion, and does not specifically limit.
Above-mentioned the utility model embodiment sequence number, just to describing, does not represent the quality of embodiment.
In above-described embodiment of the present utility model, the description of each embodiment is all emphasized particularly on different fields, in certain embodiment, there is no the part described in detail, can see the associated description of other embodiments.
In several embodiments that the application provides, should be understood that, disclosed technology contents, the mode by other realizes.Wherein, device embodiment described above is only schematic, the such as division of described unit, can be that a kind of logic function divides, actual can have other dividing mode when realizing, such as multiple unit or assembly can in conjunction with or another system can be integrated into, or some features can be ignored, or do not perform.Another point, shown or discussed coupling each other or direct-coupling or communication connection can be by some interfaces, and the indirect coupling of unit or module or communication connection can be electrical or other form.
The described unit illustrated as separating component or can may not be and physically separates, and the parts as unit display can be or may not be physical location, namely can be positioned at a place, or also can be distributed on multiple unit.Some or all of unit wherein can be selected according to the actual needs to realize the object of the present embodiment scheme.
In addition, each functional unit in each embodiment of the utility model can be integrated in a processing unit, also can be that the independent physics of unit exists, also can two or more unit in a unit integrated.Above-mentioned integrated unit both can adopt the form of hardware to realize, and the form of SFU software functional unit also can be adopted to realize.
If described integrated unit using the form of SFU software functional unit realize and as independently production marketing or use time, can be stored in a computer read/write memory medium.Based on such understanding, the part that the technical solution of the utility model contributes to prior art in essence in other words or all or part of of this technical scheme can embody with the form of software product, this computer software product is stored in a storage medium, comprises all or part of step of some instructions in order to make a computer equipment (can be personal computer, server or the network equipment etc.) perform method described in each embodiment of the utility model.And aforesaid storage medium comprises: USB flash disk, ROM (read-only memory) (ROM, Read-OnlyMemory), random access memory (RAM, RandomAccessMemory), portable hard drive, magnetic disc or CD etc. various can be program code stored medium.
The above is only preferred implementation of the present utility model; it should be pointed out that for those skilled in the art, under the prerequisite not departing from the utility model principle; can also make some improvements and modifications, these improvements and modifications also should be considered as protection domain of the present utility model.
Claims (10)
1. an interface extending device, is characterized in that, comprising:
Central processing unit, comprises PCIe controller;
PCIe bus, is connected with the Physical layer output terminal of described PCIe controller, for controlling described central processing unit and PCIe external equipment mutual data transmission; And
At least one exchange chip, is connected with described PCIe bus, for expanding the PCIe interface in described PCIe bus.
2. device according to claim 1, is characterized in that, when described exchange chip is multiple, the described PCIe interface that any one or more described exchange chip is corresponding with in described PCIe bus connects.
3. device as claimed in any of claims 1 to 2, it is characterized in that, described exchange chip at least comprises: a upstream port and two downstream ports, wherein, described upstream port is connected with described PCIe bus, and described two downstream ports are connected with the PCIe equipment of outside.
4. device according to claim 3, is characterized in that, described exchange chip also comprises:
First controller, is connected with described PCIe controller by described PCIe bus, for the information issued alternately with described central processing unit or the information uploaded;
Moderator, is connected with described first controller, for the described information issued being converted at least two to the information of the PCIe device transmission of described outside and the information uploaded of the PCIe equipment gathering multiple described outside; And
At least two second controllers, each second controller is connected with described moderator, for the information transmission that will issue described in receiving to the PCIe equipment of corresponding described outside, and to the information that the PCIe equipment that described moderator transmits described outside is uploaded.
5. device according to claim 3, is characterized in that, described device also comprises:
Clock regtster, for being divided into the clock of at least two-way equal frequencies by the clock of described PCIe bus.
6. device according to claim 3, is characterized in that, the bandwidth summation that the PCIe equipment that described PCIe bus bandwidth is more than or equal to described outside obtains.
7. device according to claim 1, is characterized in that, described central processing unit is Godson 2H.
8. device according to claim 1, is characterized in that, described exchange chip is ASMediaASM1182.
9. device according to claim 3, is characterized in that, the PCIe equipment of described outside is any one equipment following: network interface, expansion slot.
10. a mainboard, is characterized in that, comprising: interface extending device, wherein, and the interface extending device of described interface extending device according to any one of claim 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520688998.9U CN205139769U (en) | 2015-09-07 | 2015-09-07 | Interface expanding unit and mainboard |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201520688998.9U CN205139769U (en) | 2015-09-07 | 2015-09-07 | Interface expanding unit and mainboard |
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| CN205139769U true CN205139769U (en) | 2016-04-06 |
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| CN201520688998.9U Expired - Fee Related CN205139769U (en) | 2015-09-07 | 2015-09-07 | Interface expanding unit and mainboard |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111935707A (en) * | 2020-07-29 | 2020-11-13 | 北京三未信安科技发展有限公司 | Cipher device and cipher equipment |
| CN112286851A (en) * | 2020-11-06 | 2021-01-29 | 百度在线网络技术（北京）有限公司 | Server mainboard, server, control method, electronic device and readable medium |
| CN114301854A (en) * | 2021-02-05 | 2022-04-08 | 井芯微电子技术(天津)有限公司 | PCIe switching equipment |
-
2015
- 2015-09-07 CN CN201520688998.9U patent/CN205139769U/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111935707A (en) * | 2020-07-29 | 2020-11-13 | 北京三未信安科技发展有限公司 | Cipher device and cipher equipment |
| CN112286851A (en) * | 2020-11-06 | 2021-01-29 | 百度在线网络技术（北京）有限公司 | Server mainboard, server, control method, electronic device and readable medium |
| CN112286851B (en) * | 2020-11-06 | 2023-06-23 | 百度在线网络技术（北京）有限公司 | Server main board, server, control method, electronic device and readable medium |
| CN114301854A (en) * | 2021-02-05 | 2022-04-08 | 井芯微电子技术(天津)有限公司 | PCIe switching equipment |
| CN114301854B (en) * | 2021-02-05 | 2024-02-23 | 井芯微电子技术(天津)有限公司 | PCIe switching device |
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